Abstract: A pixel circuit includes: a phototransistor configured to receive, by one region of a source and a drain, inflow of photo-carriers generated by light entering a substrate, and configured to output a voltage signal from the one region; and a blocking layer provided on another region of the drain and the source and on a side of a channel far from a surface, and configured to prevent the photo-carriers from directly flowing into the other region. The phototransistor causes a sub-threshold current to flow between the source and the drain in a pinch-off state. Each of the source and the drain of the phototransistor is periodically reset to a reset voltage. The reset voltage is set to a voltage between a voltage at which a dark current of the phototransistor becomes zero and a voltage at which a bias voltage of the phototransistor becomes zero.

Abstract: A pixel circuit including a transistor, a blocking layer and an output circuit is disclosed. The transistor includes a first doped region and a second doped region disposed on opposite sides of a channel of the transistor proximate to a first surface of a semiconductor substrate such that photo-carriers generated inside the semiconductor substrate in response to incident light flow into one region of the first and second doped regions. The blocking layer is disposed between the other region of the first and second doped regions and a second surface of the semiconductor substrate opposite to the first surface. The blocking layer configured to block the photo-carriers from flowing into the other region of the first doped region and the second doped region directly. The output circuit outputs an image signal according to a voltage signal outputted from the transistor.

Abstract: An image sensor comprises: a control block generating a video interface enabled signal, a video interface for receiving the video interface enabled signal, a pixel array for providing a video stream to the video interface, an output port for receiving the video stream from the video interface and outputting the video stream to outside of the image sensor, a stream indicator pin for receiving the video interface enabled signal from the control block when the video interface is receiving the video interface enabled signal from the control block, where a terminal of the video interface receiving the video interface enabled signal is connected to the stream indicator pin by a conductor, and they are sealed in a package of the image sensor.

Abstract: An image sensor comprises: a control block generating a video interface enabled signal, a video interface for receiving the video interface enabled signal, a pixel array for providing a video stream to the video interface, an output port for receiving the video stream from the video interface and outputting the video stream to outside of the image sensor, a stream indicator pin for receiving the video interface enabled signal from the control block when the video interface is receiving the video interface enabled signal from the control block, where a terminal of the video interface receiving the video interface enabled signal is connected to the stream indicator pin by a conductor, and they are sealed in a package of the image sensor.

Abstract: A method and apparatus for embedding a digital watermark in image content that is not visible to the human eye is performed on single-sensor digital camera images (often called ‘raw’ images) from a pixel-array. The raw image is transformed to generate preprocessed image coefficients, a watermark message is encrypted using a first key; the encrypted watermark message is randomized using a second key to form a watermark; and the watermark is embedded in randomly selected preprocessed image coefficients.

Abstract: An image sensor includes a semiconductor substrate and a multilayer film. The semiconductor substrate includes a photodiode and a back surface having a recessed region that surrounds the photodiode. The multilayer film is on, and conformal to, the recessed region, and includes N layer-groups of adjacent high-? material layers. Each pair of adjacent high-? material layers of a same layer-group of the N layer-groups includes (i) an outer-layer having an outer fixed-charge density and (ii) an inner-layer, located between the outer-layer and the recessed region, that has an inner fixed-charge density. Each of the outer and inner fixed-charge density is negative. The inner fixed-charge density is more negative than the outer fixed-charge density.

Abstract: A method for full interpolating green pixels from an input image having a first minimum repeating unit comprising 4×4 pixels, where 2×2 pixels of same color are grouped together, comprises down sampling of the input image to a first down sampled image, down sampling of the input image to a second down sampled image, and interpolating green pixels resulting in an interpolated green down sampled image, where the interpolating uses jointly the first down sampled image and the second down sampled image. The interpolated green pixels in an interpolated green down sampled image are further up sampled resulting in a full interpolated green image.

Abstract: An imaging system comprising a phase-detection image sensor comprising a plurality of phase-detection pixel units and a processor configured to: interpolate a green image to obtain a full resolution interpolated green image including defocused portions having artifacts and in-focus portions having sharp image, low-pass filter the full resolution interpolated green image to obtain a blurred image of the interpolated green image, combine the full resolution interpolated green image and the blurred image of the full resolution interpolated green image to obtain a corrected full resolution interpolated green image, where the artifacts of the defocused portions of the full resolution interpolated green image are removed, and the sharp image of the in-focus portions of the full resolution interpolated green image is unaffected.

Abstract: A sample and hold readout system and method for ramp analog to digital conversion is presented in which an optical array is read out using a sample and hold circuit such that each sample is used to charge a sample and hold capacitor and is read out during a hold phase using an amplifier that drives an ramp analog to digital converter. The sample and hold circuit transitions to a tracking phase wherein the optical array input drives an amplifier that drives the sample and hold capacitor then transitions to a sample phase where the sample and hold capacitor is connected to the optical array output directly.

Abstract: Transistors having nonplanar electron channels in the channel width plane have one or more features that cause the different parts of the nonplanar electron channel to turn on at substantially the same threshold voltage. Advantageously, such transistors have substantially uniform threshold voltage across the nonplanar electron channel. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.

Abstract: An imaging system including a sensor wafer and a logic wafer. The sensor wafer includes a plurality of pixels arranged in rows and columns, the plurality of pixels arranged in rows and columns and including at least a first pixel and a second pixel positioned in a first row included in the rows. The sensor wafer includes a first transfer control line associated with the first row, the first transfer control line coupled to both a first transfer gate of the first pixel and a second transfer gate of the second pixel. The logic wafer includes a first storage capacitor associated with the first pixel and a second storage capacitor associated with the second pixel, a first storage control line coupled to a first storage gate associated with the first pixel and a second storage control line coupled to a second storage gate associated with the second pixel.

Abstract: A flare-blocking image sensor includes large pixels and small pixels, a microlens, and an opaque element. The large pixels and small pixels form a first and second pixel array respectively, each having a pixel pitch Px and Py. The second pixel array is offset from the first pixel array by ½Px and ½Py. A first large pixel of the large pixels is between and collinear with a first and a second small pixel separated by ?{square root over (Px2+Py2)} in a first direction and each having a width W less than both pixel pitch Px and Py. The microlens is aligned with the first large pixel. The opaque element is between the first large pixel and the microlens and extends, in the first direction, less than 1 2 ? ( P x 2 + P y 2 - W ) from the first small pixel toward the second small pixel. The opaque element has a width perpendicular to the first direction not exceeding width W.

Abstract: An image sensor comprises a plurality of high sensitivity photoelectric conversion elements, a plurality of low sensitivity photoelectric conversion elements, and a processor for processing signals read out from the plurality of low sensitivity photoelectric conversion elements and the plurality of high sensitivity photoelectric conversion elements, where the processor is configured to read out signals from the plurality of low-sensitivity photoelectric conversion elements multiple times in a single frame after multiple exposures and obtain a plurality of images of low-sensitivity in the single frame at different times.

Abstract: An image sensor has diffractive microlenses over pixels with central structures and ring(s) of material having index of refraction different from that of background material. Disposed beneath the diffractive microlenses are photodiodes that permit determining ratios of illumination of peripheral photodiodes to illumination of central photodiodes of the pixels, and, in embodiments, circuitry for determining said ratio. In embodiments, the ratio is used to find illumination wavelengths; and in other embodiments the ratio is used to determine focus of an imaging lens providing illumination. A method determines color by passing light through a diffractive lens disposed above photodiodes of the diffractive pixel and determining color from illumination peripheral and central photodiodes. An autofocus method of determining focus includes passing light through a diffractive lens and determining focus from illumination of peripheral photodiodes and central photodiodes of the pixel.

Abstract: A dark-current-inhibiting image sensor includes a semiconductor substrate, a thin and a thin junction. The semiconductor substrate includes a front surface, a back surface opposite the front surface, a photodiode, and a concave surface between the front surface and the back surface. The concave surface extends from the back surface toward the front surface, and defines a trench that surrounds the photodiode in a cross-sectional plane parallel to the back surface. The thin junction extends from the concave surface into the semiconductor substrate, and is a region of the semiconductor substrate. The semiconductor substrate includes a first substrate region, located between the thin junction and the photodiode, that has a first conductive type. The photodiode and the thin junction have a second conductive type opposite the first conductive type.

Abstract: An image sensor for imaging fingerprints has multiple photodiode groups each with field of view through a microlens determined by optical characteristics of the microlens and locations of the microlens and openings of upper and lower mask layers. Many photodiode groups have fields of view outwardly splayed from a center-direct field of view. A diameter of openings of the upper mask layer distant from the group having a center-direct field of view is larger than openings of a photodiode group having a center-direct field of view. A method of matching illumination of a group of photodiodes with center-direct field of view to illumination of photodiode groups having outwardly splayed fields of view includes sizing openings in the upper mask layer of photodiode groups with outwardly splayed fields of view larger than openings in the upper mask layer associated with photodiode groups having center-direct field of view.

Abstract: A novel method for driving a digital display having a plurality of pixel rows includes receiving a frame of data to be written to the display in a predetermined frame time, dividing the frame time into a plurality of time intervals, defining a plurality of row groups, and defining a unique sequence for each row group to display corresponding multi-bit data words and a number of off states on the pixels of the rows of the row groups. The drive sequence of each row is offset with respect to an initial row by a unique predetermined number of off states. The predetermined numbers of off states ensure that the pixel updates of the groups do not overlap.

Abstract: An imaging device includes a pixel array of pixel circuits arranged in rows and columns. Bitlines are coupled to the pixel circuits. Clamp circuits are coupled to the bitlines. Each of the clamp circuits includes a clamp short transistor to a power line and a respective one of the bitlines. The clamp short transistor is configured to be switched in response to a clamp short enable signal. A first diode drop device is coupled to the power line. A clamp idle transistor is coupled to the first diode drop device such that the first diode drop device and the clamp idle transistor are coupled between the power line and the respective one of the bitlines. The clamp idle transistor is configured to be switched in response to a clamp idle enable signal.

Abstract: A reduced cross-talk pixel-array substrate includes a semiconductor substrate, a buffer layer, a metal annulus, and an attenuation layer. The semiconductor substrate includes a first photodiode region. A back surface of the semiconductor substrate forms a trench surrounding the first photodiode region in a cross-sectional plane parallel to a first back-surface region of the back surface above the first photodiode region. The buffer layer is on the back surface and has a feature located above the first photodiode region with the feature being one of a recess and an aperture. The metal annulus is on the buffer layer and covers the trench. The attenuation layer is above the first photodiode region.

Abstract: In an embodiment, an image sensor comprises a pixel array having a minimal repeating unit, where the minimal repeating unit consists of 4×4 pixels including 12 green pixels, 2 blue pixels, and 2 red pixels, where a minimal repeating unit is immediately next to another minimal repeating unit in row and column directions. In another embodiment, an image sensor comprises a pixel array having a minimal repeating unit, where the minimal repeating unit consists of 8×8 pixels including 48 green pixels, 8 blue pixels, and 8 red pixels.