Patents Assigned to OmniVision Technologies
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Publication number: 20240282789Abstract: An image sensor comprises an image sensor chip comprising a semiconductor substrate having a top surface and a plurality of microlenses disposed on the top surface; a cover glass having a first side in contact with air and a second side opposite to the first side; and a multi-layer structure disposed between the plurality of microlenses and the cover glass, which comprises: a bottom layer directly in contact with the plurality of microlenses, where the refractive index of the bottom layer is lower than the refractive index of the plurality of microlenses, and a top layer directly in contact with the second side of the cover glass, where the top layer is an optical glue made for bonding two optical elements.Type: ApplicationFiled: February 21, 2023Publication date: August 22, 2024Applicant: OmniVision Technologies, Inc.Inventors: Xiaowei Wang, Yin Qian, Zhiqiang Lin, Lindsay Grant
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Patent number: 12064090Abstract: A cavity interposer has a cavity, first bondpads adapted to couple to a chip-type camera cube disposed within a base of the cavity at a first level, the first bondpads coupled through feedthroughs to second bondpads at a base of the interposer at a second level; and third bondpads adapted to couple to a light-emitting diode (LED), the third bondpads at a third level. The third bondpads coupled to fourth bondpads at the base of the interposer at the second level; and the second and fourth bondpads couple to conductors of a cable with the first, second, and third level different. An endoscope optical includes the cavity interposer an LED, and a chip-type camera cube electrically bonded to the first bondpads; the LED is bonded to the third bondpads; and a top of the chip-type camera cube and a top of the LED are at a same level.Type: GrantFiled: October 18, 2021Date of Patent: August 20, 2024Assignee: OmniVision Technologies, Inc.Inventors: Teng-Sheng Chen, Wei-Ping Chen, Jau-Jan Deng, Wei-Feng Lin, Chun-Sheng Fan
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Publication number: 20240275906Abstract: An image sensor includes a pixel array including at least one light-shielded area where no light enters and an imaging area where light enters, wherein each pixel includes a photoelectric conversion element, a black level processing unit that corrects an output of each pixel in the imaging area, and a memory that stores a predetermined black level reference for each pixel in the imaging area. The processing unit calculates a Slope, which is determined by an average output value at imaging of pixels in the at least one light-shielded area taken during imaging and a reference average output value of pixels in the at least one light-shielded area under certain conditions taken prior to imaging, and correct an output of each pixel in the imaging area using the predetermined black level reference and the Slope.Type: ApplicationFiled: February 14, 2023Publication date: August 15, 2024Applicant: OmniVision Technologies, Inc.Inventors: Masao Sambongi, Nobuhiro Yanagisawa
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Patent number: 12062673Abstract: A curved-surface image-sensor assembly has a porous carrier having a concave surface with a thinned image sensor bonded by an adhesive to its concave surface of the porous carrier; the porous carrier is mounted into a water-resistant package. The sensor assembly is made by fabricating a thinned, flexible, image-sensor integrated circuit (IC) and applying adhesive to a non-illuminated side of the IC; positioning the IC over a concave surface of a porous carrier; applying vacuum through the porous carrier to suck the IC onto the concave surface of the porous carrier; and curing the adhesive to bond the IC to the concave surface of the porous carrier.Type: GrantFiled: November 2, 2021Date of Patent: August 13, 2024Assignee: OmniVision Technologies, Inc.Inventors: Chun-Sheng Fan, Wei-Feng Lin
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Patent number: 12047694Abstract: A pixel array includes pixel circuits including a first pixel circuit having first and second split floating diffusions receiving charge from first and third photodiodes through first and third transfer transistors, and from second and fourth photodiodes through second and fourth transfer transistors, respectively. A first shared gate structure includes gates of first transfer transistors of first and second pixel circuits. A third shared gate structure includes gates of third transfer transistors of the first and second pixel circuits. A second shared gate structure includes gates of second transfer transistors of first and third pixel circuit. A fourth shared gate structure includes gates of fourth transfer transistors the first and third pixel circuits. A dual floating diffusion transistor is coupled between the first and second split floating diffusions and the third and fourth split floating diffusions to bin charges in the first, second, third, and fourth floating diffusions.Type: GrantFiled: October 31, 2022Date of Patent: July 23, 2024Assignee: OmniVision Technologies, Inc.Inventor: Sangjoo Lee
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Patent number: 12035060Abstract: A stacked image sensor includes a signal-processing circuitry layer, a pixel-array substrate, a heat-transport layer, and a thermal via. The signal-processing circuitry layer includes a conductive pad exposed on a circuitry-layer bottom surface of the signal-processing circuitry layer. The pixel-array substrate includes a pixel array and is disposed on a circuitry-layer top surface of the signal-processing circuitry layer. The circuitry-layer top surface is between the circuitry-layer bottom surface and the pixel-array substrate. The heat-transport layer is located between the signal-processing circuitry layer and the pixel-array substrate. The thermal via thermally couples the heat-transport layer to the conductive pad.Type: GrantFiled: November 5, 2021Date of Patent: July 9, 2024Assignee: OmniVision Technologies, Inc.Inventors: Zhiyong Zhan, Yin Qian
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Patent number: 12005890Abstract: A failure detection circuit for an image sensor includes a first input node, an array of second input nodes, and an output stage. The first input node is coupled to a reference voltage. The array of second input nodes has each input node coupled to receive a signal from a bitline of a bitline array in an image sensor that includes an array of pixels with each pixel is coupled to at least one bitline of the bitline array. The output stage is coupled to generate an output voltage indicative of any of the second input nodes being lower than the reference voltage.Type: GrantFiled: April 1, 2022Date of Patent: June 11, 2024Assignee: OmniVision Technologies, Inc.Inventors: Zhenfu Tian, Liang Zuo, Yan Li, Wen He, Satoshi Sakurai
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Publication number: 20240187751Abstract: The pixel circuit of the image sensor includes one or more photoelectric conversion elements that generates charges in response to incident light, a first capacitance that receives and stores the charges generated in the one or more photoelectric conversion elements, a second capacitance that is connected to the first capacitance via a switch, and a comparator that compares the amount of charges stored in the first capacitance with a predetermined value. The second capacitance is connected to the first capacitance via the switch, and the pixel circuit includes a comparator that compares the amount of the charges stored in the first capacitance with a predetermined value. When the amount of the charges accumulated in the first capacitance in the comparator is greater than the predetermined value, the switch is turned on and the charges are accumulated by the capacitance that is the sum of the first capacitance and the second capacitance.Type: ApplicationFiled: July 27, 2023Publication date: June 6, 2024Applicant: OmniVision Technologies, Inc.Inventors: Hiroki Ui, Eiichi Funatsu
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Patent number: 11991458Abstract: An arithmetic logic unit (ALU) includes a front end latch stage coupled to a signal latch stage coupled to a Gray code (GC) to binary stage. First inputs of an adder stage are coupled to receive outputs of the GC to binary stage. Outputs of the adder stage are generated in response to the first inputs and second inputs of the adder stage. A pre-latch stage is coupled to latch outputs of the adder stage. A feedback latch stage is coupled to latch outputs of the pre-latch stage. The second inputs of the adder stage are coupled to receive outputs of the feedback latch stage. The feedback stage includes first conversion gain feedback latches configured to latch outputs of the pre-latch stage having a first conversion gain and second conversion gain feedback latches configured to latch outputs of the pre-latch stage having a second conversion gain.Type: GrantFiled: September 21, 2022Date of Patent: May 21, 2024Assignee: OmniVision Technologies, Inc.Inventors: Lihang Fan, Nijun Jiang, Rui Wang
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Patent number: 11991465Abstract: Low power event driven pixels with passive, differential difference detection circuitry (and reset control circuits for the same) are disclosed herein. In one embodiment, an event driven pixel comprises a photosensor, a photocurrent-to-voltage converter, and a difference circuit. The difference circuit includes (a) a first circuit branch configured to sample a reference light level based on a voltage output by the photocurrent-to-voltage converter, and to output a first analog light level onto a first column line that is based on the reference light level; and (b) a second circuit branch configured to sample a light level based on the voltage, and to output a second analog light level onto a second column line that is based on the light level. A difference between the second analog light level and the first analog light level indicates whether the event driven pixel has detected an event in an external scene.Type: GrantFiled: July 27, 2022Date of Patent: May 21, 2024Assignee: OmniVision Technologies, Inc.Inventors: Andreas Suess, Shoushun Chen
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Patent number: 11985435Abstract: A compact camera includes an image sensor, a transparent layer, and a microlens (ML) layer, between the image sensor and the transparent layer. The ML layer forms (a) a first ML array having a plurality of first MLs, and (b) a second ML array with a plurality of second MLs interleaved with the plurality of first MLs. The compact camera also includes a baffle layer, between the ML layer and the image sensor, that forms a plurality of first aperture stops each aligned with a different one of the first MLs and a plurality of second aperture stops each aligned with a different one of the second MLs. The first MLs each have a first set of optical characteristics and the second MLs each have a second set of optical characteristics that are different from the first set of optical characteristics.Type: GrantFiled: June 8, 2022Date of Patent: May 14, 2024Assignee: OmniVision Technologies, Inc.Inventor: Shih-Hsin Hsu
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Patent number: 11984463Abstract: A flare-reducing image sensor includes a plurality of pixels, NP in number, and a plurality of microlenses, NML in number, where each of the plurality of microlenses is aligned to a respective one of the plurality of pixels, such that NP=NML. The flare-reducing image sensor further includes a plurality of phase-shifting layers, NL, in number, where each phase-shifting layer is aligned with a respective one of the plurality of microlenses, where NL, is less than or equal to NML.Type: GrantFiled: September 1, 2021Date of Patent: May 14, 2024Assignee: OmniVision Technologies, Inc.Inventors: Qin Wang, Chao Niu
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Patent number: 11984464Abstract: Examples of the disclosed subject matter propose disposing trench isolation structure around the perimeter of the pixel transistor region of the pixel cell. The trench isolation structure includes front side (e.g., shallow and deep) trench isolation structure and back side deep trench isolation structure that abut against or contacts the bottom of front side deep trench isolation structure for isolating the pixel transistor channel of the pixel cell's pixel transistor region. The formation and arrangement of the trench isolation structure in the pixel transistor region forms a floating doped well region, containing, for example, a floating diffusion (FD) and source/drains (e.g., (N) doped regions) of the pixel transistors. This floating P-well region aims to reduce junction leakage associated with the floating diffusion region of the pixel cell.Type: GrantFiled: July 8, 2020Date of Patent: May 14, 2024Assignee: OmniVision Technologies, Inc.Inventors: Seong Yeol Mun, Yuanliang Liu
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Patent number: 11985437Abstract: A time-of-flight pixel array includes photodiodes that generate charge in response to incident reflected modulated light. First transfer transistors transfer a first portion of the charge from the photodiodes in response to a first modulation signal and second transfer transistors transfer a second portion of the charge from the photodiodes in response to a second modulation signal, which is an inverted first modulation signal. First floating diffusions are coupled to the first transfer transistors. A binning transistor is coupled between one of the first floating diffusions and another one of the first floating diffusions. A first memory node is coupled to one of the first floating diffusions through a first sample and hold transistor and a second memory node is coupled to another one of the first floating diffusions through a second sample and hold transistor.Type: GrantFiled: November 3, 2021Date of Patent: May 14, 2024Assignee: OmniVision Technologies, Inc.Inventors: Andreas Suess, Zheng Yang
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Patent number: 11973098Abstract: An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing area of the image sensor forms an inclined surface.Type: GrantFiled: October 26, 2022Date of Patent: April 30, 2024Assignee: OmniVision Technologies, Inc.Inventors: Wei-Feng Lin, En-Chi Li, Chi-Chih Huang
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Patent number: 11967602Abstract: A multi-pixel detector of an image sensor is described. The multi-pixel detector includes a first photodiode region disposed within a semiconductor substrate to form a first pixel, a second photodiode region disposed within the semiconductor substrate to form a second pixel adjacent to the first pixel, and a partial isolation structure extending from a first side of the semiconductor substrate towards a second side of the semiconductor substrate between the first photodiode region and the second photodiode region. A length of a lateral portion of the partial isolation structure between the first photodiode region and the second photodiode region is less than a lateral length of the first photodiode region.Type: GrantFiled: June 15, 2020Date of Patent: April 23, 2024Assignee: OmniVision Technologies, Inc.Inventors: Chun-Yung Ai, Kazufumi Watanabe, Chih-Wei Hsiung, Vincent Venezia
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Patent number: 11948965Abstract: An uneven-trench pixel cell includes a semiconductor substrate that includes a floating diffusion region, a photodiode region, and, between a front surface and a back surface: a first sidewall surface, a shallow bottom surface, a second sidewall surface, and a deep bottom surface. The first sidewall surface and a shallow bottom surface define a shallow trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A shallow depth of the shallow trench exceeds a junction depth of the floating diffusion region. The second sidewall surface and a deep bottom surface define a deep trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A distance between the deep bottom surface and the front surface defines a deep depth, of the deep trench, that exceeds the shallow depth.Type: GrantFiled: April 1, 2021Date of Patent: April 2, 2024Assignee: OmniVision Technologies, Inc.Inventors: Hui Zang, Gang Chen
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Patent number: 11943525Abstract: An electronic camera assembly includes a camera chip cube bonded to camera bondpads of an interposer; at least one light-emitting diode (LED) bonded to LED bondpads of the interposer at the same height as the camera bondpads; and a housing extending from the interposer and LEDs to the height of the camera chip cube, with light guides extending from the LEDs through the housing to a top of the housing. In embodiments, the electronic camera assembly includes a cable coupled to the interposer. In typical embodiments the camera chip cube has footprint dimensions of less than three and a half millimeters square.Type: GrantFiled: February 17, 2022Date of Patent: March 26, 2024Assignee: OmniVision Technologies, Inc.Inventors: Teng-Sheng Chen, Wei-Ping Chen, Jau-Jan Deng, Wei-Feng Lin
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Patent number: 11892654Abstract: A passive speckle-suppressing diffuser includes a microlens array for diffusing a light field originating from one or more coherent light beams, and a diffractive optical element mounted in series with the microlens array and having a pixelated thickness distribution, characterized by a spatial variation across the diffractive optical element, to impose a spatially varying phase shift on the light field. The pixelated thickness distribution may be configured such that the spatially varying phase shift suppresses speckle of the light field while minimizing introduction of distinct diffraction structure.Type: GrantFiled: October 7, 2019Date of Patent: February 6, 2024Assignee: OmniVision Technologies, Inc.Inventors: Shih-Hsin Hsu, Jau-Jan Deng, Wei-Ping Chen
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Patent number: 11869906Abstract: A pixel cell with an elevated floating diffusion region is formed to reduce diffusion leakage (e.g., gate induced drain leakage, junction leakage, etc.). The floating diffusion region can be elevated by separating a doped floating diffusion region from the semiconductor substrate by disposing an intervening layer (e.g., undoped, lightly doped, etc.) on the semiconductor substrate and beneath the doped floating diffusion region. For instance, the elevated floating diffusion region can be formed by stacked material layers composed of a lightly or undoped base or intervening layer and a heavy doped (e.g., As doped) “elevated” layer. In some examples, the stacked material layers can be formed by first and second epitaxial growth layers.Type: GrantFiled: July 2, 2020Date of Patent: January 9, 2024Assignee: OmniVision Technologies, Inc.Inventors: Seong Yeol Mun, Heesoo Kang