Patents Assigned to Omron Tateisi Electronic Co.
  • Patent number: 5408307
    Abstract: In a cell analyze apparatus, a light beam is irradiated onto cells (or particles like the cells) flowing through a flow cell so as to measure cell light information for each cell with respect to a plurality of parameters (for example, the forward scattered light intensity, the right angle scattered light intensity and the intensity of fluorescence by different dye). Based on a minimal point of a histogram associated with the cell light information with respect to one or more parameters, the cell population is subdivided into fractions. When the minimal point is missing in the histogram, the parameters above are converted by use of a predetermined conversion expression (for example, a coordinate conversion is effected on the parameters) such that a minimal point is detected from the histogram of cell light information related to the new parameters obtained by the conversion, thereby subdividing an objective cell population.
    Type: Grant
    Filed: July 11, 1989
    Date of Patent: April 18, 1995
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Koji Yamamoto, Masahiro Hanafusa, Michio Nishimura, Yoshihiro Nakatsuji, Fumio Onuma, Shinichi Hirako, Kunio Kaede
  • Patent number: 5401950
    Abstract: An IC card is provided with a data storage area for storing data, an identification code area for storing a plurality of identification codes and directories for storing information indicating which of the identification codes is an identification code authorized to access the data.When an identification code and information for identifying data are applied so as to make access to a data area in the IC card from the outside of the IC card, the IC card references the directories, recognizes which of the identification codes is an identification code authorized to access data, corresponding to the externally applied information for identifying data, and determines whether or not the identification code corresponds to the externally applied identification code.
    Type: Grant
    Filed: February 18, 1992
    Date of Patent: March 28, 1995
    Assignee: Omron Tateisi Electronics Co.
    Inventor: Hiroya Yoshida
  • Patent number: 5392444
    Abstract: A programable controller includes a cycle time setter, a counter, and a calculator. The cycle time setter sets a cycle time for one round of execution of a sequential series of processing routines. The counter counts an execution time between the start of a first predetermined processing routine of the series and the termination of a second predetermined processing routine of the series subsequent to the first. The time difference between the execution time counted by the counter and the cycle time is calculated and, if positive, is allocated to execution of the remainder of the processing routines in the series.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: February 21, 1995
    Assignee: Omron Tateisi Electronics Co.
    Inventor: Tadashi Inoue
  • Patent number: 5367610
    Abstract: In a fuzzy controller comprising a fuzzy inference device for subjecting one or a plurality of input signals to fuzzy inference operations using membership functions in accordance with a predetermined rule and outputting a non-fuzzy value determined on the basis of the results of the inferences, there are provided an input signal level converter for converting signal levels of the input signals on the input side of the fuzzy inference device and an output signal level converter for converting a signal level of the output signal on the output side of the fuzzy inference device.
    Type: Grant
    Filed: September 26, 1989
    Date of Patent: November 22, 1994
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Yutaka Ohtsubo, Kazuaki Urasaki, Yoshiro Tasaka, Atushi Hisano
  • Patent number: 5363472
    Abstract: A fuzzy reasoning computer comprising an input controller, fuzzy rule storage, fuzzy rule register, rule controller and a fuzzy reasoning unit. The fuzzy reasoning computer further comprises rule selection components for selecting a fuzzy rule, address generating components for converting fuzzy rule data into addresses, and accessing components responsive to said addresses for accessing at least one of input data and output data and membership functions. The accessing components including the function of accessing input data from a second reasoning computer.
    Type: Grant
    Filed: April 22, 1993
    Date of Patent: November 8, 1994
    Assignee: Omron Tateisi Electronics Co.
    Inventor: Atsushi Hisano
  • Patent number: 5347615
    Abstract: Applicable rules (IF-THEN rules) are generated with use of predetermined membership functions concerning input and output variables in response to entry of input and output values. Accordingly, time and labor required to make rules can be simplified. In addition, it can be also verified, by making fuzzy inferences according to the generated rules, whether or not the rules are appropriate.
    Type: Grant
    Filed: June 18, 1993
    Date of Patent: September 13, 1994
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Takeshi Yamakawa, Tsutomu Ishida
  • Patent number: 5345336
    Abstract: An imaging device is formed by a transparent substrate having opposite surfaces on which are formed a plurality of micro aspherical lenses. The axes of the lenses on one surface coincide with the axes of respective lenses on the other surface. A two-dimensional micro lens array constructed by arranging converging lenses having a diameter of approximately several to several hundred micrometers is arranged ahead of a light source, thereby forming a multi-beam spot caused by diffraction in a distant position. A three-dimensional shape can be recognized with high precision by shape recognition means utilizing this multi-beam spot.
    Type: Grant
    Filed: June 16, 1992
    Date of Patent: September 6, 1994
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Shigeru Aoyama, Tsukasa Yamashita, Shiro Ogata
  • Patent number: 5341323
    Abstract: A programmable multi-membership function circuit comprises at least one or preferably two Z function circuits, at least one or preferably two S function circuits, and a fuzzy logic circuit for calculating fuzzy logic from the output of the Z function circuits and the output of the S function circuits. The fuzzy logic circuit comprises a MIN (intersection) circuit and a MAX (union) circuit, or the combination of these circuits.
    Type: Grant
    Filed: December 2, 1991
    Date of Patent: August 23, 1994
    Assignee: Omron Tateisi Electronics Co.
    Inventor: Takeshi Yamakawa
  • Patent number: 5313198
    Abstract: A first device (1) and a second device (2) can be communicated by an electromagnetic coupling. Data to be transmitted from the first device to the second device is converted into pulse signals of different duty ratios in accordance with the H or L level of the transmission data. Further, the oscillation of an oscillator (15) of the first device is intermittently performed in accordance with the H/L level of the pulse signal. Switching elements (39, 40) are provided for a resonance circuit (30) provided in the second device. When data is transmitted from the second device to the first device, the switching elements are turned on or off in accordance with the data. Thus, the electromagnetic coupling is intermittently performed. The oscillator of the first device at that time intermittently executes the oscillation at a third duty ratio.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: May 17, 1994
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Iichi Hirao, Kazunori Morikawa, Hisato Fujisaka, Ryoichi Miyake
  • Patent number: 5264687
    Abstract: There is provided an optical card processing apparatus comprising: a card holder which is supported to a guiding mechanism so as to be reciprocated and is formed with an optical card holding portion on a lower surface; a card loading/ejecting mechanism, arranged at a card inserting port, for detecting an optical card and for attaching and detaching the optical card to and from the optical card holding portion of the card holder. A card inclination correcting mechanism is arranged for the card holder, for making a track line direction of the optical card coincide with a moving direction of the card holder. A card transfer mechanism in which a pair of pulleys are arranged along a moving path of the card holder, an endless belt is wound between the pair of pulleys, a proper portion of the belt is coupled with the card holder, and one of the pulleys is coupled with a drive motor which rotates in a single direction.
    Type: Grant
    Filed: December 12, 1989
    Date of Patent: November 23, 1993
    Assignee: Omron Tateisi Electronics, Co.
    Inventors: Sadao Sugiyama, Yoshihito Koshiba, Takeshi Ishida, Takeshi Takakura
  • Patent number: 5263170
    Abstract: A monitor circuit is provided, which includes a data storage unit having dummy data stored therein, a buffer circuit connected to the output of the data storage unit, a coincidence circuit for comparing the data on the I/O bus connected between the buffer circuit and I/O units with the dummy data of the data storage unit, and a flag circuit for setting an abnormal flag responsive to the non-coincidence output from the coincidence circuit. During the I/O refresh of a PC, such an abnormal flag is set in response to a disturbance of the I/O bus. The I/O refresh is repeatedly performed in the event the flag is set.
    Type: Grant
    Filed: June 1, 1990
    Date of Patent: November 16, 1993
    Assignee: Omron Tateisi Electronics, Co.
    Inventor: Yukio Kato
  • Patent number: 5249258
    Abstract: A fuzzy reasoning computer having a multi-stage construction is disclosed which includes a primary fuzzy reasoning computer at a rank having a reasoning system for producing a reasoned result, at least one child fuzzy reasoning computer at a lower rank having a reasoning system for producing a reasoning result and a system for providing the reasoning results of the at least one child fuzzy reasoning computer to the reasoning system of the primary fuzzy reasoning computer in such a manner that the reasoning performed by the primary fuzzy reasoning computer is assisted by the at least one child fuzzy reasoning computer.
    Type: Grant
    Filed: April 9, 1992
    Date of Patent: September 28, 1993
    Assignee: Omron Tateisi Electronics Co.
    Inventor: Atsushi Hisano
  • Patent number: 5247291
    Abstract: Disclosed herein is a display to be applied to a digital switch. This display includes a casing (1) formed of a box-type casing (2) and a cover (3), a display element (8) facing a display window (2b) accommodated in the casing (1), a printed wiring board (9) for supporting the display element (8), and a printed wiring board (14) which is connected to the printed wiring board (9) and on which a control circuit (16) for displaying an external input signal on the display element (8), and the like are mounted. At the front portion of the casing (1) is formed frames 11a and 11b extending over a display face (8) of the display element (8), and thus a portion of the printed wiring board (9) which is located at the outer periphery of the display element (8) cannot be seen from the outside. A conductive pattern (18) for discharging a static electricity is provided on the printed wiring board (9), corresponding to a region in which the frames (11a, 11b) engaged with each other.
    Type: Grant
    Filed: November 13, 1989
    Date of Patent: September 21, 1993
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Shoji Kazusaka, Kouji Ohmori, Sawako Ehara
  • Patent number: 5243687
    Abstract: A fuzzy computer system has: a digital processor; a digital memory; a fuzzy inference processing circuit; and an interface for the fuzzy inference processing circuit. The digital memory stores programs executed by the digital processor and inference rules used by the fuzzy inference processing circuit. The fuzzy inference processing circuit executes a fuzzy inference on the basis of a given inference rule. The interface connects the digital processor and the fuzzy inference processing circuit through a bus. The digital processor gives the inference rules stored in the digital memory to the fuzzy inference processing circuit through the interface and fetches the result of the inference of the fuzzy inference processing circuit through the interface.
    Type: Grant
    Filed: September 13, 1989
    Date of Patent: September 7, 1993
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Tanichi Ando, Kazuaki Urasaki
  • Patent number: 5243335
    Abstract: A local area network system in which a logical ring is formed by at least part of said node stations to pass a token frame from one station to another in an endless and cyclic fashion allowing each of said node stations which has received is allowed to transmit data, and said data comprises event data. Since only the stations holding the token are allowed to transmit cyclic data and event data, each station is not required to be equipped with a monitoring timer so that not only the LAN can be constructed economically but also transmission efficiency can be improved through speed up in determining the completion of data transmission.
    Type: Grant
    Filed: August 6, 1992
    Date of Patent: September 7, 1993
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Tetsuo Kato, Shigemi Tanabe, Chiaki Koshiro
  • Patent number: 5239620
    Abstract: Applicable rules (IF-THEN rules) are generated with use of predetermined membership functions concerning input and values. Whether the rules are appropriate is verified by making fuzzy inferences according to the generated rules with at least one of the rules temporarily excluded.
    Type: Grant
    Filed: August 6, 1992
    Date of Patent: August 24, 1993
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Takeshi Yamakawa, Tsutomu Ishida
  • Patent number: 5227993
    Abstract: A multivalued Arithmetic Logic Unit (ALU) is composed of a multivalued signal source, a memory array, a selection array, an AND array and an output circuit. The multivalued signal source generates signals each of which represents a logic value of multivalued logic. The memory array is provided with an address line group for each and every function to be inplemented, each address line group comprising a number of address lines. Which multivalued logic signals will appear on the address lines of each address line group depends upon a program based on the truth table of the corresponding function. Any one of the plural address line groups is selected by the selection array, to which a signal designating the function to be implemented is applied. One address line in the selected address line group is selected by the AND array, which has an input signal applied thereto, and the logic value signal on the selected line is delivered via the output circuit.
    Type: Grant
    Filed: March 5, 1991
    Date of Patent: July 13, 1993
    Assignee: Omron Tateisi Electronics Co.
    Inventor: Takeshi Yamakawa
  • Patent number: 5218966
    Abstract: In an electronic blood pressure meter for measuring blood pressure from a finger, there is provided a photoelectric sensor including a light emitting element and a light receiving element for detecting pulse wave components from a finger placed in a cuff. Since the variation of the DC component of the pulse wave from one person to another may exceed the linear range of pulse wave measurement, the brightness level of the light emitting element is adjusted according to the level of the DC component contained in the output from the light receiving element. Thereby, favorable extraction of the variational component of the pulse wave is made always within an accurate range of pulse wave measurement.
    Type: Grant
    Filed: December 19, 1991
    Date of Patent: June 15, 1993
    Assignees: Omron Tateisi Electronics Co., Isao Kai
    Inventor: Tsutomu Yamasawa
  • Patent number: 5218579
    Abstract: A numerical value setting device which accomplishes a numberical value setting or registering operation whether a power supply is interrupted or restored during its operation has a set value registering timer. The set value registering timer defines a period at the end of which the set value is registered. The set value registering timer counts different period clock pulses depending on the states of the power supply to assure that the correct numerical value is registered.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: June 8, 1993
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Kiyotaka Tomioka, Hiroyuki Yamamoto, Hideaki Tanaka
  • Patent number: RE34642
    Abstract: A high frequency R-F switch includes a switch body of housing made from a conductive material or a non-conductive resin having a conductive layer plated on the body surfaces. The switching device includes a first external connector, a first conductor having a switching contact member connected to the first external connector for switching a connection with the switch contact member. A conductive housing .[.supports.]. .Iadd.houses .Iaddend.the first conductor, .Iadd.and connects to .Iaddend.a second external connector and second conductor. The switch body or housing is in electrical connection with the second external conductor.
    Type: Grant
    Filed: June 23, 1992
    Date of Patent: June 21, 1994
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Kozo Maenishi, Masaaki Adachi, Yoshihide Bando