Patents Assigned to ON Semiconductor
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Publication number: 20200401373Abstract: The present disclosure relates to a computing system. The computing system comprises a data input configured to receive an input data signal, a computation unit having an input coupled with the data input, the computation unit being operative to apply a weight to a signal received at its input to generate a weighted output signal, and a controller. The controller is configured to monitor a parameter of the input signal and/or a parameter of the output signal and to issue a control signal to the computation unit to control a level of accuracy of the weighted output signal based at least in part on the monitored parameter.Type: ApplicationFiled: May 14, 2020Publication date: December 24, 2020Applicant: Cirrus Logic International Semiconductor Ltd.Inventor: John Paul LESSO
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Publication number: 20200402853Abstract: A semiconductor structure is provided. The semiconductor structure includes a gate structure over a fin structure. The semiconductor structure also includes a source/drain structure in the fin structure and adjacent to the gate structure. The semiconductor structure also includes a first contact plug over the source/drain structure. The semiconductor structure also includes a first via plug over the first contact plug. The semiconductor structure also includes a dielectric layer surrounding the first via plug. The first via plug includes a first group IV element and the dielectric layer includes the first group IV element and a second group IV element.Type: ApplicationFiled: August 31, 2020Publication date: December 24, 2020Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung-Po HSIEH, Su-Hao LIU, Hong-Chih LIU, Jing-Huei HUANG, Jie-Huang HUANG, Lun-Kuang TAN, Huicheng CHANG, Liang-Yin CHEN, Kuo-Ju CHEN
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Publication number: 20200400803Abstract: Various sensors, sensor controllers, and sensor control methods are provided with model-based sideband balancing. In one illustrative embodiment, a controller for a piezoelectric transducer includes a transmitter, a receiver, and a processing circuit coupled to the transmitter and receiver. The processing circuit performs calibration and echo detection, the calibration including: sensing the piezoelectric transducer's phase response as a function of frequency; deriving equivalent circuit parameters for the piezoelectric transducer from the phase response; and determining a sideband imbalance based on one or more of the equivalent circuit parameters. Once the sideband imbalance is identified, the processing circuit may perform echo-detection processing that accounts for the sideband imbalance.Type: ApplicationFiled: December 23, 2019Publication date: December 24, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Tomas SUCHY, Jiri KANTOR, Marek HUSTAVA
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Publication number: 20200404415Abstract: A method, comprising: obtain one or more accelerometer signals derived from an accelerometer; and determining one or more parameters of wind at the accelerometer based on the one or more accelerometer signals.Type: ApplicationFiled: June 19, 2019Publication date: December 24, 2020Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Vitaliy SAPOZHNYKOV, Thomas I. HARVEY, Hock LIM, David WATTS
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Publication number: 20200401049Abstract: A method for adhering a reticle onto a top surface of a chuck is provided in accordance with some embodiments of the present disclosure. The method includes sliding a reticle relative to a chuck along a first direction, such that a plurality of fibers over a top surface of the chuck are inclined away from an imaginary line normal to the top surface of the chuck by sliding the reticle relative to the chuck along the first direction; performing a photolithography process using the reticle; and after performing the photolithography process, sliding the reticle relative to the chuck along a second direction opposite to the first direction, such that the fibers are moved back toward the imaginary line by sliding the reticle relative to the chuck along the second direction.Type: ApplicationFiled: September 4, 2020Publication date: December 24, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Ming SHIH, Chi-Hung LIAO
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Publication number: 20200403083Abstract: A semiconductor structure and a formation method thereof are provided. In one form, the method includes: providing a base; patterning the base to form a substrate and discrete fins and pseudo fins which protrude from the substrate, wherein the fins are located in a device region, and the pseudo fins are located in isolation regions; removing the pseudo fins in the isolation regions; forming isolation layers on the substrate exposed by the fins, wherein the isolation layers cover part of the side walls of the fins; and thinning the isolation layers in the isolation regions, wherein the remaining isolation layers in the isolation regions are regarded as target isolation layers, and the surfaces of the target isolation layers are lower than the surfaces of the isolation layers between the discrete fins.Type: ApplicationFiled: August 30, 2019Publication date: December 24, 2020Applicants: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) CorporationInventor: Nan WANG
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Publication number: 20200399533Abstract: The present application provides an electroluminescent material, a method for manufacturing the electroluminescent material, and a light emitting device, the asymmetric monocyanopyrazine of the pyrene nucleus of the electroluminescent material is used as an acceptor, and the pyrene nucleus has a large plane and rigid P-type delayed fluorescence characteristic, which can combine triplet excitons via triplet excitons-triplet excitons to enhance utilization of excitons, thereby to achieve an electroluminescent material, a method for manufacturing the electroluminescent material, and a light emitting device, to realize an electroluminescent material and a light emitting device with a high quantum efficiency.Type: ApplicationFiled: September 11, 2019Publication date: December 24, 2020Applicant: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.Inventor: Yanjie WANG
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Publication number: 20200401859Abstract: Visibility of a license plate and color reproducibility of a vehicle body are improved in a monitoring camera. A vehicle body area detection unit detects a vehicle body area of a vehicle from an image signal. A license plate area detection unit detects a license plate area of the vehicle from the image signal. A vehicle body area image processing unit performs processing of the image signal corresponding to the detected vehicle body area. A license plate area image processing unit performs processing different from the processing of the image signal corresponding to the vehicle body area on the image signal corresponding to the detected license plate area. A synthesis unit synthesizes the processed image signal corresponding to the vehicle body area and the processed image signal corresponding to the license plate area.Type: ApplicationFiled: September 4, 2020Publication date: December 24, 2020Applicant: Sony Semiconductor Solutions CorporationInventor: Kazuhiro Hoshino
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Publication number: 20200403095Abstract: A method for forming a multi-gate semiconductor device includes forming a fin structure including alternating stacked first semiconductor layers and second semiconductor layers over a substrate, forming a dummy gate structure across the fin structure, forming a first spacer alongside the dummy gate structure, removing a first portion of the first spacer to expose the dummy gate structure, forming a second spacer between a second portion of first spacer and the dummy gate structure after removing the first portion of the first spacer, removing the dummy gate structure to expose a sidewall of the second spacer, removing the first semiconductor layers of the fin structure to form a plurality of nanostructures from the second semiconductor layers of the fin structure, and forming a gate conductive structure to wrap around the plurality of nanostructures. The gate conductive structure is in contact with the sidewall of the second spacer.Type: ApplicationFiled: September 3, 2020Publication date: December 24, 2020Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: I-Sheng CHEN, Tzu-Chiang CHEN, Cheng-Hsien WU, Ling-Yen YEH, Carlos H. DIAZ
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Publication number: 20200402947Abstract: A package structure and method of forming the same are provided. The package structure includes a die, a first dielectric layer, a second dielectric layer and a conductive terminal. The first dielectric layer covers a bottom surface of the die and includes a first edge portion and a first center portion in contact with the bottom surface of the die. The first edge portion is thicker than the first center portion. The second dielectric layer is disposed on the first dielectric layer and laterally surrounding the die. The second dielectric layer includes a second edge portion on the first edge portion and a second center portion in contact with a sidewall of the die. The second edge portion is thinner than the second center portion. The conductive terminal is disposed over the die and the second dielectric layer and electrically connected to the die.Type: ApplicationFiled: September 8, 2020Publication date: December 24, 2020Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Feng Yeh, Hsien-Wei Chen, Ming-Fa Chen
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Publication number: 20200402911Abstract: A semiconductor device package includes a first substrate, a second substrate disposed over the first substrate, and a surface mount device (SMD) component disposed between the first substrate and the second substrate. The SMD component includes a plurality of connection electrodes electrically connecting the first substrate to the second substrate, and the plurality of connection electrodes are electrically disconnected from each other.Type: ApplicationFiled: June 19, 2019Publication date: December 24, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chang-Lin YEH, Jen-Chieh KAO
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Publication number: 20200404124Abstract: A skin color image gamut weight detecting method and a device thereof are provided. The method includes: receiving an image including first color components and second color components; obtaining a skin color region, a skin color category, and a first gamut; obtaining first color component values and first cardinal numbers according to the first color components; obtaining second color component values and a plurality of second cardinal numbers according to the second color components; obtaining a second gamut and a weight center according to the skin color category, the first cardinal numbers, the second cardinal numbers, the first color component values, and the second color component values; obtaining a first weight area and a second weight area according to the first gamut and the second gamut; and obtaining a skin color gamut weight map according to the weight center, the first weight area, and the second weight area.Type: ApplicationFiled: December 23, 2019Publication date: December 24, 2020Applicant: REALTEK SEMICONDUCTOR CORP.Inventors: Teng-Hsiang Yu, Hiroaki ENDO
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Publication number: 20200403016Abstract: A highly sensitive imaging device that can perform imaging even under a low illuminance condition is provided. One electrode of a photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of a first transistor and one of a source electrode and a drain electrode of a third transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other electrode of the photoelectric conversion element is electrically connected to a first wiring. A gate electrode of the first transistor is electrically connected to a second wiring. When a potential supplied to the first wiring is HVDD, the highest value of a potential supplied to the second wiring is lower than HVDD.Type: ApplicationFiled: September 1, 2020Publication date: December 24, 2020Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Yoshiyuki KUROKAWA
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Publication number: 20200403075Abstract: A device includes a nanowire, a gate dielectric layer, a gate electrode, a gate pickup metal layer, and a gate contact. The nanowire extends in a direction perpendicular to a top surface of a substrate. The gate dielectric layer laterally surrounds the nanowire. The gate electrode laterally surrounds the gate dielectric layer. The gate pickup metal layer is in contact with a bottom surface of the gate electrode and extends laterally past opposite sidewalls of the gate electrode. The gate contact is in contact with the gate pickup metal layer.Type: ApplicationFiled: August 29, 2020Publication date: December 24, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yung-Chih WANG, Yu-Chieh LIAO, Tai-I YANG, Hsin-Ping CHEN
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Publication number: 20200403623Abstract: A phase-locked loop (PLL) and a method for calibrating a VCO therein are provided. The PLL comprises a frequency-phase detector, a charge pump, a loop filter, a VCO, a divider and a calibration circuit. The calibration circuit is used to acquire a frequency of an output signal of the VCO, to calibrate the frequency of the output signal according to an expected frequency, and to acquire frequency control parameters of the VCO at the current signal frequency. The amplitude and gain of the output signal are kept constant according to the amplitude control parameters and gain control parameters. The PLL can meet the demands on frequencies of multiple protocols and can adaptively look up and stabilize the suitable frequency. It solves the issue that the amplitude of the output signal of the VCO is not constant when the PLL operates in a large frequency range.Type: ApplicationFiled: June 23, 2020Publication date: December 24, 2020Applicant: GOWIN Semiconductor CorporationInventors: Qiming WU, Xiaozhi LIN, Qiang ZHOU, Yunfeng WANG
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Publication number: 20200404512Abstract: A method may include obtaining multiple first parameters associated with a wireless network. The first parameters include one or more environment-specific parameters and one or more packet-specific parameters. The method may include generating a metric from a combination of the first parameters. The method may include, in response to determining to adjust the performance of the wireless network based on the metric, determining one or more operating parameters to adjust. The method may include adjusting the performance of the wireless network by adjusting the one or more operating parameters.Type: ApplicationFiled: April 23, 2020Publication date: December 24, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Sam HEIDARI, Kamlesh RATH, Raghuram RANGARAJAN
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Publication number: 20200403168Abstract: An organic light-emitting diode (OLED) display panel and a display device are provided. The OLED display panel includes a substrate, a driving circuit layer formed on a side of the substrate, a light-emitting material layer formed on a side of the driving circuit layer away from the substrate, a sensing unit formed on another side of the substrate away from the driving circuit layer and configured to receive light reflected by a fingerprint surface. In a fingerprint identifying region of the OLED display panel, the substrate includes a through hole, and the light emitted from the light-emitting material layer and reflected by the fingerprint surface travels through the through hole and arrivals the sensing unit.Type: ApplicationFiled: August 15, 2019Publication date: December 24, 2020Applicant: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventor: Wenqi LI
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Publication number: 20200402945Abstract: A bonding structure and a method for manufacturing the same. First edge trimming is performed from the bonding surface of an n-th wafer in bonding the n-th wafer and an (n?1)th wafer, and a width of the first edge trimming is Wn. As n increases, the width of the first edge trimming is gradually increased. In the trimming, a portion that is not even at the edge of the n-th wafer can be removed. The bonding surface of the n-th wafer faces the bonding surface of the (n?1)-th wafer, so as to bond the n-th wafer and the (n?1)-th wafer. Afterwards the substrate of the n-th wafer is thinned, so as to form the (n?1)-th wafer stack. There is a reduced possibility that a gap exists between the bonding interfaces of the wafers, a bonding strength between the wafers is improved, and a risk of cracking is reduced.Type: ApplicationFiled: September 25, 2019Publication date: December 24, 2020Applicant: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.Inventor: Tian ZENG
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Publication number: 20200404509Abstract: An apparatus is provided. The apparatus comprises a controller configured to operate in an access point (AP) mode. The apparatus also includes a processing device. The processing device is configured to transmit a signal to one or more stations (STAs) to prevent the one or more STAs from using a frequency band. The frequency band is shared by the one or more STAs and a radio. The processing device is also configured to detect that the frequency band is available for use by at least one STA of the one or more STAs to transmit uplink signals to the controller without interfering with the radio; and in response, transmit a trigger frame to the at least one STA to schedule the at least one STA to transmit the uplink signals to the controller using the frequency band.Type: ApplicationFiled: June 18, 2019Publication date: December 24, 2020Applicant: Cypress Semiconductor CorporationInventor: Rajendra Kumar Gundu Rao
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Publication number: 20200404148Abstract: An image outputting method and an electronic device are provided. The method includes: shooting a scene by using a plurality of different exposure durations to obtain a plurality of images respectively; performing a summation operation according to the images to obtain a first image; adjusting a first brightness of the first image to an output brightness to generate a second image; respectively converting pixel values of a plurality of first pixels in the second image into other corresponding pixel values in another value domain to generate an output image; and outputting the output image.Type: ApplicationFiled: June 20, 2020Publication date: December 24, 2020Applicant: Altek Semiconductor Corp.Inventors: Bo-Wei Jiang, Hsiao-Min Wang, Jing-Yu Huang