Patents Assigned to One Design, Inc.
  • Publication number: 20090273392
    Abstract: Embodiments of the present invention address kT/C noise, sampled high frequency operational amplifier noise, and charge injection errors sampled on switching capacitors and introduced due to internal switching. Correlated double sampling compensates for DC offset and low frequency operational amplifier noise, and the use of fake integration and a capacitor divider eliminate or significantly reduce kT/C noise, sampled high frequency operational amplifier noise, and charge injection errors.
    Type: Application
    Filed: May 1, 2008
    Publication date: November 5, 2009
    Applicant: Custom One Design, Inc.
    Inventors: Oleg Korobeynikov, Joseph M. Kulinets, Vladimir Protasov, Peter R. Nuytkens
  • Publication number: 20090273386
    Abstract: Methods and apparatus for improved current-to-voltage integrators reducing charge injection and kT/C errors from capacitor switching and intrinsic operational amplifier noise (i.e., offset, 1/f noise, thermal noise) during the reset cycle of the integrator, simultaneously reducing demands on the reference voltage source, using correlated double sampling to compensate for DC offset and low frequency op-amp noises, and “fake” integration and a capacitor divider to eliminate or significantly reduce kT/C noise and charge injection.
    Type: Application
    Filed: May 1, 2008
    Publication date: November 5, 2009
    Applicant: Custom One Design, Inc
    Inventors: Oleg Korobeynikov, Joseph M. Kulinets, Vladimir Protasov, Peter R. Nuytkens
  • Patent number: 7557742
    Abstract: Methods and apparatus for the conversion of analog signals into digital signals using second order or higher sigma-delta modulators in pipelined or cyclic architectures.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: July 7, 2009
    Assignee: Custom One Design, Inc.
    Inventors: Joseph M. Kulinets, Peter R. Nuytkens, Oleg Korobeynikov
  • Patent number: 7449412
    Abstract: Methods of electroless plating metal on a dielectric material includes dipping the dielectric in a solution containing attractive catalytic metal particles and a metal salt solution. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. Electrical circuits and multichip modules including such circuits can be formed having one or more dielectric layers comprised of latex and one or more layers of conductive leads, one or more dielectric layers comprised of a flexible dielectric material, and one or more layers of electrically conductive material patterned to interconnect such ICs. Frames that hold ICs against a substrate may be employed to planarize their top surfaces against the substrate, as well as standard photolithographic techniques in creating conductive paths on the dielectric material between the ICs.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: November 11, 2008
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ilya E. Popeko, Joseph M. Kulinets
  • Publication number: 20080157295
    Abstract: Methods and apparatus for multichip modules having improved shielding and isolation properties.
    Type: Application
    Filed: December 20, 2007
    Publication date: July 3, 2008
    Applicant: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Noureddine Hawat, Joseph M. Kulinets
  • Publication number: 20080159438
    Abstract: Methods and apparatus for signal transmission utilizing directly modulated frequency shift keying. Embodiments of the present invention provide a fractional (non-integer) N oscillator to directly modulate a baseband signal for transmission using a programmable digital raised cosine generator, providing a tunable Gaussian FSK transmitter.
    Type: Application
    Filed: December 20, 2007
    Publication date: July 3, 2008
    Applicant: Custom One Design, Inc.
    Inventors: Joseph M. Kulinets, Peter R. Nuytkens
  • Publication number: 20080158031
    Abstract: Methods and apparatus for the conversion of analog signals into digital signals using second order or higher sigma-delta modulators in pipelined or cyclic architectures.
    Type: Application
    Filed: December 20, 2007
    Publication date: July 3, 2008
    Applicant: Custom One Design, Inc.
    Inventors: Joseph M. Kulinets, Peter R. Nuytkens, Oleg V. Korobeynikov
  • Publication number: 20080100393
    Abstract: A direct conversion RF transceiver (2) and ASIC having an on-chip voltage controlled oscillator operating frequency that is half of the transmitter (4) and/or receiver (6) operating frequency, the VCO (20) being comprised of a plurality of synchronized LC oscillators (92A-D) introducing precise phase shifts that eliminate frequency ambiguity. The transceiver incorporates several low power circuits, including on-chip a power converter switchably coupling a capacitor (42) to a power supply (45) and to an electrical load (40), multiple switchable low dropout regulators (60A, B) each coupled to alternate power supplies (62,64) and having electrical components (67A, B) for setting the bandwidth of the respective low dropout regulator. The transceiver also includes a FSK digital modulator utilizing a circuit-implemented polynomial piecewise approximation (71) of a raised cosine signal.
    Type: Application
    Filed: May 2, 2005
    Publication date: May 1, 2008
    Applicant: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Joseph M. Kulinets
  • Publication number: 20070155176
    Abstract: Methods of electroless plating metal on a dielectric material includes dipping the dielectric in a solution containing attractive catalytic metal particles and a metal salt solution. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. Electrical circuits and multichip modules including such circuits can be formed having one or more dielectric layers comprised of latex and one or more layers of conductive leads, one or more dielectric layers comprised of a flexible dielectric material, and one or more layers of electrically conductive material patterned to interconnect such ICs. Frames that hold ICs against a substrate may be employed to planarize their top surfaces against the substrate, as well as standard photolithographic techniques in creating conductive paths on the dielectric material between the ICs.
    Type: Application
    Filed: February 15, 2007
    Publication date: July 5, 2007
    Applicant: Custom One Design, Inc.
    Inventors: Peter Nuytkens, Ilya Popeko, Joseph Kulinets
  • Patent number: 7231707
    Abstract: Method of forming a ferromagnetic layer on at least one surface of a dielectric material that may be serve as an inductive core on a printed circuit board or a multichip module. Conductive leads can form two separate coils around the core to form a transformer, and a planar conducing sheet can be placed on or between one or more of the dielectric layers as magnetic shielding. The core can be formed at least in part by electroless plating, and electroplating can be used to add a thicker layer of less conductive ferromagnetic material. Ferromagnetic layers are formed by dipping the dielectric surface in a solution containing catalytic metal particles having a slight dipole, and placing the surface in a metal salt to cause a layer containing metal to be electrolessly plated upon the dielectric. Surface roughening techniques can be used before the dipping to help attract the catalytic particles.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: June 19, 2007
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ilya E. Popeko, Joseph M. Kulinets
  • Patent number: 7179742
    Abstract: Methods of electroless plating metal on a dielectric material includes dipping the dielectric in a solution containing attractive catalytic metal particles and a metal salt solution. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. Electrical circuits and multichip modules including such circuits can be formed having one or more dielectric layers comprised of latex and one or more layers of conductive leads, one or more dielectric layers comprised of a flexible dielectric material, and one or more layers of electrically conductive material patterned to interconnect such ICs. Frames that hold ICs against a substrate may be employed to planarize their top surfaces against the substrate, as well as standard photolithographic techniques in creating conductive paths on the dielectric material between the ICs.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: February 20, 2007
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ilya E. Popeko, Joseph M. Kulinets
  • Patent number: 7099379
    Abstract: Systems and methods for the communication and recovery of supplementary data encoded in the primary information transmitted from a source to a receiver for both audio and television transmissions. The method includes modulating a carrier signal with the supplementary data using a spread spectrum approach and demodulating the carrier signal to recover the embedded supplementary data.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: August 29, 2006
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ahmed Mitwalli
  • Patent number: 7042952
    Abstract: Circuitry for transmitting signals through a transformer has an output transistor and circuitry which provides a controlled current to and from the output transistor's gate, so as to charge and discharge the gate's parasitic capacitance and increase and decrease the transistor's output current in a controlled manner. Feedback can be used to sense an output signal created by the transistor and turn off current to or from the transistor's gate when the output signal has reached a desired level. The output signal can be the voltage differential produced across an output transformer, and, where the output transformer is center-tapped, it can be the voltage differential across both halves of the center tapped winding.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: May 9, 2006
    Assignee: Custom One Design, Inc.
    Inventor: Michael C. Murphy
  • Publication number: 20050153061
    Abstract: Methods of electroless plating metal on a dielectric material includes dipping the dielectric in a solution containing attractive catalytic metal particles and a metal salt solution. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. Electrical circuits and multichip modules including such circuits can be formed having one or more dielectric layers comprised of latex and one or more layers of conductive leads, one or more dielectric layers comprised of a flexible dielectric material, and one or more layers of electrically conductive material patterned to interconnect such ICs. Frames that hold ICs against a substrate may be employed to planarize their top surfaces against the substrate, as well as standard photolithographic techniques in creating conductive paths on the dielectric material between the ICs.
    Type: Application
    Filed: December 13, 2004
    Publication date: July 14, 2005
    Applicant: Custom One Design, Inc.
    Inventors: Peter Nuytkens, Ilya Popeko, Joseph Kulinets
  • Publication number: 20050018756
    Abstract: Systems and methods for the communication and recovery of supplementary data encoded in the primary information transmitted from a source to a receiver for both audio and television transmissions. The method includes modulating a carrier signal with the supplementary data using a spread spectrum approach and demodulating the carrier signal to recover the embedded supplementary data.
    Type: Application
    Filed: July 7, 2004
    Publication date: January 27, 2005
    Applicant: Custom One Design, Inc.
    Inventors: Peter Nuytkens, Ahmed Mitwalli
  • Patent number: 6838750
    Abstract: An electrical circuit having one or more dielectric layers formed of latex; and one or more layers of electrically conductive material, such as copper, patterned to form multiple electrical interconnects, with each such layer placed on top of one of said dielectric layers. The dielectric and conductive layers can be used to connect multiple chips in a multichip module. The latex layers can be formed to have a top surface that contains peaks and valleys, and the conductive layers can be formed of a first metal that substantially fills such valleys, so as to increase the adherence of the metal to the latex surface. The layers of conductive metal can contain particles of a second metal between said peaks and valleys of the latex layer that were used as a catalytic seed particles to promote the deposition of the metal layer onto the top surface of the latex.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: January 4, 2005
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ilya E. Popeko, Joseph M. Kulinets
  • Patent number: 6765950
    Abstract: Systems and methods for the communication and recovery of supplementary data encoded in the primary information transmitted from a source to a receiver for both audio and television transmissions. The method includes modulating a carrier signal with the supplementary data using a spread spectrum approach and demodulating the carrier signal to recover the embedded supplementary data.
    Type: Grant
    Filed: April 1, 1999
    Date of Patent: July 20, 2004
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ahmed Mitwalli
  • Patent number: 6696910
    Abstract: A printed circuit board has two layers of printed circuit board dielectric material; a core made of ferromagnetic material between the two layers; and conductive leads on the opposite side of each dielectric layer from the core connected by via holes through both dielectric layers to form a conducting coil around the core. The conductive leads can form two separate coils around the core to form a transformer. A planar conducing sheet can be placed on or between one or more of the printed circuit board's dielectric layers to shield other circuitry on the printed circuit board from magnetic fields generated around the core. The core can be formed at least in part by electroless plating. Electroplating can be used to add a thicker layer of less conductive ferromagnetic material.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: February 24, 2004
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ilya E. Popeko, Joseph M. Kulinets
  • Patent number: 6552555
    Abstract: An integrated circuit testing apparatus includes a probe card and a probe unit. The probe unit includes a plurality of conductive elastic bumps and a plurality of conductors positioned to conduct signals from the bumps to the probe card. The testing apparatus can further includes a substrate disposed between the probe card and the probe unit, and a flexible member disposed adjacent the substrate.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: April 22, 2003
    Assignee: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Lev Bromberg, Patrick G. Dannen, Andrew D. Miller, Ahmed Mitwalli, Robert A. Most
  • Publication number: 20030011049
    Abstract: A method for plating metal on a dielectric material includes dipping the dielectric in a solution containing catalytic metal particles. These particles have a dipole which helps them attach to the dielectric's surface. The dielectric's surface can be roughened to make it more attractive to such particles. The dielectric material is then placed in a metal salt solution that causes metal to be plated upon the dielectric by electroless plating. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. This or other methods can be used to make an electrical circuit having one or more dielectric layers comprised of latex and one or more layers of conductive leads. A multichip module can be made which includes a plurality of integrated circuits mounted on a substrate; one or more dielectric layers comprised of a flexible dielectric material; and one or more layers of electrically conductive material patterned to interconnect such ICs.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 16, 2003
    Applicant: Custom One Design, Inc.
    Inventors: Peter R. Nuytkens, Ilya E. Popeko, Joseph M. Kulinets