Patents Assigned to OPTIS CIRCUIT TECHNOLOGY, LLC
  • Patent number: 9847901
    Abstract: A method and an apparatus determine a time of start of series of OFDM symbols forming an OFDM packet, wherein one or more symbols of the OFDM signal includes a plurality of copies of a short training sequence made of a plurality of time-domain samples. The method includes determining a coarse time index, determining a fine time index, and determining the time of start of each OFDM symbols based on the fine time index. The coarse time-domain sample of the coarse time index is within a coarse estimation error interval, and the time-domain samples of the coarse estimation error interval are converted into frequency domain samples. A metric value is determined for each frequency domain samples, and the fine time index is the time index corresponding to one of the coarse estimation error interval having its associated frequency domain sample having the lowest metric value.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: December 19, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventor: Achraf Dhayni
  • Patent number: 9810584
    Abstract: A temperature sensor includes two branches, each branch having at least a first transistor and a second transistor connected as diodes and cascaded, so that an emitter of the first transistor is connected to a collector of the second transistor of the same branch. The temperature source also includes a current source configured to provide a current to the two branches, and an analog-to-digital convertor. The analog-to-digital convertor is connected to capture a voltage between emitters of the first transistors or of the second transistors, and is configured to convert said voltage to a digital temperature signal.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: November 7, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventors: Jukka Kohola, Marko Pessa
  • Patent number: 9781439
    Abstract: A method of encoding video data including a sequence of digital image frames, in a pipelined processing system is provided. The method includes dividing each frame in the sequence into a plurality of sections, each section including a horizontal band across a frame. The method further includes subdividing each section into a plurality of macroblocks, and encoding a representation of each macroblock in each section to form an output stream. The sections of each frame are processed during adjacent steps in a pipeline of the pipelined processing system.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: October 3, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventors: Valerie Pierson, Vincent Migeotte
  • Patent number: 9779482
    Abstract: A method allows changing an image raster direction from an application raster direction to a screen raster direction, in-flight while pixel values of an image are transferred successively from an application output memory to a display unit. A single buffer memory array is implemented between the application output memory and the display unit. Two writing orders for cells of the buffer memory array are used in turn, each being combined with a different reading order for the cells. The method can be hardware-implemented, and is adapted for burst-handling of the pixel values.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: October 3, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventor: Gilles Ries
  • Patent number: 9729209
    Abstract: A Near Field Communication method performed by a tag reader detects whether a tag is present. The method includes stimulating the tag reader's transmitter to generate an impulse response, evaluating the impulse response generated by the transmitter to obtain an evaluated impulse response, and assessing whether a tag is present based on the evaluated impulse response.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: August 8, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventor: Achraf Dhayni
  • Patent number: 9729377
    Abstract: A method for determining a symbol boundary in a data packet belonging to a received OFDM signal is provided. The data packet includes a first training filed and a second training field, which begins with a guard interval. The method includes detecting the beginning of the data packet, and starting an automatic gain control process. The method further includes, after the automatic gain control process is locked, determining autocorrelation peaks and estimating the symbol boundary from times of the autocorrelation peaks.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: August 8, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventor: Achraf Dhayni
  • Patent number: 9729205
    Abstract: There is described a method for establishing an NFC connection between a subscriber identity module (SIM) and an NFC device (RDR). The subscriber identity module (SIM) is connected to a telecommunications system (CELL_P) through contacts (VCC, RST, CLK, D+, GND, SWP, IO, D?) of the telecommunications system (CELL_P). The telecommunications system (CELL_P) comprises a chipset (CHP) and an NFC circuit (NFCC). The method comprises measuring the level of charge of a battery (BATT) powering the telecommunications system (CELL_P) with a battery gauge. Based on the measurement, the method selects the source for supplying power to the subscriber identity module (SIM) and configures the wiring of the subscriber identity module (SIM). The disclosure also relates, in particular, to a telecommunications system, to a computer program, and to a storage medium.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: August 8, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventors: Pierre-Jean Pietri, Bruno Delplanque
  • Patent number: 9729271
    Abstract: The present invention relates to method and apparatus for uplink data transmission, a user equipment, a computer program and a storage medium. The method comprises: acquiring a data error rate of data blocks transmitted on an uplink of a UE; constructing a new data block, wherein a size of the new data block is smaller than the size of the transmitted data block currently, if the block error rate is greater than a threshold; and transmitting the new data block on the uplink of the UE according to a first power currently allocated to the UE. The present invention can enhance the performance of uplink data transmission.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: August 8, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventor: Yu Liu
  • Patent number: 9727497
    Abstract: In an embedded system, there are a plurality of data requesting devices, a plurality of data sources and a bus fabric interconnecting the data requesting devices and the data sources, wherein the bus fabric comprises a plurality of bus components. Some or all of the data sources and arbitration devices associated with the bus components resolve contentions between data bursts by selecting a first one of the contending data bursts; determining a length of a critical section of the first selected data burst; and processing the critical section of the selected data burst. Then, a second one of the contending data bursts is selected, a length of a critical section of the second selected data burst is determined, and the critical section of the second selected data burst is processed before a non-critical section of the selected data burst.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: August 8, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventor: Rowan Nigel Naylor
  • Patent number: 9720470
    Abstract: The present invention relates to a method for controlling the operation of an electronic device for processing data, said device comprising at least one computational unit for receiving input data and processing said input data for generating output data, and further comprising a control unit for receiving at least a part of said input data and delivering at least one control signal to said at least one computational unit for controlling the operation of said at least one computational unit, characterized in said control unit using said input data to determine a computational effort and further using said control signal to control parameters of said at least one computational unit depending on said computational effort, wherein said parameters comprise a combination of: clock rate and/or supply voltage; and process complexity.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: August 1, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventors: Erik G. Larsson, Oscar Gustafsson
  • Patent number: 9716383
    Abstract: A system for delivering a voltage to at least one power domain has at least one component. Each power domain functions according to at least two operating points, each operating point requiring a distinct supply voltage. The system includes at least two power supply units, alternatively delivering controllable supply voltages. The system also includes a control unit that selects one of the power supply units to be connected to a power domain, based on a current operating point of the power domain. The control unit also controls the supply voltage delivered by the selected power supply unit, to deliver the required voltage level associated with the current operating point of the power domain.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: July 25, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventors: Laurent Meunier, Anders Carlsson, Tomas Olsson
  • Patent number: 9709608
    Abstract: A system for measuring an output current of a DC-to-DC converter with a transistor power stage includes a voltage measuring circuit and an impedance. The voltage measuring circuit, which is connected to the output of the power stage of the DC-to-DC converter, measures an average voltage drop on impedances of the transistors of the power stage. The impedance, which is connected to an output of the voltage measuring circuit, reproduces the impedances of the transistors of the power stage and is traversed by a scaled version of the current output of the voltage measuring circuit.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: July 18, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventor: Vratislav Michal
  • Patent number: 9705400
    Abstract: An output stage configuration with four configurable input/output terminals and four switches is specified. Each switch has a first main terminal, a second main terminal and a control terminal, which receives a control signal for controlling the open or closed state of the switch. The output stage is included in a circuit together with a first control apparatus and a second control apparatus. When a control stage of the first control apparatus is connected to the output stage, a control stage of the second control apparatus is electrically disconnected from the output stage, and the output stage operates in a first operating state. When the control stage of the second control apparatus is connected to the output stage, the control stage of the first control apparatus is electrically disconnected from the output stage, the output stage then operating in a second operating state.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: July 11, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventors: Philippe Sirito-Olivier, Patrizia Milazzo, Angelo Nagari
  • Patent number: 9693272
    Abstract: An efficient way is described for a user equipment, camping on a cell of a first radio access technology, RAT, to perform measurements on the transmissions from a neighboring radio cell of a different RAT. Recurrent time gaps that are available for making the measurements are not correlated or synchronized with the recurrent times at which the desired information are transmitted by the transmitter in the second RAT. Therefore, mapping is performed of the time gaps onto the interval at which the desired information is transmitted. The mapping continues until a time interval is covered that ensures that the information in the recurring desired block of information can be obtained. During the mapping of the measurement gaps, only those time intervals that have not already been covered by the mapping are used for obtaining the desired information.
    Type: Grant
    Filed: November 28, 2013
    Date of Patent: June 27, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventors: Suyog Moogi, Sreelakshmi Gollapudi, Pankaj Jaiswal
  • Patent number: 9690616
    Abstract: Methods and devices for determining load on a computing device involve scheduling at least one idle thread for execution during a first sleep time of a predefined reference interval and, determining a natural load at a lapse of the first sleep time. If the natural load equals or exceeds a fixed load requirement for the predefined reference interval, a second sleep time is scheduled for the remainder of the predefined reference interval. If, instead, the natural load is less than the fixed load requirement and a fixed load time for the fixed load requirement equals the remainder of the predefined reference interval, an artificial load is generated for the remainder of the predefined reference interval.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: June 27, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventor: Shyam Prakash
  • Patent number: 9679145
    Abstract: The present invention relates to a method of managing switching from a first mode of operation to a second mode of operation a first processor in a processing device which comprises at least one other processor and a controller processor. The method comprises receiving a message which comprises a request to switch the first processor from a first to a second mode of operation; deciding whether the switching is appropriate; and upon decision of switching, switching the first processor from a first mode of operation to a second mode of operation according to the selected type of switching.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: June 13, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventors: Gilles Gallet, Julie Gonin, Nicolas Mareau, Claire Verilhac
  • Patent number: 9681394
    Abstract: A method for power control and a user equipment, UE, determine a current power control mode of the UE based on an adjustment trend of the UE with respect to signal transmission power of a base station, and a variation trend of the received signal quality. A target value of the received signal quality of inner-loop power control is reset after the power control mode of the UE tends to normal, so as to return the transmission power of the base station to the UE to a normal level as soon as possible, thereby to inhibit adverse influences caused by the windup effect.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: June 13, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventors: Zhen Huang, Xie Li, Wenxue Yang
  • Patent number: 9661639
    Abstract: An apparatus (300) for use in a telecommunications system is disclosed. The apparatus (300) comprises a memory (340) and a controller (310). The apparatus (300) is configured to receive a radio frequency signal (150), determine an operating parameter and adapt a first filter function according to at least said operating parameter. The apparatus (300) is further configured to generate a filtered signal (720, 820, 730, 830) by applying said first filter function to a signal associated with the received radio frequency signal and provide said filtered signal (720, 82, 70, 830) for radio resource management.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: May 23, 2017
    Assignee: Optis Circuit Technology, LLC
    Inventors: Ali Nader, Bengt Lindoff
  • Patent number: 9645837
    Abstract: A method in a Just-In-Time, JIT, compiler for compiling code in a JIT-compiler for a heterogeneous multiprocessor system is provided. The method comprises compiling a snippet of input code, whereby one or more compiled code snippets are generated for the snippet of input code. The one or more compiled code snippets are tagged with one or more snippet specific characteristics. One or more compiled code snippets are selected from the compiled code snippets, based on said snippet specific characteristics. The one or more selected compiled code snippets are executed on one or more of the plurality of processors. While executing, run-time data is gathered, where the gathered data is tagged for which processor in the heterogeneous multiprocessor system it is related to.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: May 9, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventor: Andreas Anyuru
  • Patent number: 9641362
    Abstract: A receiver for an N-wire digital interface, where N is any integer exceeding two, has N input terminals, a common node and N detection stages. Each of the N detection stages has a resistive element coupled between the common node and a respective one of the N input terminals, and a comparator having a first input coupled to the respective one of the N input terminals and a second input coupled to the common node.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: May 2, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventor: Kimmo Koli