Abstract: A gate driving unit of a gate driving circuit includes a pull-up node control circuit configured to control a potential of a pull-up node, a pull-down node control circuit including a pull-down node control transistor electrically connected to a pull-down node, and a gate driving output circuit configured to control a gate driving signal under the control of voltage signals of the pull-up node and the pull-down node. The pull-down node control circuit controls the potential of a pull-down node under the control of a control voltage signal, a fixed voltage signal, and a voltage signal of the pull-up node. The control voltage signal of the gate is less than the fixed voltage signal of the drain of the pull-down node control transistor, or the fixed voltage signal of the gate is less than the control voltage signal of the drain of the pull-down node control transistor.

Abstract: A light emitting diode is provided. The light emitting diode includes: a semiconductor stack, including a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer; a first insulating layer, formed on the semiconductor stack; a reflective electrode layer, partially formed on the first insulating layer, wherein a minimum distance between an edge of the reflective electrode layer and the semiconductor stack is a fourth distance, and the fourth distance is in a range of 1 ?m to 5 ?m; and a fourth insulating layer, formed on the reflective electrode layer, wherein the fourth insulating layer is aluminum oxide.

Abstract: A method for fabricating an organic light emitting display panel includes: forming an anode-material layer on a base plate, forming a mask on one side of the anode-material layer away from the base plate, and performing patterning treatment to the anode-material layer by using the mask, to form multiple anodes; and forming a pixel definition layer covering the mask and the base plate, and performing patterning treatment to the pixel definition layer and the mask at the same time, to form a multiple pixel defining components, wherein the pixel defining components cover parts of the base plate located between two neighboring anodes, and cover part of surfaces of the anodes; and a material forming the mask and a material forming the pixel definition layer are the same, each of the pixel defining components includes a first part formed by the mask, and a second part formed by the pixel definition layer.

Abstract: A method for making light emitting device LED arrays includes the steps of providing a plurality of LEDs having a desired configuration (e.g., VLED, FCLED, PLED); attaching the LEDs to a carrier substrate and to a temporary substrate; forming one or more metal layers and one or more insulator layers configured to electrically connect the LEDs to form a desired circuitry; and mounting additional devices on the desired circuitry to form a second circuitry level; performing the mounting step multiple times to form a plurality of electronic products that include the additional devices and the second circuitry level; and separating the LEDs from the carrier substrate and the temporary substrate.

Abstract: A termite monitoring and killing system includes a plurality of termite monitoring and killing devices, where the plurality of termite monitoring and killing devices are distributed and buried in termite infested areas, and are configured to lure termites into the devices to feed, acquire a termite feeding image regularly, and deliver termite insecticide powder according to user requirements. According to the present disclosure, baits are buried in the area where there may be termites after being placed in the termite monitoring and killing device, so as to induce foraging termites to enter. Termite images in the termite monitoring and killing device are acquired regularly, so that termite image data is transmitted to a monitoring information processing platform to be processed and analyzed through a data relay station.

Abstract: Disclosed are a semiconductor epitaxial structure, a preparation method thereof, and a light-emitting diode. The semiconductor epitaxial structure includes a buffer layer, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer that are sequentially arranged on a substrate. The material of the buffer layer is AlxInyGa(1-x-y)N, wherein 0x and 0?y. The buffer layer is doped with carbon impurities. The doping concentration of the carbon impurities in the buffer layer is lower than 9E17 atoms/cm3. The present invention grows the buffer layer using a high-temperature growth method. The buffer layer has a lower defect density and a lower content of carbon impurities, making it more possible to facilitate enhancement of the lattice quality of the subsequent epitaxial structure and improve the luminous efficiency and anti-aging capability of the light-emitting diode.

Abstract: The disclosure relates to a light emitting diode and a light emitting device. The light-emitting diode includes an epitaxial structure, a P-type window layer, a transparent conductive layer, and an N-type electrode. The epitaxial structure includes a P-type semiconductor layer, a light emitting layer, and an N-type semiconductor layer stacked in sequence. The P-type window layer is disposed under the P-type semiconductor layer, the transparent conductive layer is disposed under the P-type window layer, and the N-type electrode is disposed on the N-type semiconductor layer, in which a current density of the light-emitting diode is defined as J A/cm2, a minimum spacing between a projection of the N-type electrode on the N-type semiconductor layer and a projection of the P-type window layer on the N-type semiconductor layer is L ?m, and a range of L:J is 0.3 to 1.5. The wall-plug-efficiency and quality of the light-emitting diode can be improved.

Abstract: A three-dimensional-image display device includes a display unit that sequentially displays parallax images; a variable focus lens unit that respectively forms virtual images of each of the parallax images on display surfaces; and a control unit that distributes, in accordance with a position of a stereoscopic image, a luminance of the stereoscopic image to a luminance of the parallax images. In a case in which the position of the stereoscopic image is a first position positioned between a closest display surface and a farthest display surface, the control unit changes, in accordance with the distance between an observer and the stereoscopic image, a distribution ratio for distributing the luminance of the stereoscopic image to the luminance of the parallax images.

Abstract: A polarization modulation device includes a polarization modulation element including a plurality of liquid crystal cells, and a controller that applies voltage to each of the plurality of liquid crystal cells. In a case in which an average value of the angle of the alignment axis of the light incident-side substrate and the angle of the alignment axis of the light emitting-side substrate in each of the plurality of liquid crystal cells is defined as an average alignment angle, the controller applies a voltage that is higher than a voltage applied to the other liquid crystal cells to the liquid crystal cell for which the absolute value of the difference between 45° and the average alignment angle is smallest.

Abstract: The bonding method of a micro-light emitting diode chip includes providing a backplane, and two solder columns are formed on electrodes of each chip bonding area of the backplane; forming a glue groove in the chip bonding area, forming a glue layer in the glue groove to make the glue layer cover tops of the solder columns; moving the chip to make positive and negative electrodes of the chip aligned with the two solder columns respectively; heating the backplane to make the glue layer melt into liquid glue; making positive and negative electrodes of the chip immersed in the liquid glue; after cooling to a room temperature, making the positive electrode and the negative electrode of the chip adhered to the two solder columns respectively; removing a transfer head; soldering the positive electrode and the solder column adhered together, and the negative electrode and the solder column adhered together.

Abstract: A display panel, a driving method thereof, and a display apparatus. The display panel includes a shift register circuit including shift units. The shift unit includes a first output circuit, a control circuit, and a first node. In a first mode, a display region includes a first sub-region refreshed with a first frequency and a second sub-region refreshed with a second frequency. The shift register circuit includes a first unit group and a second unit group. In some frames, the first and second unit groups output an active scanning level, and in some frames, the control circuit in a first shift unit supplies a non-enabling level to the first node at least after the first unit group outputs the active scanning level. The first shift unit is located in the second unit group and is adjacent to the first unit group.

Abstract: Disclosed are an infrared light-emitting diode, an infrared light-emitting diode package, and a light-emitting device. The infrared light-emitting diode includes a semiconductor epitaxial lamination layer, a first electrode, and an adhesion layer. The semiconductor epitaxial lamination layer includes a first type semiconductor layer, an active layer, and a second type semiconductor layer. The first type semiconductor layer includes a first ohmic contact layer, a first window layer, and a first cladding layer. The first electrode located on the first type semiconductor includes a main electrode and multiple extending electrodes. The extending electrodes extend outward from the main electrode. The adhesion layer is located between the first window layer and the main electrode.

Abstract: Provided is a method for manufacturing an array substrate. The method includes: providing a base substrate with a conductive pattern layer, wherein the base substrate is provided with a display region and a peripheral region disposed around the display region, wherein the conductive pattern layer includes a plurality of conductive lines disposed in the peripheral region; forming an electrode material film layer on the conductive pattern layer; forming a mask layer on the electrode material film layer, wherein the mask layer includes a plurality of electrode layer patterns disposed in the display region and protection patterns disposed above the conductive lines; and etching the electrode material film layer and removing the mask layer.

Abstract: A wiring substrate having, on a surface, a mounting pad for mounting a semiconductor device comprises a metal pad, an insulating layer, and a metal layer. A pad area of the mounting pad is defined by an opening section formed in the insulating layer. The wiring substrate further comprises an etching barrier layer provided between an upper surface of the metal pad and the insulating layer. The etching barrier layer is provided to surround a lower end of the opening section and extends outward from the lower end of the opening section to the outer periphery.

Abstract: A method for making light emitting device LED arrays includes the steps of providing a plurality of LEDs having a desired configuration (e.g., VLED, FCLED, PLED); attaching the LEDs to a carrier substrate and to a temporary substrate; forming one or more metal layers and one or more insulator layers configured to electrically connect the LEDs to form a desired circuitry; and separating the LEDs along with the layered metal layers and insulator layers that form the desired circuitry from the carrier substrate and the temporary substrate.

Abstract: A gate driving unit and a driving method for the same, a shift register circuit, and a display apparatus, and an operating period of the gate driving unit comprises a first and a second sub-period; a first pull-down node control module in the gate driving unit causes a first pull-down sub-node to be at an inactive level in the second sub-period, and causes the first pull-down sub-node to be at an active level during a reset phase in the first sub-period; a second pull-down node control module causes a second pull-down sub-node to be at an inactive level in the first sub-period, and causes the second pull-down sub-node to be at an active level during a reset phase in the second sub-period. It is possible to shorten the turn-on time of transistors controlled by the first and the second pull-down sub-nodes, and improve the reliability of the gate driving unit.

Abstract: A display substrate, a display panel, and preparation methods thereof. The display substrate includes a base substrate, a bonding pad, and an insulating layer. The bonding pad is located on one side of the base substrate and includes at least two bonding pad layers stacked in a thickness direction of the base substrate. The insulating layer is located between adjacent two of the bonding pad layers, and the insulating layer includes a via. In adjacent two of the bonding pad layers, the bonding pad layer on the side away from the base substrate extends into the via and is electrically connected to the bonding pad layer on the side close to the base substrate.

Abstract: An includes a display area and a non-display area that at least partially surrounds the display area; the non-display area includes at least two clock signal lines, wherein a ratio of a spacing between two adjacent clock signal lines to a line width of the clock signal lines is greater than or equal to 3.