Patents Assigned to Paradigm Technologies
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Patent number: 11066888Abstract: A method for performing operations in a well comprises sensing a condition at, adjacent, or within a wellhead arrangement located at an opening of the well and performing a safety procedure in response to the sensed condition to improve the safety of the well operations. The method may comprise sensing the condition when a tool is located at, adjacent to, or within the wellhead arrangement. The sensed condition may be associated with a status of the tool. The sensed condition may be associated with an emission, field or signal transmitted to and/or from the tool, extending to and/or from the tool, and/or coupled to and/or from the tool. Performing the safety procedure may comprise controlling a position or status of the tool or controlling an environment at, adjacent to, or within the wellhead arrangement.Type: GrantFiled: July 25, 2016Date of Patent: July 20, 2021Assignee: Paradigm Technology Services B.V.Inventor: John Leith Creighton
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Patent number: 10927665Abstract: A communication system, comprises a composite slickline including an electrical conductor surrounded by an electrically insulating structural material, a downhole tool; and a sensing element. The composite slickline is mechanically and electrically coupled to the downhole tool and extends from the downhole tool to the sensing element. The composite slickline and the sensing element are capacitively coupled so as to permit relative movement therebetween and so as to permit an electric field to extend from the electrical conductor of the composite slickline to the sensing element through the electrically insulating structural material of the composite slickline for the transmission of an electrical and/or an electromagnetic signal between the downhole tool and the sensing element via the composite slickline.Type: GrantFiled: January 19, 2016Date of Patent: February 23, 2021Assignee: PARADIGM TECHNOLOGY SERVICES B.V.Inventor: Andre Van Der Ende
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Patent number: 10927662Abstract: A wellbore communication system (1) comprises a downhole tool (2) having a downhole transmitter (40), a sensing element (22, 122, 222, . . . , 1022) located at surface and coupled to a surface receiver (44), and an insulated slickline (6, 106, 206, . . . , 1006) having an electrically conductive core surrounded by an insulating coating. The slickline is attached to the downhole tool and coupled to the downhole transmitter. The sensing element is capacitively coupled to the slickline so as to permit movement of the slickline relative thereto and so as to an electric field to extend from the core of the slickline through the insulating coating to the sensing element for transmission of information from the downhole transmitter to the surface receiver via the slickline and the sensing element.Type: GrantFiled: December 24, 2012Date of Patent: February 23, 2021Assignee: PARADIGM TECHNOLOGY SERVICES B.V.Inventors: Andre Martin van der Ende, Eric Atherton
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Patent number: 10422213Abstract: A method for use in measuring a property of an environment or an object in, or adjacent to, an elongated space (10), comprises unspooling and/or spooling a line (6) attached to a tool (4) so as to move the tool along an elongated space. The method may comprise using the tool to measure a property of an environment or an object in, or adjacent to, an elongated space during movement of the tool along the elongated space. The method may comprise, determining an acceleration of the line, measuring an acceleration of the tool along the elongated space, and controlling damping of the movement of the tool along the elongated space according to the measured acceleration of the tool and the determined acceleration of the line. The elongated space may be located downhole or may be defined in, or adjacent to, an oil or gas well.Type: GrantFiled: September 30, 2015Date of Patent: September 24, 2019Assignee: PARADIGM TECHNOLOGY SERVICES B.V.Inventor: Andre Van Der Ende
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Patent number: 10273770Abstract: A system for performing an operation in a wellbore comprises a tool (4) configured for deployment within the wellbore on an insulated slickline (6), and a winch (26) for hauling in and/or paying out the slickline. The system further comprises a winch controller (34) which is configured to receive information transmitted electrically from the tool along the slickline and to control the winch according to the received information. The tool may comprise a downhole tractor. The tool may comprise an electrical generator tool or a tool for performing a mechanical operation within the wellbore.Type: GrantFiled: September 26, 2014Date of Patent: April 30, 2019Assignee: PARADIGM TECHNOLOGY SERVICES V.B.Inventor: Andre Martin Van Der Ende
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Patent number: 9435195Abstract: A wireline apparatus comprises a sheave for accommodating a wireline and a sheave mounting configured for coupling to a wireline stuffing box. The apparatus includes a sensor for measuring at least one of wireline tension and deployed wireline length at the sheave.Type: GrantFiled: May 24, 2012Date of Patent: September 6, 2016Assignee: Paradigm Technology Services B.V.Inventor: Jan Arie Aldo Huizer
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Patent number: 7048083Abstract: A motorcycle including a frame having a backbone and engine carrier prevents the need for front support bars. The power plant is secured to the backbone and engine carrier and may be quickly removed. The power plant turns a hydraulic pump that transfers power to a hydraulic motor via hydraulic fluid. A reservoir of hydraulic fluid is preferably contained in the backbone. The hydraulic motor is contained in a swing arm and connects to one side of the rear wheel. The hydraulic motor acts as both a drive unit and a braking unit. Lights may be secured to the engine carrier to provide a better view of the road.Type: GrantFiled: July 12, 2002Date of Patent: May 23, 2006Assignee: Paradigm Technologies, L.L.P.Inventors: Mark R. Carpenter, Jess D. Lindsay
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Patent number: 6758624Abstract: Presented is a trailer incorporating a device that allows the detachable coupling of the ball coupler and safety chains of a trailer for remote storage of these items, while incorporating a security feature that allows only the original ball coupler and safety chains to be connected. This deters the unauthorized towing or theft of the trailer.Type: GrantFiled: October 25, 2001Date of Patent: July 6, 2004Assignee: Productivity Paradigm Technologies, Inc.Inventors: Philip Hugh Thompson, James Kevin Hays
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Patent number: 5925324Abstract: The MHD sterilization system invention is a method involving the use of magnetohydrodynamics, (MHD) for the specific purpose of destroying populations of micro-organisms occurring in, within or on fluid, semi-fluid, semi-solid or solid materials.Type: GrantFiled: September 30, 1996Date of Patent: July 20, 1999Assignee: Paradigm TechnologiesInventor: Joe Greer
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Patent number: 5895961Abstract: A CMOS integrated circuit structure with planarized self-aligned transistors and local planarization in the vicinity of the transistors so as to allow an interconnect, with a planar upper surface, which is free of bridging, has good continuity over the planarized topography and is compatible with self-alignment schemes, hence conserving chip real estate. The structure is compatible with planarization using BPSG, BPTEOS, SOG or CMP. After formation of self-aligned insulated transistor gates and active transistor regions, a "landing pad" is formed on the substrate at the buried contact and polyiso contact locations so as to allow more effective etching at the exact location of the buried contact and polyiso contact. Then the integrated circuit structure is locally planarized by formation of an oxide layer and a reflowed overlying glass layer. The glass layer is etched back to planarize the surface.Type: GrantFiled: December 23, 1996Date of Patent: April 20, 1999Assignee: Paradigm Technology, Inc.Inventor: Hsiang-Wen Chen
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Patent number: 5656861Abstract: An MOS transistor for use in an integrated circuit is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from a short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of doped polysilicon covered by titanium silicide encapsulated by a thin film of titanium nitride.Type: GrantFiled: May 25, 1995Date of Patent: August 12, 1997Assignee: Paradigm Technology, Inc.Inventors: Norman Godinho, Tsu-Wei Frank Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-Man Baik, Ting-Pwu Yen
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Patent number: 5620919Abstract: An MOS transistor for use in an integrated circuit, particularly CMOS integrated circuits, is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of titanium silicide encapulated by a thin film of titanium nitride.Type: GrantFiled: March 30, 1995Date of Patent: April 15, 1997Assignee: Paradigm Technology, Inc.Inventors: Norman Godinho, Frank T.W. Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-man Baik, Ting-Pwu Yen
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Patent number: 5557575Abstract: The invention provides fast generation of flag signals for devices such as a first-in first-out buffers by looking ahead and predetermining flag signals for future possible states of the device. Predetermining flag signals does not delay flag output because the required calculations are completed before the flag signal is needed. The flag signal can be changed when needed as quickly as a multiplexer can switch from an old flag signal to a predetermined flag signal. The switching time of a multiplexer is shorter than the comparator delays in prior art flag generators.Type: GrantFiled: January 24, 1995Date of Patent: September 17, 1996Assignee: Paradigm Technology, Inc.Inventor: Tsu-Wei F. Lee
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Patent number: 5493530Abstract: A synchronous SRAM (or DRAM or other logic) chip with input registers (or latches) associated with the chip memory cell array input lines, where there is logic associated with the registers, locates the logic gates upstream of the registers and connected to the D input of each register. Hence the logic gates not only provide the needed logic function, but also provide the necessary delay to meet the specified hold time delay in synchronous circuits. This reduces the logic function after the input registers and hence improves the clock-to-output access time of the chip.Type: GrantFiled: April 17, 1995Date of Patent: February 20, 1996Assignee: Paradigm Technology, Inc.Inventors: Tsu-wei F. Lee, Richard J. Zeman, Thinh D. Tran, Y. S. Kao
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Patent number: 5483104Abstract: An MOS transistor for use in an integrated circuit is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from a short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of doped polysilicon covered by titanium silicide encapsulated by a thin film of titanium nitride.Type: GrantFiled: September 28, 1992Date of Patent: January 9, 1996Assignee: Paradigm Technology, Inc.Inventors: Norman Godinho, Tsu-Wei F. Lee, Hsiang-Wen Chen, Richard F. Motta, Juine-Kai Tsang, Joseph Tzou, Jai-Man Baik, Ting-Pwu Yen
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Patent number: 5477074Abstract: A CMOS integrated circuit uses self-aligned transistors combined with local planarization in the vicinity of the transistors so as allow local interconnects which are free of bridging, have good continuity over the planarized topography and are compatible with the self-alignment schemes, hence conserving chip real estate. After formation of self-aligned insulated transistor gates and active transistor regions, the integrated circuit structure is planarized by formation of an oxide layer and a reflowed overlying glass layer. The glass layer and underlying oxide layer are removed only in the area of the buried contact, while an overlying metal or polysilicon conductive layer contacts the upper surface of certain of the transistor gate structures, the topside insulating layer of which has been removed for this purpose.Type: GrantFiled: August 22, 1994Date of Patent: December 19, 1995Assignee: Paradigm Technology, Inc.Inventor: Ting-Pwu Yen
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Patent number: 5384744Abstract: The invention provides fast generation of flag signals for devices such as a first-in first-out buffers by looking ahead and predetermining flag signals for future possible states of the device. Predetermining flag signals does not delay flag output because the required calculations are completed before the flag signal is needed. The flag signal can be changed when needed as quickly as a multiplexer can switch from an old flag signal to a predetermined flag signal. The switching time of a multiplexer is shorter than the comparator delays in prior art flag generators.Type: GrantFiled: November 23, 1992Date of Patent: January 24, 1995Assignee: Paradigm Technology, Inc.Inventor: Tsu-Wei F. Lee
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Patent number: 5365104Abstract: An oxynitride passivation layer and/or fuse protective layer for an SRAM cell having load resistors, where the composition of the oxynitride layer minimizes the effect of hydrogen diffusion on the resistance of underlying load resistors. The index of refraction of the oxynitride is between 1.60 and 1.85. This oxynitride does not substantially diffuse hydrogen into the load resistors even when heated to temperatures over 400.degree. C., and hence, avoids altering resistance during subsequent annealing steps.Type: GrantFiled: March 25, 1993Date of Patent: November 15, 1994Assignee: Paradigm Technology, Inc.Inventors: Norman Godinho, Hai-Pyng Liaw
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Patent number: 5359226Abstract: A compact static random access memory is formed using both split word lines and self aligned contacts. Self aligned contacts between gates of the pull-down transistor and cross-couple interconnects decreases the critical spacing between elements of the cell and permit the cell to be smaller or more manufacturable. The use of split word lines allows memory cell connections to the bit lines to be located on opposite sides of a memory cell. The connections are widely separated along a direction parallel to the bit lines so perpendicular separation between the bit lines can be decreased. The split word lines also allow the memory cell lay out to be symmetric and thereby increases stability. Use of self aligned contacts further decreases the necessary separation between the bit lines. A further feature is a straight conductor which runs though the center of the memory cell and connects the source of the pull-down transistors to a reference voltage V.sub.SS.Type: GrantFiled: February 2, 1993Date of Patent: October 25, 1994Assignee: Paradigm Technology, Inc.Inventor: Jan L. DeJong
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Patent number: 5351532Abstract: An in-hole oil-drilling probe is mountable in a drill string to measure hydrocarbon concentrations in drilling fluid flowing around the drill string. The probe consists of a drill collar which is mountable in the drill string. A solvent, in which hydrocarbons are soluble, circulates within the drill collar through a hydrocarbon detection chamber. A membrane in the drill collar has an outer surface positioned to contact flowing drilling fluid and an inner surface positioned to contact circulating solvent within the drill collar. The membrane allows hydrocarbons to permeate from the drilling fluid into the solvent and into the hydrocarbon detection chamber with the solvent. A radiant energy source directs radiant ultra-violet energy into the hydrocarbon detection chamber. A sensor apparatus measures fluorescent energy radiating from the hydrocarbon detection chamber to determine solvent hydrocarbon concentration.Type: GrantFiled: October 8, 1992Date of Patent: October 4, 1994Assignee: Paradigm TechnologiesInventor: Robert N. Hager