Patents Assigned to PHOENIX PIONEER TECHNOLOGY CO., LTD.
  • Patent number: 10278282
    Abstract: A substrate structure and a manufacturing method thereof are provided. The substrate structure comprises a metal carrier, a dielectric material layer, a first conductive wiring layer, a second conductive wiring layer and a conductive pillar layer. The first conductive wiring layer is disposed on a surface of the metal carrier. The dielectric material layer is disposed on a surface of the first conductive wiring layer. The conductive pillar layer is disposed inside the dielectric material layer, and located between the first conductive wiring layer and the second conductive wiring layer. The conductive pillar layer has at least one conductive pillar. The conductive pillar is electrically connected to the first conductive wiring layer and the second conductive wiring layer.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: April 30, 2019
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chun-Hsien Yu, Hsien-Ming Tsai
  • Patent number: 10204865
    Abstract: An electronic package is provided, which includes: an insulator; an electronic element embedded in the insulator and having a sensing area exposed from the insulator; and a conductive structure disposed on the insulator and electrically connected to the electronic element, thereby reducing the thickness of the overall structure.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: February 12, 2019
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chu-Chin Hu, Shih-Ping Hsu
  • Patent number: 10117340
    Abstract: A manufacturing method of a package substrate includes forming a patterned first dielectric layer on a carrier; forming a first wiring layer on a first surface of the first dielectric layer facing away from the carrier, a wall surface facing one of the openings of the first dielectric layer, and the carrier in one of the openings; forming a first conductive pillar layer on the first wiring layer on the first surface; forming a second dielectric layer on the first surface, the first wiring layer, and the openings, wherein the first conductive pillar layer is exposed from the second dielectric layer; forming a second wiring layer on the exposed first conductive pillar layer and the second dielectric layer; forming an electrical pad layer on the second wiring layer; and forming a third dielectric layer on the second dielectric layer and the second wiring layer.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: October 30, 2018
    Assignee: Phoenix Pioneer technology Co., Ltd.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu, Pao-Hung Chou
  • Patent number: 10079190
    Abstract: A method of fabricating a package structure is provided, including forming a plurality of openings by removing a portion of the material on one side of a conductive layer, forming an insulating material as an insulating layer in the openings, removing a portion of the material on the other side of the conductive layer to serve as a wiring layer, disposing an electronic component on the wiring layer, and forming an encapsulating layer to cover the electronic component, thereby allowing the single wiring layer to be connected to the electronic component on one side and connected to solder balls on the other side thereof to shorten the signal transmission path. The present invention further provides a package structure thus fabricated.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: September 18, 2018
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD
    Inventors: Shih-Ping Hsu, Chin-Wen Liu, Tang-I Wu, Shu-Wei Hu
  • Publication number: 20180261578
    Abstract: A method of manufacturing a package structure is provided, including forming a first wiring layer on a carrier board, forming a plurality of first conductors on the first wiring layer, forming a first insulating layer that encapsulates the first wiring layer and the first conductors, forming a second wiring layer on the first insulating layer, forming a plurality of second conductors on the second wiring layer, forming a second insulating layer that encapsulates the second wiring layer and the second conductors, and forming at least an opening on the second insulating layer for at least one electronic component to be disposed therein. Since the first and second insulating layers are formed before the opening, there is no need of stacking or laminating a substrate that already has an opening, and the electronic component will not be laminated and make a displacement. Therefore, the package structure thus manufactured has a high yield rate. The present invention further provides the package structure.
    Type: Application
    Filed: May 9, 2018
    Publication date: September 13, 2018
    Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Shih-Ping HSU, Chao-Tsung TSENG
  • Patent number: 10014242
    Abstract: The invention provides an interposer substrate and a method of fabricating the same. The method includes: etching a carrier to form a recessed groove thereon; filling a dielectric material in the recessed groove to form a first dielectric material layer, or forming a patterned first dielectric material layer on the carrier; forming a first wiring layer, a first conductive block and a second dielectric material layer on the carrier and the first dielectric material layer sequentially, with the first wiring layer and the first conductive block embedded in the second dielectric material layer; and forming a second wiring layer and a second conductive block on the second dielectric material layer. A coreless interposer substrate having fine pitches is thus fabricated.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: July 3, 2018
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Pao-Hung Chou, Shih-Ping Hsu
  • Patent number: 9992879
    Abstract: A packaging substrate includes a first dielectric layer, a first wiring layer, a first conductive pillar layer, a second dielectric layer, a second wiring layer, an electrical pad layer, and a third dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface, plural openings, and a wall surface that faces at least one of the openings. The first wiring layer is located on the first surface and the wall surface. A portion of the first wiring layer on an edge of the wall surface adjacent to the second surface extends in a direction away from the wall surface. The first conductive pillar layer is located on a portion of the first wiring layer. The second dielectric layer is located on the first surface, the first wiring layer, and in the openings.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: June 5, 2018
    Assignee: Phoenix Pioneer technology Co., Ltd.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu, Pao-Hung Chou
  • Patent number: 9972599
    Abstract: A method of manufacturing a package structure is provided, including forming a first wiring layer on a carrier board, forming up plurality of first conductors on the first wiring layer, forming a first insulating layer that encapsulates the first wiring layer and the first conductors, forming a second wiring layer on the first insulating layer, forming a plurality of second conductors on the second wiring layer, forming a second insulating layer that encapsulates the second wiring layer and the second conductors, and forming at least an opening on the second insulating layer for at least one electronic component to be disposed therein. Since the first and second insulating layers are formed before the opening, there is no need of stacking or laminating a substrate that already has an opening, and the electronic component will not be laminated and make a displacement. Therefore, the package structure thus manufactured has a high yield rate. The present invention further provides the package structure.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: May 15, 2018
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Shih-Ping Hsu, Chao-Chung Tseng
  • Patent number: 9911626
    Abstract: A method of fabricating an interposer substrate provides a carrier having a first wiring layer. The first wiring layer has a plurality of first conductive pillars. A first insulating layer is formed on the carrier. The first conductive pillars are exposed from the first insulating layer. External connection pillars are formed above the first conductive pillars and electrically connected to the first conductive pillars. Then the carrier is removed. The process of fabricating the via can be bypassed in the process by forming a coreless interposer substrate on the carrier, such that the overall cost of the process can be decreased, and the process is simple. The interposer substrate is also provided.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: March 6, 2018
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventor: Pao-Hung Chou
  • Patent number: 9905503
    Abstract: A package structure and a method of fabricating the same are provided. The method includes forming a first wiring layer on a carrier board, forming a plurality of first conductors on the first wiring layer, encapsulating the first wiring layer and the first conductors with a first insulating layer, forming a second wiring layer on the first insulating layer, forming a plurality of second conductors on the second wiring layer, encapsulating the second wiring layer and the second conductors with a second insulating layer, and forming at least one opening in the second insulating layer. The at least one opening extends to a second surface of the first insulating layer, such that at least one electronic component can be disposed in the at least one opening. With forming two insulating layers first followed by forming the at least one opening, there is no need to stack or laminate the substrate that already has an opening, and the electronic component is free of displacement due to any compression.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: February 27, 2018
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Shih-Ping Hsu, Chao-Chung Tseng
  • Publication number: 20180047662
    Abstract: A method of manufacturing an interposer substrate, including providing a carrier having a first circuit layer formed thereon, forming a plurality of conductive pillars on the first circuit layer, forming a first insulating layer on the carrier, with the conductive pillars being exposed from the first insulating layer, forming, on the conductive pillars a second circuit layer that is electrically connected to the conductive pillars, forming a second insulating layer on the second surface of the first insulating layer and the second circuit layer, exposing a portion of a surface of the second circuit layer from the second insulating layer, and removing the carrier. The invention further provides the interposer substrate as described above.
    Type: Application
    Filed: October 27, 2017
    Publication date: February 15, 2018
    Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu, Chih-Wen Liu
  • Patent number: 9893003
    Abstract: This disclosure provides a package substrate, a flip-chip package circuit, and their fabrication methods. The package substrate includes: a first wiring layer having a first dielectric material layer and a first metal wire protruding from the first dielectric material layer; a conductive pillar layer formed on the first wiring layer and including a molding compound layer, a second dielectric material layer formed on the molding compound layer, and a metal pillar connected to the first metal wire; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: February 13, 2018
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Patent number: 9852977
    Abstract: This disclosure provides a package substrate which includes a rigid dielectric material layer, a first wiring layer having at least one first metal wire formed on the rigid dielectric material layer, and a first flexible dielectric material layer formed on the first wiring layer.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: December 26, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chun-Hsien Yu, Pao-Hung Chou
  • Patent number: 9831217
    Abstract: This disclosure provides a package substrate fabrication method including: forming a first conductive wire and a first connecting unit on a first carrier substrate; forming a first dielectric layer on the first carrier substrate while enabling an end face of the first connecting unit to be exposed; bonding a second carrier substrate to the first dielectric layer and removing the first carrier substrate; disposing a first circuit chip and a second connecting unit on the first conductive wire; forming a second dielectric layer on the second carrier substrate while enabling the first circuit chip and the second connecting unit to be surrounded by the second dielectric layer and an end face of the second connecting unit to be exposed; forming a second conductive wire on the second dielectric layer; disposing a second circuit chip on the second conductive wire; and forming a third dielectric layer on the second carrier substrate.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: November 28, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chu-Chin Hu, Shih-Ping Hsu, Che-Wei Hsu, Chin-Ming Liu, Chih-Kuai Yang
  • Patent number: 9831165
    Abstract: A method of manufacturing an interposer substrate, including providing a carrier having a first circuit layer formed thereon, forming a plurality of conductive pillars on the first circuit layer, forming a first insulating layer on the carrier, with the conductive pillars being exposed from the first insulating layer, forming on the conductive pillars a second circuit layer that is electrically connected to the conductive pillars, forming a second insulating layer on the second surface of the first insulating layer and the second circuit layer, exposing a portion of a surface of the second circuit layer from the second insulating layer, and removing the carrier. The invention further provides the interposer substrate as described above.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: November 28, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu, Chih-Wen Liu
  • Patent number: 9824964
    Abstract: This disclosure provides a package substrate, a package structure including the same and their fabrication methods. The package substrate comprises: a first wiring layer having a first metal wire and a first dielectric material layer surrounding the first metal wire; a conductive pillar layer formed on the first wiring layer and including a first metal pillar connected to the first metal wire and a molding compound layer surrounding the first metal pillar; a flexible material layer formed on the conductive pillar layer and including a first opening formed on the first metal pillar and exposing the first metal pillar; and a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the first metal pillar through the first opening, a second metal pillar formed on the second metal wire, and a protective layer surrounding the second metal wire and the second metal pillar.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: November 21, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chun-Hsien Yu, Shih-Ping Hsu
  • Patent number: 9806012
    Abstract: The present invention discloses an IC Carrier of a semiconductor package and its manufacturing method. The IC Carrier of the semiconductor package includes a dielectric layer and a patterned conductor layer. The dielectric layer has at least one opening groove. The patterned conductor layer is embedded in the dielectric layer, wherein a part of the patterned conductor layer is as a conductive pillar, which has two exposed ends, and a part of the patterned conductor layer is as a conductive wire, which only has one exposed end.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: October 31, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Shih-Ping Hsu, Chao-Tsung Tseng
  • Patent number: 9805996
    Abstract: A substrate structure and a manufacturing method thereof are provided. The substrate structure comprises a dielectric material layer, a conductive wiring layer, a metal core layer, and a conductive pillar layer. The conductive wiring layer is disposed on a surface of the dielectric material layer. The metal core layer having a metal part is disposed inside the dielectric material layer. The conductive pillar layer is disposed inside the dielectric material layer and between the metal core layer and the conductive wiring layer. The metal part has a first side and a second side opposite the first side. One of the first side and the second side is electrically connected to the conductive pillar layer. A width of the first side is different from a width of the second side.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: October 31, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Shih-Ping Hsu, Che-Wei Hsu, Chin-Ming Liu, Chih-Kuai Yang
  • Patent number: 9780022
    Abstract: A substrate structure and a manufacturing method thereof are provided. The substrate structure comprises a dielectric material layer, a first conductive wiring layer, a second conductive wiring layer, a first conductive pillar layer, and a second conductive pillar layer. The first conductive wiring layer is disposed inside the dielectric material layer. The first conductive pillar layer having a first conductive pillar is disposed inside the dielectric material layer and between the first conductive wiring layer and the second conductive wiring layer. The second conductive pillar layer having a second conductive pillar is disposed on the second conductive wiring layer. The first conductive wiring layer and the second conductive wiring layer are electrically connected by the first conductive pillar layer. The second conductive pillar is a -shape conductive pillar, a -shape conductive pillar, or a -shape conductive pillar.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: October 3, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventor: Pao-Hung Chou
  • Patent number: 9754982
    Abstract: A substrate structure is provided, including a first insulating layer, a first circuit layer embedded in and bonded to the first insulating layer; a plurality of first conductive posts formed in the first insulating layer and electrically connected to the first circuit layer, a second circuit layer formed on the first insulating layer and electrically connected to the first circuit layer through the first conductive posts, a plurality of second conductive posts and a plurality of conductive bumps formed on the second circuit layer, and a second insulating layer formed on the first insulating layer and encapsulating the second circuit layer, the second conductive posts and the conductive bumps. The second insulating layer has a cavity exposing the conductive bumps. When the substrate structure is applied to a camera lens, a sensor element can be disposed in the cavity to reduce the thickness of the overall packaging module.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: September 5, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chun-Hsien Yu, Chu-Chin Hu, Shih-Ping Hsu