Patents Assigned to PHOENIX PIONEER TECHNOLOGY CO., LTD.
  • Patent number: 9750142
    Abstract: A package apparatus comprises a first wiring layer, a first dielectric material layer, a first conductive pillar layer, a first buffer layer, a second wiring layer, and a protection layer. The first wiring layer has a first surface and a second surface opposite to the first surface. The first dielectric material layer is disposed within partial zone of the first wiring layer. The first conductive pillar layer is disposed on the second surface of the first wiring layer. The first buffer layer is disposed within partial zone of the first conductive pillar layer. The second wiring layer is disposed on the first buffer layer and one end of the first conductive pillar layer. The protection layer is disposed on the first buffer layer and the second wiring layer.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: August 29, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventor: Shih-Ping Hsu
  • Patent number: 9741646
    Abstract: This disclosure provides a package substrate and its fabrication method. The package substrate includes: a carrier; a first wiring layer formed on the carrier; a conductive pillar layer having a plurality of metal pillars on the first wiring layer; a molding compound layer formed on the first wiring layer, covering all the first wiring layer and the metal pillars, and exposing one end face of each metal pillar; a second wiring layer formed on the molding compound layer and the exposed end faces of the metal pillars; and a protection layer formed on the second wiring layer.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: August 22, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chin-Yao Hsu, Shih-Ping Hsu
  • Patent number: 9711444
    Abstract: A substrate structure is provided, including: a circuit board having a plurality of wiring layers; a first circuit layer; a plurality of conductive posts disposed on the first circuit layer; a first insulating layer encapsulating the circuit board, the first circuit layer and the conductive posts; and a second circuit layer formed on the first insulating layer and electrically connected to the wiring layers with the second circuit layer electrically connected to the first circuit layer through the conductive posts. According to the present disclosure, fine-pitch circuits are formed in the circuit board, and thus only the circuit board needs a high-cost insulating material, thereby allowing the first insulating layer to be made of a low-cost material to reduce the fabrication cost.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: July 18, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventor: Wen-Hung Hu
  • Patent number: 9711445
    Abstract: This disclosure provides a package substrate, a package structure including the same and their fabrication methods. The package substrate comprises: a first wiring layer having a first metal wire and a first dielectric material layer surrounding the first metal wire; a conductive pillar layer formed on the first wiring layer and including a first metal pillar connected to the first metal wire and a molding compound layer surrounding the first metal pillar; a flexible material layer formed on the conductive pillar layer and including a first opening formed on the first metal pillar and exposing the first metal pillar; and a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the first metal pillar through the first opening, a second metal pillar formed on the second metal wire, and a protective layer surrounding the second metal wire and the second metal pillar.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: July 18, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chun-Hsien Yu, Shih-Ping Hsu
  • Patent number: 9613894
    Abstract: An electronic package is provided. The electronic package includes an insulator having a recessed portion formed therein; an electronic element embedded in the recessed portion and having a sensing region exposed from the insulator; and a conductive structure disposed on the insulator and electrically connected with the electronic element. The overall thickness of the electronic package is reduced by embedding the electronic element which is embedded in the recessed portion.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: April 4, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chu-Chin Hu, Shih-Ping Hsu
  • Patent number: 9601402
    Abstract: A package apparatus comprises a first wiring layer, a metal layer, a conductive pillar layer, a passive component, a first molding compound layer, a second wiring layer, and a protection layer. The first wiring layer has a first surface and a second surface opposite to each other. The metal layer is disposed on the first surface of the first wiring layer. The conductive pillar layer is disposed on the second surface of the first wiring layer. The passive component is disposed on the second surface of the first wiring layer. The first molding compound layer is disposed within a part of the zone of the first wiring layer and the conductive pillar layer. The second wiring layer is disposed on the first molding compound layer and one end of the conductive pillar layer. The protection layer is disposed on the first molding compound layer and the second wiring layer.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: March 21, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: E-Tung Chou, Chu-Chin Hu, Shih-Ping Hsu
  • Patent number: 9589935
    Abstract: A package apparatus includes a first package module, a second package module and multiple conductive elements. The first package module includes a first molding compound layer, a first conductive pillar layer disposed in the first molding compound layer, a first internal component, and a first protection layer. The first internal component electrically connects to the first conductive pillar layer and disposed in the first molding compound layer. The first protection layer is disposed on the first molding compound layer and the first conductive pillar layer. The second package module includes a second molding compound layer, a second conductive pillar layer disposed in the second molding compound layer, and a second internal component. The second internal component electrically connects to the second conductive pillar layer and disposed in the second molding compound layer. The conductive elements are disposed between the first and the second conductive pillar layers.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: March 7, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chu-Chin Hu, Shih-Ping Hsu, E-Tung Chou
  • Patent number: 9583436
    Abstract: A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a first conductive glue layer, an internal component, a second conductive pillar layer, a first molding compound layer and a second conductive wiring layer. The first conductive pillar layer is disposed on the first conductive wiring layer. The first conductive glue layer is disposed on the first conductive wiring layer. The internal component has a first electrode layer and a second electrode layer, wherein the first electrode layer is disposed and electrical connected to the first conductive glue layer. The second conductive pillar layer is disposed on the second electrode layer. Wherein the first conductive wiring layer, the first conductive pillar layer, the first conductive glue layer, the internal component and the second conductive pillar layer are disposed inside the first molding compound layer.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: February 28, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chao-Tsung Tseng, Shih-Ping Hsu, Chin-Ming Liu, Che-Wei Hsu
  • Patent number: 9548234
    Abstract: This disclosure provides a package substrate, a flip-chip package circuit and their fabrication method. The package substrate includes: a first wiring layer having a first metal wire and a first dielectric material layer filling the remaining part of the first wiring layer except for the first metal wire; a conductive pillar layer formed on the first wiring layer and including a metal pillar connected to the first metal wire, a molding compound layer with a protrusion part surrounding the metal pillar, and a second dielectric material layer formed on the molding compound layer; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: January 17, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Patent number: 9536864
    Abstract: This disclosure provides a package structure and its fabrication method. The package structure includes: a protective insulation layer; a wiring layer including at least one metal wire and disposed on the protective insulation layer; and a first package unit disposed on the wiring layer and including a plurality of metal pillars, a first integrated-circuit chip and a first molding compound layer; wherein the plural metal pillars are located in a pillar region and electrically connected to the at least one metal wire, the first integrated-circuit chip is located in a device region and electrically connected to the at least one metal wire, and the first molding compound layer filling up the remaining part of the first package unit.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: January 3, 2017
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventor: Shih-Ping Hsu
  • Patent number: 9370105
    Abstract: A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a dielectric material layer, a second conductive wiring layer, a second conductive pillar layer, and a first molding compound layer. The first conductive wiring layer has a first surface and a second surface opposite to the first surface. The first conductive pillar layer is disposed on the first surface of the first conductive wiring layer, wherein the first conductive wiring layer and the first conductive pillar layer are disposed inside the dielectric material layer. The second conductive wiring layer is disposed on the first conductive pillar layer and the dielectric material layer. The second conductive pillar layer is disposed on the second conductive wiring layer, wherein the second conductive wiring layer and the second conductive pillar layer are disposed inside the first molding compound layer.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: June 14, 2016
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Patent number: 9342772
    Abstract: A method of manufacturing a substrate structure is disclosed, including: providing a carrier board having a first surface; and forming a circuit layer and metallic lines on the first surface. The metallic lines and the carrier board constitute a two dimensional code, thereby eliminating the need to form 2D codes by laser or inkjet after the substrate structure is manufactured. Therefore, the method is simplified, and the substrate structure has a reduced cost. The present invention further provides the substrate structure.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: May 17, 2016
    Assignee: Phoenix Pioneer Technology Co., Ltd.
    Inventor: Pao-Hung Chou
  • Patent number: 9338900
    Abstract: A method of fabricating an interposer substrate is provided, including: providing a carrier having a first wiring layer and a plurality of conductive pillars disposed on the first wiring layer; forming a first insulating layer on the carrier, with the conductive pillars being exposed from the first insulating layer; forming a second wiring layer on the first insulating layer and the conductive pillars; disposing a plurality of external connection pillars on the second wiring layer; forming a second insulating layer on the first insulating layer, with the external connection pillars being exposed from the second insulating layer; forming at least a trench on the second insulating layer; and removing the carrier. Through the formation of the interposer substrate, which does not have a core layer, on the carrier, a via process is omitted. Therefore, the method is simple, and the interposer substrate thus fabricated has a low cost. The present invention further provides the interposer substrate.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: May 10, 2016
    Assignee: Phoenix Pioneer Technology Co., Ltd.
    Inventors: Pao-Hung Chou, Shih-Ping Hsu, Che-Wei Hsu
  • Patent number: 9214437
    Abstract: A package method comprises the steps of: providing a metal carrier having a first surface and a second surface opposite to the first surface; forming a first wiring layer on the second surface of the metal carrier; forming a first conductive pillar layer on the first wiring layer; forming a dielectric material layer covering the first wiring layer, the first conductive pillar layer and the second surface of the metal carrier; exposing one end of the first conductive pillar layer; forming a second wiring layer on the exposed end of the first conductive pillar layer; forming a solder resist layer on the dielectric material layer and the second wiring layer; removing the metal carrier.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: December 15, 2015
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu