Abstract: An A-to-D converter system having programmed reference signal levels using only supply signal provided by a power supply is disclosed. The converter system includes a comparator configured to provide comparison of an analog input signal with an adjustable reference level. The converter system also includes a logic circuit and an adjustable capacitor.

Abstract: A double comparison successive approximation A/D converter. The converter compares the value with upper and lower limits. The bit values are not set unless the value is distant from the compared value. Otherwise, the value of the bit is held until later when the bit does fall outside the limits.

Abstract: A method of determining a range of an object includes emitting light toward a target and sensing light reflected by the target. Signals corresponding to the sensed light are integrated during multiple integration periods. Each integration period is different from other integration periods. A range of the target can be calculated based on the integrated signals. A range finder for performing the foregoing technique also is disclosed.

Abstract: An A-to-D converter system having programmed reference signal levels using only supply signal provided by a power supply is disclosed. The converter system includes a comparator configured to provide comparison of an analog input signal with an adjustable reference level. The converter system also includes a logic circuit and an adjustable capacitor.

Abstract: CDMA communication over multiple channels by phase shifting at baseband and then RF modulating without a phase shift. Total number of baseband filters is reduced by summing channel components prior to baseband filtering.

Abstract: A CMOS active pixel color linear image sensor is operable in line-packed readout mode, and at very high speed. In accordance with a preferred embodiment, the sensor is formed entirely on a single-chip and may be further configurable for operation in parallel-packed and/or pixel-packed modes. Line-packed pixel readout is accomplished by spreading same color pixel signal sampled values in storage elements across each of plural readout register arrays in a “cyclic” manner. Facility is introduced for starting the reading of a next pixel (e.g., R pixel 2) even before the previous pixel (R pixel 1) has been read out to increase the effective pixel readout rate.

Abstract: Reduced size CMOS active pixel circuit uses special transistors with their gates and sources connected together. This transistor is placed at the top of the pixel.

Abstract: A fully depleted photodiode accumulates charge into both the diode and a separate floating diffusion. The floating diffusion has less capacitance that the overall diode, thereby resulting in a knee-shaped transfer characteristic for charge accumulation. The fully depleted photodiode also include two PN junctions, one near the surface and the other buried below the surface.

Abstract: Differential non-linearity errors in an A/D converter are corrected by an analog system. The system produces different analog voltages which are used to correct the input voltage to the capacitor. The input voltage is changed by an amount which is effective to correct the C&Dgr;V to be the same as it would have been if the DNL error had not occurred.

Abstract: Smarts are added to a CMOS active pixel color linear image sensor operable in any of parallel-packed, pixel-packed, and line-packed readout mode, to provide the added feature of variable imaging resolution operability. By combining decoder block functionality with shift selection logic to provide column selection adaptable for lowering the resolution of an imaging process, higher speed imaging is possible. Furthermore, the added functionality is implemented in a manner which does not unduly impact chip size. More importantly, the added functionality is compatible with, and in fact complements the specific architecture of an active pixel color linear sensor with variable readout mode functionality incorporated therein.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight.

Abstract: A non-uniform resistor is used with a flash A to D converter in order to provide an A to D output which is not linear. The nonlinearity of the A to D output is specially designed to carry out a predetermined correction of the signal.

Abstract: A sampling and readout system including a cascaded stage charge amplifier samples, amplifies, and outputs pixel sensor data from an array of pixel sensors. The charge amplifier divides the gain into several gain stages. Each gain stage amplifies the pixel sensor data.

Abstract: Differential non-linearity errors in an A/D converter are corrected by an analog system. The system produces different analog voltages which are used to correct the input voltage to the capacitor. The input voltage is changed by an amount which is effective to correct the C&Dgr;V to be the same as it would have been if the DNL error had not occurred.

Abstract: Missing code linearity in an A to D converter is corrected by associating each of the bits of a raw ADC output with a correction code for that bit.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight.

Abstract: A sampling and readout system including a cascaded stage charge amplifier samples, amplifies, and outputs pixel sensor data from an array of pixel sensors. The charge amplifier divides the gain into several gain stages. Each gain stage amplifies the pixel sensor data.

Abstract: A light-emitting diode array is driven by a digital control. The digital control modulates the pulse width of pulses applied to the light-emitting diode. The intensity of the output is controlled by controlling the width of pulses applied to the light-emitting diode. Since light-emitting diodes have very low inertial energy, this system can be rapidly turned on and turned off. The output is integrated to produce a uniform output.

Abstract: A CMOS imager includes an array of CMOS active pixel sensors and multiple column readout circuits each of which is associated with a respective column of sensors in the array and can perform correlated double sampling of values from a sensor in the respective column. Each column readout circuit also includes a crowbar switch which selectively can be enabled to force the stored values to an operational amplifier-based charge sensing circuit via a pair of buses. The operational amplifier-based charge sensing circuit, which includes a pair of switched integrators each of which is coupled to one of the buses, provides a differential output based on the values stored by a selected one of the column readout circuits.

Abstract: Differential non-linearity errors in an A/D converter are corrected by an analog system. The system produces different analog voltages which are used to correct the input voltage to the capacitor. The input voltage is changed by an amount which is effective to correct the CAV to be the same as it would have been if the DNL error had not occurred.