Abstract: Generation of a single look-up table for performing DNL correction on an array of analog-to-digital converters (ADCS) is disclosed. Initially, the analog input voltages to the array of ADCs are generated. The input voltages ramp up in steps of some predetermined value. Then, the digital output data are collected and stored in a frame-grabber buffer. A frame of output data are examined for missed codes. The missed codes are identified and recorded. Next, an ADC with a highest number of missed codes is selected for use in generating the look-up table. Finally, the look-up table entries are filled in with consecutive integer values using the corresponding actual output of the selected ADC as an address in the look-up table. During this process, there will be some entries that are missing. These empty entries are filled in with values identical to the value following the empty entries.

Abstract: A ping-pong A/D converter which produces an output at alternate times on alternate memories.

Abstract: A current mode device for an active pixel sensor includes a voltage to current converter which includes an operation that occurs inside a source follower. The device operates to draw no current while the current is incoming. The device uses two stages of double sampling—one before the current-mode op amp and one after.

Abstract: Differential nonlinearity is corrected by a look up table. The look up table obtains one extra bit of information and uses it to address corrected information in the look up table. The corrected look up table information represents information that is corrected for a differential nonlinearity error.

Abstract: A circuit for use in comparing input voltages includes switching elements initially configured in a reset mode to minimize charge or current conduction before entering a comparison mode. A strobe signal reconfigures the switching elements to transition from the reset mode to the comparison mode. Finally, a determination is made as to which of the input voltages is larger or smaller.

Abstract: A programmable arithmetic circuit to form multiple circuit modules for different arithmetic operations that share certain common electronic elements to reduce the number of elements. Such circuit can be integrated to an imaging sensor array such as a CMOS active pixel sensor array to form arithmetic operations and analog-to-digital conversion for imaging processing.

Abstract: A low voltage comparator for amplifying a voltage difference between a pair of differential inputs. A boost capacitor charges to a boost voltage in excess of the low supply voltage, a differential pair of MOSFET transistors, each said transistor including a gate, a source, a drain, and a body terminal. The comparator also includes a latch mechanism built from a cross-coupled pair of MOSFET transistors for latching the compared result. A well capacitor is used to charge the body terminal of the differential pair where the boost capacitor and the well capacitor boost the common source voltage and reduce the threshold voltage of the differential pair to allow the supply voltage to be at relatively low level.

Abstract: Active pixel sensor with separated pixel areas, each sensing a different primary color, red, green or blue. Each of the colors is sensed using a different size color filter element to allow receiving an amount of light dependent on the responses of the image sensor to the specific color.

Abstract: A special concentric lens system having an air gap and at least one aspheric surface is provided to achieve a substantially uniform imaging performance in a wide angle of view with reduced aberrations.

Abstract: A circuit has an analog-to-digital converter that, during a first mode of the circuit, is configured to use capacitors of the converter to furnish a digital representation of an analog input voltage. The circuit also has an amplifier that has a gain responsive to a capacitance, and the switches are configured to, during a second mode of the circuit, selectively connect the capacitors to the amplifier to select the gain.

Abstract: The present disclosure describes a low-voltage switched-capacitor amplifier circuit that operates with supply voltage as low as one volt. The switched-capacitor amplifier circuit includes a voltage-amplifying transistor configured in a switched-capacitor network by an input capacitor and a feedback capacitor. The gate terminal of the voltage-amplifying transistor is connected to the supply voltage through a first switch that turns on during stage 1 of the reset phase. During stage 2, the first switch opens and a second switch is closed. The second switch is in series with a second transistor. The second transistor maintains certain voltage difference between the input and the output and keeps the output voltage from pulling the input voltage down to ground.

Abstract: A bidirectional source follower system includes an N channel transistor and P channel transistor which conduct in opposite ways. The n channel transistor is connected to quickly source current, however is relatively inefficient at sinking current. In contrast, the P channel transistor can sink current very quickly but is bad at source current. The two devices are connected together in a way which allows advantageous features of both.

Abstract: Quantum efficiency in an active pixel sensor improved by proper sizing and shaping of the contacts. The photodiode elements are formed of special shapes that are optimized for obtaining diffusion of charge, rather than obtaining the charge directly. Photogates are formed with a thinned polysilicon covering.

Abstract: A digital median filter is made using a successive approximation A/D converter circuit, which is arranged to produce an output based on majority weighting.