Patents Assigned to Planar Systems, Inc.
  • Patent number: 5504389
    Abstract: An electroluminescent display having a plurality of layers including at least a transparent electrode layer, a rear electrode layer, and at least three layers including an electroluminescent layer sandwiched between front and rear dielectric layers. All three layers thereof are disposed between the rear electrode layer and the transparent electrode layer wherein the transparent electrode layer is formed on a transparent substrate, so as to emit light upon the application of an electric field between the transparent electrode layer and the rear electrode layer. A thin-film absorption layer that absorbs a substantial percentage of light incident thereon is disposed between the rear electrode layer and the rear dielectric layer.
    Type: Grant
    Filed: March 8, 1994
    Date of Patent: April 2, 1996
    Assignee: Planar Systems, Inc.
    Inventor: Eric R. Dickey
  • Patent number: 5463279
    Abstract: An electroluminescent device comprises a plurality of layers including at least a transparent electrode layer, a circuit layer, and typically three layers including an electroluminescent layer sandwiched between front and rear dielectric layers, all three layers thereof disposed between the circuit layer and the transparent electrode layer. The circuit layer further comprises a first gating device coupled to a data line and a select line and having an output coupled to an input of a charge storage device. The charge storage device has a terminal connected to a first ground layer. A second gating device comprises a transistor operating in a breakdown region. The transistor has a gate coupled to the input to the charge storage device and has a first terminal coupled to a second ground layer and a second terminal coupled to a pixel electrode.
    Type: Grant
    Filed: August 19, 1994
    Date of Patent: October 31, 1995
    Assignee: Planar Systems, Inc.
    Inventor: Iranpour Khormaei
  • Patent number: 5457551
    Abstract: A display system (10) uses an electrically driven compensator cell (16) not only to improve the color quality of the display system but also to solve viewability problems stemming from the frame response effect. The display system includes a liquid crystal cell (14) patterned as a matrix display device and the compensator cell patterned in a row-only fashion. Corresponding row electrodes (26, 32) of the matrix display cell and the compensator cell are concurrently driven from the same row driver circuit (40). The cells are constructed and oriented relative to each other so as to cancel unwanted polarization state changes resulting from the frame response effect. The resulting light transmission through the display system in the OFF optical state is substantially at a minimum at all times during a frame period.
    Type: Grant
    Filed: October 8, 1993
    Date of Patent: October 10, 1995
    Assignee: Planar Systems, Inc.
    Inventors: Robert G. Culter, Keith F. Kongslie
  • Patent number: 5426266
    Abstract: A connection for mounting an IC die directly to a substrate includes circuit runs deposited on the substrate with bond pad portions having metallization patterns forming ridges and cutout areas. Metal bumps made of gold or other highly conductive malleable material are placed atop the metallization patterns and are forced into the cutout areas between ridges as the dies are compressed onto the substrate. This locks the dies to the circuit run bond pads so as to resist thermal stress and high humidity.
    Type: Grant
    Filed: November 8, 1993
    Date of Patent: June 20, 1995
    Assignee: Planar Systems, Inc.
    Inventors: Candice H. Brown, Davar I. Roshanagh
  • Patent number: 5194027
    Abstract: A construction for a TFEL panel includes a solid encapsulating layer for the active area of a TFEL panel that has a hardness that does not exceed 40 duromeers (Shore A). A gel material is spread over the active area and cured to the desired degree of hardness. At this degree of hardness the panel retains its self-healing characteristics and the panel's durability is much improved over designs using oil-filled cavitites.
    Type: Grant
    Filed: September 9, 1991
    Date of Patent: March 16, 1993
    Assignee: Planar Systems, Inc.
    Inventors: Mark S. Kruskopf, Kunmith Ping
  • Patent number: 5072152
    Abstract: A TFEL device for producing a high brightness output comprises a substrate supporting a laminar thin film stack including a front electrode layer and a rear electrode layer sandwiching an electroluminescent laminate comprising an electroluminescent layer sandwiched by a pair of insulating layers. A thin film insulating layer is grown by evaporation on the glass substrate and produces a surface having a degree of roughness which is replicated by the remaining thin film layers. The surface contour at the interfaces between each of the thin film layers is convoluted which reduces internal light reflection and provides more light output at the front of the panel.
    Type: Grant
    Filed: February 5, 1990
    Date of Patent: December 10, 1991
    Assignee: Planar Systems, Inc.
    Inventors: Richard T. Tuenge, Christopher N. King
  • Patent number: 5010325
    Abstract: A driving network for a TFEL panel includes a frame capture buffer for flat panels having split-screen architecture to increase the video bandwidth and to allow for a high frame refresh rate without changing the video input rate. Input serial video data is converted to parallel data bits and latched at a predetermined clock rate. The latched data bits are transferred to appropriate buffer memories, one for each independently driven portion of the screen. Writing to the buffer memories and reading data out from the buffer memories occurs at asynchronous rates so that data in smaller bytes may be clocked in at a higher frequency and read out of the buffer memories in larger bytes at a lower frequency. Since data may be processed onto flat screen arrays in multiple bits per clock pulse, the frame repetition rate limitations inherent in processing serial input video data are avoided.
    Type: Grant
    Filed: December 19, 1988
    Date of Patent: April 23, 1991
    Assignee: Planar Systems, Inc.
    Inventor: Michael J. Ziuchkovski
  • Patent number: 4999539
    Abstract: An electrode configuration for reducing contact density in matrix-addressed display panels includes a first set of electrodes having termination points for connection to external driving electronics situated near the edge of a supporting substrate, and a second set of electrodes alternately interleaved among said first set having termination points spaced inwardly from the substrate's edge. An insulating film covers the termination points of the second plurality of electrodes and bond pads placed atop the insulating film are connected to the electrodes by leads. This insulates the second plurality of electrodes from a possible short circuit caused by random or one-on-one interconnects that bridge areas in the gaps between the electrodes.
    Type: Grant
    Filed: December 4, 1989
    Date of Patent: March 12, 1991
    Assignee: Planar Systems, Inc.
    Inventors: Richard E. Coovert, Christopher N. King
  • Patent number: 4982183
    Abstract: A matrix-addressed AC TFEL panel includes odd- and even-numbered scanning electrodes driven from opposite sides of the panel by separate power supplies. The data electrodes are divided into top and bottom sets so that they are arranged as complementary pairs extending towards each other slightly less than halfway across the screen leaving a small gap in the middle. The odd- and even-numbered scanning electrodes are divided into top and bottom subsets so that the top and bottom halves of the panel may be scanned simultaneously in line-by-line fashion. When an even electrode in the top half of the panel is scanned with a voltage of a first polarity, an odd electrode in the bottom half may be scanned with a voltage of an opposite polarity. Thus, the load for the scanning of the top and bottom halves is divided between positive and negative power supplies. To provide symmetric drive the polarities may be reversed each frame.
    Type: Grant
    Filed: July 19, 1988
    Date of Patent: January 1, 1991
    Assignee: Planar Systems, Inc.
    Inventors: Robert T. Flegal, Michael J. Ziuchkovski
  • Patent number: 4963788
    Abstract: A TFEL device having improved contrast includes a laminate having a phosphor layer sandwiched between front and rear insulating layers placed upon a substrate supporting a set of front transparent electrodes. The rear set of electrodes are transparent or semitransparent so as not to reflect ambient light toward the viewer. The TFEL laminate is contained within a cavity created by an enclosure secured to the substrate by an adhesive. Darkly dyed filler material is injected into the cavity whose rear inside wall may have a dark coating. The semitransparent electrodes may be made of gold or may be made of transparent indium tin oxide having narrow aluminum bus bars for improved conductivity.
    Type: Grant
    Filed: July 14, 1988
    Date of Patent: October 16, 1990
    Assignee: Planar Systems, Inc.
    Inventors: Christopher N. King, Richard E. Coovert
  • Patent number: 4900584
    Abstract: A process for fabrication and annealing of TFEL panels includes the steps of depositing a laminar stack of thin films on a glass substrate containing a first set of electrodes, the laminar stack comprising at least one insulating layer and an EL phosphor layer and annealing the laminar stack under an array of high intensity flash lamps at a temperature exceeding 450.degree. C. for a period of between 15 and 240 seconds. The flash lamps bring the temperature of the laminar stack to the required high temperature very quickly and the stack is cooled very quickly at the end of the annealing period. This process conditions the EL phosphor layer but does not warp the glass substrate or damage the thin films.
    Type: Grant
    Filed: September 27, 1988
    Date of Patent: February 13, 1990
    Assignee: Planar Systems, Inc.
    Inventors: Richard T. Tuenge, Richard E. Coovert
  • Patent number: 4897319
    Abstract: A structure for a thin-film electroluminescent (TFEL) device includes an EL phosphor layer sandwiched between a pair of insulator stacks, at least one of the stacks including a thin layer of silicon oxynitride in direct contact with the last grown side of the phosphor layer and a second thicker layer of barium tantalate. The silicon oxynitride layer has high resistivity, and when combined with a second insulator having a high dielectric constant, such as barium tantalate, produces an increase in luminance of the phosphor layer at conventional voltages. Both insulator stacks may include a silicon oxynitride layer, but this layer is in contact only with the last grown side of the EL phosphor layer. On the other side of the EL phosphor layer the high dielectric constant layer lies between the silicon oxynitride and the EL phosphor layer.
    Type: Grant
    Filed: July 19, 1988
    Date of Patent: January 30, 1990
    Assignee: Planar Systems, Inc.
    Inventor: Sey-Shing Sun
  • Patent number: 4894116
    Abstract: A process for manufacturing a TFEL panel having a plurality of side-by-side phosphor stripes of different colors includes the steps of placing a thin film phosphor layer of a first color producing phosphor on top of transparent electrodes covered by an insulator and subjecting the phosphor to an etching process to leave thin elongate stripes. A second phosphor layer is deposited over the first phosphor stripes and the etch is repeated to leave adjacent stripes of a second color-producing phosphor. An insulating layer and a second set of electrodes are placed atop the stripes to complete the panel which is supported on a glass substrate.
    Type: Grant
    Filed: January 13, 1989
    Date of Patent: January 16, 1990
    Assignee: Planar Systems, Inc.
    Inventors: William A. Barrow, Richard T. Tuenge, Hal Merritt
  • Patent number: 4893319
    Abstract: A clock regeneration circuit employing a digital phase locked loop for locking a video data signal to both a synchronization signal and a clock signal includes an oscillator for producing multiple phase clock signals, a synchronization latch circuit and a data latch circuit for selecting desired ones of the multiple phase clock signals, and a phase comparator for comparing the outputs of each of the latch circuits to produce an error signal which adjusts the phase of the synchronization signal to bring it into coincidence with the video data signal input. The phase adjusted synchronization signal controls the latching in the synchronization latch circuit and selects the appropriate phase of the multiple phase clock signals. In this way the horizontal synchronization pulses are locked to the video data and the locked horizontal synchronization pulses select a properly phased clock signal. In a matrix-addressed visual display, this ensures that the appropriate pixels are illuminated at the proper time.
    Type: Grant
    Filed: December 19, 1988
    Date of Patent: January 9, 1990
    Assignee: Planar Systems, Inc.
    Inventor: Michael J. Ziuchkovski
  • Patent number: 4802873
    Abstract: A solid filler material is used to encapsulate active TFEL components supported by a substrate and disposed within a cavity. The cavity is created by affixing a rear cover plate to the substrate. The filler material is injected into the cavity as a liquid but cures to a solid under the influence of heat. This provides an effective moisture barrier and enhances the structural integrity of the panel rendering it immune to problems caused by changes in air pressure or caused by vibration.
    Type: Grant
    Filed: October 5, 1987
    Date of Patent: February 7, 1989
    Assignee: Planar Systems, Inc.
    Inventors: William A. Barrow, Richard Schmachtenberg, III
  • Patent number: 4801844
    Abstract: A hybrid full color TFEL display device includes a pair of independently addressable matrix arrays on stacked substrates wherein the front substrate includes patterned phosphors arranged as alternating stripes, and the rear substrate includes a single phosphor layer. The rear phosphor layer may be either a red or blue emitter and the front phosphor stripes are either red-green or blue-green. The space between the stacked substrates may be filled with a dyed filler material to improve the chromaticity of the rear substrate phosphor. To achieve a full color spectrum the fill factors of the various phosphors are adjusted to be inversely proportional to respective luminance of each at the driving frequency of the panels.
    Type: Grant
    Filed: November 4, 1987
    Date of Patent: January 31, 1989
    Assignee: Planar Systems, Inc.
    Inventors: William A. Barrow, Richard T. Tuenge
  • Patent number: 4797667
    Abstract: An electrode structure for an AC matrix-addressed TFEL panel includes top and bottom sets of scanning electrodes, each located in a respective half of the panel, and top and bottom sets of data electrodes extending at right angles to the scanning electrodes where each electrode in the top and bottom set extends for a distance slightly less than halfway across the panel to provide a split screen display. The scanning electrodes are driven by driver amplifiers that simultaneously energize complimentary pairs of the scanning electrodes in the top and bottom halves of the panel driving them in line-by-line fashion. The top and bottom sets of data electrodes are driven simultaneously by top and bottom sets of electrode drivers simultaneously with each scan of the data electrodes. In this way the top and bottom halves of the panel are scanned simultaneously, and the writing of one frame of data is faster. Also, the column electrodes are shorter and therefore require less energy and consume less power per frame.
    Type: Grant
    Filed: November 2, 1987
    Date of Patent: January 10, 1989
    Assignee: Planar Systems, Inc.
    Inventors: Brian J. Dolinar, Robert T. Flegal, Larry L. Lewis
  • Patent number: 4751427
    Abstract: A highly efficient, AC-excited, blue light-emitting phosphor for solid-state thin-film electro-luminescent (TFEL) devices is comprised of strontium sulphide (SrS) host material doped with cerium fluoride (CeF.sub.3) acting as an emitter providing a source of photons. The blue SrS:CeF.sub.3 phosphor is about one hundred times brighter than the brightest zinc sulphide/thulium fluoride (ZnS:TmF.sub.3) blue phosphor heretofore known. To increase brightness level, at some loss of energy efficiency, electron-injection layers of zinc sulfide (ZnS) are placed on either side of the SrS:CeF.sub.3 layer in the TFEL device.
    Type: Grant
    Filed: July 16, 1986
    Date of Patent: June 14, 1988
    Assignee: Planar Systems, Inc.
    Inventors: William A. Barrow, Christopher N. King, Richard E. Coovert, Ronald O. Petersen
  • Patent number: 4739320
    Abstract: A driving architecture for a matrix addressed TFEL display includes upper and lower data electrode arrays divided by a narrow gap and scanning electrodes arranged in complementary pairs one for each array of data electrodes. The data electrodes are charged at a rate which minimizes the power loss in the resistive component of the data electrode circuitry. The top and bottom data electrode arrays may be driven simultaneously, thereby decreasing the time needed to scan the panel, thus permitting more electrodes and larger screens. The split-screen array provides shorter data electrodes which take less time to charge, thus permitting use of energy-saving techniques which require a slower charging rate.
    Type: Grant
    Filed: April 30, 1985
    Date of Patent: April 19, 1988
    Assignee: Planar Systems, Inc.
    Inventors: Brian J. Dolinar, Robert T. Flegal, Larry L. Lewis
  • Patent number: 4733228
    Abstract: A drive network for a TFEL panel includes a series resonant drive circuit for producing pulses of a predetermined frequency, a transformer for coupling the drive circuit to a TFEL panel, and symmetrically driven push-pull row drivers, a plurality of which may be implemented on a single integrated circuit chip. The transformer includes switching means for alternately providing positive and negative high-voltage pulses for the row drivers on alternate frames of data. The network formed by the series resonant drive circuit and the TFEL panel is a series RLC circuit which is driven at its resonant frequency.
    Type: Grant
    Filed: July 31, 1985
    Date of Patent: March 22, 1988
    Assignee: Planar Systems, Inc.
    Inventor: Robert T. Flegal