Abstract: A method for scaling a first channel of an image. The method comprises computing a low resolution second channel of the image based on a transformation of the second channel with a transformation function used to transform a high resolution channel into a low resolution channel; computing a correlation function between the low resolution second channel and the first channel; determining a predicted second channel having the high resolution from the low resolution second channel according to a prediction method; computing a high-pass second channel based on the difference between the second channel and the predicted second channel and based on the correlation function; and determining a predicted first channel having the high resolution from the first channel according to the prediction method.

Abstract: An impedance matching circuit for matching planar antennas includes a signal path with a signal path input and a signal path output. A first capacitive element with variable capacitance is connected between the signal path input and signal path output. A second capacitive element with variable capacitance is connected between the signal path and ground. A first inductive element is connected between the signal path input and ground. A second inductive element is connected between the signal path output and ground. An antenna line with an impedance between 30 and 60 ohm is connected to the signal path output.

Abstract: A method and NoC design tool is disclosed that automatically maps the paths listed in a timing report and the unit size in an area report to the topology of a NoC and displays the paths and unit sizes in a GUI. The tool can also automatically add pipeline stages, separated by the maximum delay allowed in the timing budget, in order to achieve timing closure in an automated way.

Abstract: Embodiments are directed towards determining within a digital camera whether a pixel belongs to a foreground or background segment within a given image by evaluating a ratio of derivative and deviation metrics in an area around each pixel in the image, or ratios of derivative metrics across a plurality of images. For each pixel within the image, a block of pixels are examined to determine an aggregate relative derivative (ARD) in the block. The ARD is compared to a threshold value to determine whether the pixel is to be assigned in the foreground segment or the background segment. In one embodiment, a single image is used to determine the ARD and the pixel segmentation for that image. Multiple images may also be used to obtain ratios of a numerator of the ARD, useable to determine an extent of the foreground.

Abstract: A system and method are disclosed for connecting PCI-ordered agents based on fully independent networks. The system and method are free of PCI topology constraints, so that the system and method can be implemented in an inexpensive and scalable way. The method disclosed is used to handle and transport PCI-ordered traffic on a fabric. Based on the actual ordering requirement of the set of PCI agents, the fabric includes two, three, or four independent networks.

Abstract: A circuit is proposed by means of which a ceramic component having two electrodes can be provided with a uniform, but periodically alternating BIAS voltage. The component has properties dependent on the level of the BIAS voltage and, for the purpose of an increased service life, is connected to a generator for generating a BIAS voltage and to means for periodically reversing the polarity of the BIAS voltage present at the electrodes. In a method for operating the component having variable properties, a uniform BIAS voltage, the polarity of which is periodically reversed, however, is applied to the electrodes, and the service life of the component is thus increased.

Abstract: A circuit includes a signal path having a node between a signal path input and a signal path output. A first inductive element is connected between the signal path input and the node and a first capacitive element whose capacitance is variably adjustable is connected between the node and the signal path output. A second variable-capacitance capacitive element is connected between the signal path input and ground. A second inductive element is connected between the node and ground, and a third inductive element is connected between the signal path output and ground.

Abstract: A cache coherency controller, a system comprising such, and a method of its operation are disclosed. The coherency controller ensures that target-side security checking rules are not violated by the performance-improving processes commonly used in coherency controllers such as dropping, merging, invalidating, forwarding, and snooping. This is done by ensuring that requests marked for target-side security checking and any other requests to overlapping addresses are forwarded directly to the target-side security filter without modification or side effects.

Abstract: The optimal configuration of a number of optional pipeline stages within the data paths of systems-on-chip is determined by application of a solver. The solver includes variables such as: the placement of modules physically within the floorplan of the chip; the signal propagation time; the logic gate switching time; the arrival time, after a clock edge, of a signal at each module port; the arrival time at each pipeline stage; and the Boolean value of the state of activation of each optional pipeline stage. The optimal configuration ensures that a timing constraint is met, if possible, with the lowest possible cost of pipeline stages.

Abstract: A coherency controller, such as one used within a system-on-chip, is capable of issuing different types of snoops to coherent caches. The coherency controller chooses the type of snoop based on the type of request that caused the snoops or the state of the system or both. By so doing, coherent caches provide data when they have sufficient throughput, and are not required to provide data when they do not have insufficient throughput.

Abstract: A coherency controller with a data buffer store that is smaller than the volume of pending read data requests. Data buffers are allocated only for requests that match the ID of another pending request. Buffers are deallocated if all snoops receive responses, none of which contain data. Buffers containing clean data have their data discarded and are reallocated to later requests. The discarded data is later read from the target. When all buffers are full of dirty data requests with a pending order ID are shunted into request queues for later service. Dirty data may be foisted onto coherent agents to make buffers available for reallocation. Accordingly, the coherency controller can issue snoops and target requests for a volume of data that exceeds the number of buffers in the data store.

Abstract: The system of interconnections (20) for external functional blocks on a chip provided with a single configurable communication protocol, comprises two physically separate communication networks (21, 22): a request network (21) for transmitting request messages from an initiating block (23, 24, 25, 26) to a recipient block (27, 28, 29, 30, 31) and a response network (22) for transmitting response messages from a recipient block (27, 28, 29, 30, 31) to an initiating block (23, 25, 26). The response messages include additional information making said request (21) and response (22) networks able to respectively manage the request messages and the response messages independently.

Abstract: Various methods are described to characterize interferometric modulators or similar devices. Measured voltages across interferometric modulators may be used to characterize transition voltages of the interferometric modulators. Measured currents may be analyzed by integration of measured current to provide an indication of a dynamic response of the interferometric modulator. Frequency analysis may be used to provide an indication of a hysteresis window of the interferometric modulator or mechanical properties of the interferometric modulator. Capacitance may be determined through signal correlation, and spread-spectrum analysis may be used to minimize the effect of noise or interference on measurements of various interferometric modulator parameters.

Abstract: A microelectromechanical systems device having an electrical interconnect between circuitry outside the device and at least one of an electrode and a movable layer within the device. A layer of the electrical interconnect is formed directly under, over, or between a partially reflective layer and a transparent layer of the device. The layer of the electrical interconnect preferably comprises nickel.