Patents Assigned to Raytheon Systems Limited
  • Publication number: 20200173782
    Abstract: A method and apparatus for improving a dead reckoning estimate of a mobile unit is described. When an accurate position cannot be determined for a mobile unit, for example if GPS is unavailable, a dead reckoning estimate can be improved when two or more mobile units share their position estimates and the shared position estimates are used with either the range between the two units or knowledge that the units are within a threshold distance of each other to refine the position estimate of at least one unit.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 4, 2020
    Applicant: Raytheon Systems Limited
    Inventor: Aled Catherall
  • Patent number: 10665703
    Abstract: The lateral bipolar junction transistor has a silicon carbide layer, the silicon carbide layer comprises a base region with a first conductivity type, a collector region with a second conductivity type and an emitter region with a second conductivity type. The collector region and the emitter region are within the base region, and the base region, collector region and emitter region are all arranged along an upper surface of the silicon carbide layer.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: May 26, 2020
    Assignee: Raytheon Systems Limited
    Inventors: David Trann Clark, Ewan Philip Ramsay
  • Patent number: 10598494
    Abstract: A method and apparatus for improving a dead reckoning estimate of a mobile unit is described. When an accurate position cannot be determined for a mobile unit, for example if GPS is unavailable, a dead reckoning estimate can be improved when two or more mobile units share their position estimates and the shared position estimates are used with either the range between the two units or knowledge that the units are within a threshold distance of each other to refine the position estimate of at least one unit.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: March 24, 2020
    Assignee: Raytheon Systems Limited
    Inventor: Aled Catherall
  • Publication number: 20180301548
    Abstract: The lateral bipolar junction transistor has a silicon carbide layer, the silicon carbide layer comprises a base region with a first conductivity type, a collector region with a second conductivity type and an emitter region with a second conductivity type. The collector region and the emitter region are within the base region, and the base region, collector region and emitter region are all arranged along an upper surface of the silicon carbide layer.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 18, 2018
    Applicant: Raytheon Systems Limited
    Inventors: David Trann Clark, Ewan Philip Ramsay
  • Publication number: 20180301379
    Abstract: The method of manufacturing an integrated circuit includes obtaining a silicon carbide substrate of a first conductivity type having an epitaxial layer of a second conductivity type thereon. A dopant is implanted in the epitaxial layer to form a first region of the first conductivity type that extends the full depth of the epitaxial layer. A first transistor is formed in the first region and a second transistor is formed in the epitaxial layer.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 18, 2018
    Applicant: Raytheon Systems Limited
    Inventors: David Trann Clark, Robin Forster Thompson
  • Publication number: 20180058856
    Abstract: A method and apparatus for improving a dead reckoning estimate of a mobile unit is described. When an accurate position cannot be determined for a mobile unit, for example if GPS is unavailable, a dead reckoning estimate can be improved when two or more mobile units share their position estimates and the shared position estimates are used with either the range between the two units or knowledge that the units are within a threshold distance of each other to refine the position estimate of at least one unit.
    Type: Application
    Filed: August 24, 2017
    Publication date: March 1, 2018
    Applicant: Raytheon Systems Limited
    Inventor: Aled Catherall
  • Patent number: 7719459
    Abstract: A method and apparatus for determining a value of each bit in a secondary radar response pulse train sampled at a bit rate greater than one sample per bit is provided. The received signal is sampled repeatedly over a bit period. A scale factor for a weighting function is defined based on the amplitude levels detected from the response preamble. The weighting function has a maximum positive value at the expected bit amplitude for the first half of the bit period and decays to zero at higher amplitudes so that the effect of very large samples will be negligible. For lower amplitudes, the weighting decays to zero at the threshold level and becomes increasingly negative until zero amplitude. In the second half of the bit period the sign of the weighting function is swapped compared to the first half. The amplitude samples taken during the bit period are then each applied to the weighting function and the sum of the weighting function for the samples taken over the bit period is calculated.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: May 18, 2010
    Assignee: Raytheon Systems Limited
    Inventors: Martin Stevens, Quenton Jones