Abstract: A wireless signal processor for handling a plurality of wireless sessions comprises a plurality of baseband receivers, one for each session, each receiver producing a digital output, a multiplexer for multiplexing the plurality of digital outputs into a single data stream, a digital signal processor for converting the stream of multiplexed data into a media access controller format, and a media access controller for demultiplexing and framing the stream of data into a plurality of data buffers, one data buffer for each wireless session.

Abstract: A integrated system for generation of packet detection, symbol timing, and coarse frequency offset for an orthogonal frequency division multiplexed (OFDM) receiver having a stream of input symbols applied comprises a first multiplier performing a multiplication on a delayed and conjugated stream of input symbols multiplied by the input symbol stream. The output of the first multiplier is summed over a symbol length. A second multiplier has an output formed from multiplying the delayed symbol stream by its conjugate, thereby providing a signal strength term Pn. The output of the second multiplier is summed over two symbol periods, and multiplied by a known threshold to form a threshold value. When the magnitude of cn term rises above the known threshold, this generates a packet detect output, and when the magnitude of Cn terms thereafter falls below the known threshold, this generates a symbol timing output.

Abstract: A decision processor for 802.11b codewords for 1 Mb and 2 Mb data rates includes a sliding correlator for the acquisition of correlation peaks. During a training interval, these correlation peaks are summed into a channel profile memory. The correlation peaks corresponding to a codeword are added into the channel profile memory, and correlation peaks corresponding to the inverse of this codeword are inverted and added into the channel profile memory during the training interval. After the training interval, a decision interval follows whereby correlation peaks are multiplied by the complex conjugate of the contents of the channel profile memory. The multiplication results are accumulated over a codeword window interval to produce a decision output.

Abstract: A memory controller for a wireless communication system comprises a packet buffer write system and a packet buffer read system. The packet buffer write system places packets including packet header and packet data into a packet buffer. The packet buffer read system removes packets including a packet header and packet data from a packet buffer. The packet buffer is arranged into a plurality of packet buffer memory slots, each slot comprising a descriptor status array location including an availability bit set to “used” or “free”, and a packet buffer memory location comprising a descriptor memory slot and a data segment memory slot. The descriptor memory slot includes header information for each packet, and the data segment memory slot includes packet data. The memory controller operates on one or more queues of data, and data is placed into a particular queue in packet memory determined by priority information derived from incoming packet header or packet data.

Abstract: A quantizer has a plurality of decision blocks, each coupled from input to output, where each decision blocks output generates a binary value that is an unchanged decision block input if the decision block input is below the threshold input level divided by a power of 2, or the decision block subtracts a threshold divided by the power of 2 and passes this result as the decision block output. The quantizer output is formed from the bits of each comparison from each decision block. The threshold is developed from a channel noise variance which may be multiplied by a scale factor related to coding type and rate. In this manner, a large number of input bits to be quantized may be converted to a smaller number of quantizer output bits, while preserving the dynamic range information required to correctly decode signals passed through a communications channel having multi-path frequency selective fading.

Abstract: A baseband receiver having quadrature analog outputs and a plurality of analog control and status signals and a transmit modulator having analog quadrature inputs and a plurality of analog control and status signals are coupled to a transmit processor having a digital output and a plurality of digital control and status signals and to a receive processor having a digital input and a plurality of digital control and status signals by multiplexing analog to digital converters and digital to analog converters such that during a receive time the converters are used for a receive purpose and during a transmit time, the converters are used for a transmit purpose.