Abstract: A signal processing unit for an inductive position sensor is provided. The inductive position sensor provides a first position signal and a second phase-shifted position signal, such as, a sine position signal and a cosine position signal. The signal processing unit has an integrator for integrating an integer number of periods of the first position signal respectively an integer number of periods of the second phase-shifted position signal. The position of the moving target of the position sensor is calculated from the integrated first position signal and the integrated second phase-shifted position signal.

Abstract: In an embodiment, a semiconductor device is disclosed. The semiconductor device includes a plurality of output pins. Each of the output pins is electrically connected to an input pin of a buzzer and to a buzzer driver. The buzzer driver is configured to cause the buzzer to emit an audible sound. The semiconductor device further includes a plurality of ground switches. Each ground switch is configured to connect a corresponding output pin of the plurality of output pins to ground when closed. The semiconductor device further includes a current generator that is configured to supply a test current to a given output pin of the plurality of output pins and a clamp switch that is configured to connect the given output pin to an analog-to-digital converter.

Abstract: Apparatuses and methods for adjusting a power capability of a system is described. In an example, a system can include an antenna array and a beamformer connected to the antenna array. The beamformer can include a communication channel. The system can further include a first power converter that can be configured to convert a supply voltage to a first regulated voltage. The first power converter can apply the first regulated voltage to the beamformer. The system can further include a second power converter that can be configured to convert the supply voltage to a second regulated voltage different from the first regulated voltage. The second power converter can apply the second regulated voltage to a power amplifier in the communication channel to adjust a maximum power capability of the power amplifier.

Abstract: Systems and methods for wireless power transfer systems are described. A controller of a device can communicate with a power device by a first modulation mode. The controller can detect a failure condition between the controller and the power device. The controller can, in response to the detection of the failure condition, communicate with the power device by a second modulation mode. The first modulation mode can include capacitive modulation and the second modulation mode can include resistive modulation.

Abstract: Exemplary embodiments may include a device with an input power component, a system supply component, an inductive charger component operatively coupled to the input component and the system component, and a direct charger component operatively coupled to the inductive charger and the system component. Exemplary embodiments may further include an input node of the inductive charger component and an input node of the direct charger component operatively coupled to an output node of the input power component at a first device node. Exemplary embodiments may also include a method of receiving an input power signal, obtaining a charging condition, entering a first charging state, in accordance with the obtained charging condition satisfying a first charging condition, and entering a second charging state, in accordance with the obtained charging condition satisfying a second charging condition.

Abstract: Methods and systems for operating a voltage regulator are described. A integrated circuit can be configured to adjust at least one of a deadtime parameter and a drive strength parameter of a power stage based on at least one of an input voltage being provided to a power stage, a switch node voltage of the power stage, and an output current of the power stage. A controller of the power stage can be further configured to adjust a deadtime of the power stage based on adjustment of the deadtime parameter. The controller can be further configured to adjust a drive strength of the first driver and the second driver based on adjustment of the drive strength parameter.

Abstract: Semiconductor devices for synchronizing networks are described. A semiconductor device can include an analog phase-lock loop (APLL) configured to output a first signal. The semiconductor device can further include a first digital phase-lock loop (DPLL) configured to output a second signal. The semiconductor device can further include a second DPLL configured to output a third signal. A combination of the first signal and the second signal can be used to generate a first output clock signal. A difference resulting from a subtraction of the second signal from the third signal can be used to generate a second output clock signal.

Abstract: A wireless transmitter coordinates changes in the transmitter's input or output voltages with changes in the transmitter's operating frequency to counteract the transmitter's output power changes while changing the voltages. When the voltages are being increased, the output frequency is moved away from the resonant frequency. Consequently, the output power increase due to the increased voltages is restrained by the frequency change. Before or after the voltage increase, increased output power can be obtained by changing the output frequency while the input and output voltages are held constant or near constant. Some embodiments follow similar procedures when reducing the transmitter's input or output voltages. Calibration is performed before power transfer to determine suitable voltage and frequency profiles for voltage change operations. Other features are also provided.

Abstract: In an embodiment, an apparatus is disclosed that includes a duty cycle controller. The duty cycle controller includes a tuning circuit comprising a first field-effect transistor. The first field-effect transistor is configured to implement a capacitor. The duty cycle controller further includes an edge delay circuit. The edge delay circuit includes a second field-effect transistor that, when activated by an input clock signal of the duty cycle controller, is configured to connect a voltage source to an output clock signal of the duty cycle controller. The edge delay circuit further includes a third field-effect transistor that, when activated, is configured to connect the first field-effect transistor of the tuning circuit to the output clock signal.

Abstract: Methods and systems for operating a transceiver are described. A transceiver can include an upconverting mixer, a downconverting mixer, a controller, and an envelope detector. The upconverting mixer can mix an input signal with a local oscillator (LO) signal to generate a transmitter signal. The envelope detector can receive the transmitter signal outputted from the upconverting mixer and output an envelope of the transmitter signal to an output line of the downconverting mixer. The envelope can indicate at least one of a leaked LO signal and an image signal. The controller can receive a calibration parameter that is based on at least one of the leaked LO signal and image signal and calibrate the upconverting mixer based on the calibration parameter.

Abstract: Systems, apparatuses, and methods for charging a bootstrap capacitor of a device during low power states are described. In an example, an apparatus can include a controller configured to enable a low power state of the device. The device can include a high side switching element and a low side switching element. The controller can, in response to the low power state of the device being enabled, operate the low side switching element of the device to charge the bootstrap capacitor of the device. The controller can, in response to the low power state of the device being enabled and a level of a control signal being a first level, activate the low side switching element to charge the bootstrap capacitor of the device.

Abstract: Systems and methods for wireless power transfer systems are described. A controller of a device can communicate with a power device by a first modulation mode. The controller can detect a failure condition between the controller and the power device. The controller can, in response to the detection of the failure condition, communicate with the power device by a second modulation mode. The first modulation mode can include capacitive modulation and the second modulation mode can include resistive modulation.

Abstract: In an embodiment, an apparatus an apparatus including a memory module is described. The memory module can include a plurality of memory ranks and a register clock driver (RCD) coupled to the plurality of memory ranks. The RCD can include a receiver configured to receive a chip select signal for selecting one or more memory ranks. The RCD can further include a logic circuit coupled to the receiver, and an output driver coupled to the logic circuit. The RCD can further include a loopback circuit configured to sample the chip select signal from one or more of a first sampling point between the receiver and the logic circuit and a second sampling point between the logic circuit and the output driver.

Abstract: According to certain general aspects, the present embodiments relate generally to securing communication between ECUs. Example implementations can include a method of securely transmitting Controller Area Network (CAN) protocol frames via a CAN controller.

Abstract: Systems and methods for adaptive voltage regulation are described. According to an example, a method for operating a charger may include setting, by a charger controller of the charger, a maximum regulation voltage threshold and a minimum regulation voltage threshold, the minimum regulation voltage threshold being a predetermined percentage of the maximum regulation voltage threshold, the predetermined percentage ranging from between about 90% and about 98%; setting, by the charger controller, a charger regulation voltage to the maximum regulation voltage threshold; determining, by a battery monitor, a state of charge of a battery module; and operating the charger at the maximum regulation voltage threshold until the battery module is maximally charged.

Abstract: Systems and methods for operating a battery charger are described. A controller of a battery charger can switch an operation mode of a battery charger to a forced battery mode. The controller can detect whether the operation mode successfully switched to the forced battery mode or failed to switch to the forced battery mode. The controller can, in response to the operation mode successfully switched to the forced battery mode, determine the battery charger is connected to a battery. The controller can, in response to the operation mode failed to switch to the forced battery mode, determine an occurrence of a failure condition associated with the battery charger.

Abstract: In an embodiment, an apparatus is disclosed that includes a power management integrated circuit (PMIC). The PMIC includes a voltage regulator supplied by a first power source and configured to generate a first output and a charge pump supplied by a second power source and configured to generate a second output. A bias voltage output of the power management integrated circuit is generated based at least in part on the first output and the second output. The charge pump is configured to adjust the second output based at least in part on a comparison between the bias voltage output and a reference voltage.

Abstract: According to an example, a structure is generally described. The structure may include an inductor core having a plurality of surfaces; and at least one conductor integrated with at least one surface of the plurality of surfaces of the inductor core.

Abstract: Example implementations include a bandgap voltage device with a first current source operatively coupled to a bandgap input node and a bandgap output node and operable to output a first proportional-to-absolute-temperature (PTAT) current, a current mirror including a first bandgap transistor and a second bandgap transistor, and operatively coupled to the bandgap output node, and a second current source operatively coupled to the current mirror and operable to output a second PTAT current.

Abstract: Systems and methods for wireless power transfer systems are described. A controller can be coupled to a power rectifier configured to rectify alternating current power into direct current power. The power rectifier can include a first high side transistor, a second high side transistor, a first low side transistor, and a second low side transistor. The controller can be configured to selectively switch on one or more of the first high side transistor, the second high side transistor, the first low side transistor, and the second low side transistor to operate a wireless power receiver under one of a full bridge rectifier mode and a voltage doubler mode.