Abstract: The present invention discloses an isolated power converter circuit and a control method thereof. The isolated power converter circuit includes: a transformer circuit, a power switch circuit, an opto-coupler circuit, and a control circuit. The transformer circuit includes a first winding and a second winding. The power switch circuit is coupled to the transformer circuit to control it according to a driving signal. The opto-coupler circuit generates a feedback signal. The control circuit is coupled to the power switch circuit and the opto-coupler circuit, for generating the driving signal according to the feedback signal. The control circuit includes a distinguishing circuit for distinguishing a status of the feedback signal.

Abstract: The present invention discloses a junction barrier Schottky (JBS) diode and a manufacturing method thereof. The JBS diode includes: an N-type gallium nitride (GaN) substrate; an aluminum gallium nitride (AlGaN) barrier layer, which is formed on the N-type GaN substrate; a P-type gallium nitride (GaN) layer, which is formed on or above the N-type GaN substrate; an anode conductive layer, which is formed at least partially on the AlGaN barrier layer, wherein a Schottky contact is formed between part of the anode conductive layer and the AlGaN barrier layer; and a cathode conductive layer, which is formed on the N-type GaN substrate, wherein an ohmic contact is formed between the cathode conductive layer and the N-type GaN substrate, and the cathode conductive layer is not directly connected to the anode conductive layer.

Abstract: The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.

Abstract: The present invention discloses a hybrid high voltage device and a manufacturing method thereof. The hybrid high voltage device is formed in a first conductive type substrate, and includes at least one lateral double diffused metal oxide semiconductor (LDMOS) device region and at least one vent device region, wherein the LDMOS device region and the vent device region are connected in a width direction and arranged in an alternating order. Besides, corresponding high voltage wells, sources, drains, body regions, and gates of the LDMOS device region and the vent device region are connected to each other respectively.

Abstract: The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a first conductive type substrate, wherein the substrate includes isolation regions defining a device region. The high voltage device includes: a drift region, located in the device region, doped with second conductive type impurities; a gate in the device region and on the surface of the substrate; and a second conductive type source and drain in the device region, at different sides of the gate respectively. From top view, the concentration of the second conductive type impurities of the drift region is distributed substantially periodically along horizontal and vertical directions.

Abstract: The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT device includes: a substrate, a first gallium nitride (GaN) layer; a P-type GaN layer, a second GaN layer, a barrier layer, a gate, a source, and a drain. The first GaN layer is formed on the substrate, and has a stepped contour from a cross-section view. The P-type GaN layer is formed on an upper step surface of the stepped contour, and has a vertical sidewall. The second GaN layer is formed on the P-type GaN layer. The barrier layer is formed on the second GaN layer. two dimensional electron gas regions are formed at junctions between the barrier layer and the first and second GaN layers. The gate is formed on an outer side of the vertical sidewall.

Abstract: The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device includes: a substrate, having an isolation structure for defining a device region; a drift region located in the device region, wherein from top view, the drift region includes multiple sub-regions separated from one another but are electrically connected with one another; a source and a drain in the device region; and a gate on the surface of the substrate and between the source and drain in the device region.

Abstract: The present invention discloses a current splitter circuit for splitting a supply current to multiple light emitting device strings of a light emitting device array. The current splitter circuit includes: a minimum selector circuit coupled to the multiple light emitting device strings to generate a minimum signal which indicates a minimum voltage of the light emitting device strings; and multiple current source circuits each including a first current source end coupled to a corresponding light emitting device string, a second current source end coupled to ground, and a current source control end receiving a current control signal related to the minimum signal, so as to control currents through the corresponding light emitting device string.

Abstract: The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.

Abstract: A charger circuit comprising: a charging path coupled between an input voltage and a battery; a power switch on the charging path; a switch control circuit controlling the power switch; a timer counting a charging period; and a low current control circuit issuing a signal to the switch control circuit to control the power switch such that a charging current is maintained to be a predetermined low current when the timer counts to a predetermined maximum charging period.

Abstract: The present invention discloses a fuse circuit for final test trimming of an integrated circuit (IC) chip. The fuse circuit includes at least one electrical fuse, at least one control switch corresponding to the electrical fuse, and a resistant device. The electrical fuse is connected with the control switch in series between a predetermined pin and a grounding pin. The control switch receives a control signal to determine whether a predetermined current flows through the corresponding electrical fuse and breaks the electrical fuse. The resistant device is coupled between a bulk terminal and a source terminal to increase a resistance of a parasitic channel, such that an electrostatic discharge (ESD) protection is enhanced, and errors of final test trimming of an IC chip are avoided.

Abstract: The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a first conductive type substrate, wherein the substrate includes isolation regions defining a device region. The high voltage device includes: a drift region, located in the device region, doped with second conductive type impurities; a gate in the device region and on the surface of the substrate; and a second conductive type source and drain in the device region, at different sides of the gate respectively. From top view, the concentration of the second conductive type impurities of the drift region is distributed substantially periodically along horizontal and vertical directions.

Abstract: The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a substrate. The high voltage device includes: a gate, a source and drain, a drift region, and a mitigation region. The gate is formed on an upper surface of the substrate. The source and drain are located at both sides of the gate below the upper surface respectively, and the source and drain are separated by the gate. The drift region is located at least between the gate and the drain. The mitigation region is formed below the drift region, and the drift region has an edge closer to the source. A vertical distance between this edge of the drift region and the mitigation region is less than or equal to five times of a depth of the drift region.

Abstract: The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.

Abstract: The present invention discloses an analog photovoltaic power circuit, including: a photovoltaic device group for receiving photo energy to generate an input voltage, the input voltage corresponding to an input current; a power stage circuit for receiving the input voltage and generating an output voltage; an optimum current or voltage estimation circuit for receiving a predetermined voltage and estimating an optimum current or voltage point corresponding to an optimal output point according to a direction of variation of the input current and a direction of variation of the power generated by the photovoltaic device group; and an analog comparison and control circuit for comparing the optimum current or voltage with the input current or voltage, to thereby control the operation of the power stage circuit.

Abstract: The present invention discloses a dimming control circuit and a method for generating analog and digital signals according to an analog control signal. The dimming control circuit according to the present invention comprises an input for receiving an analog control signal; a digital dimming circuit for receiving the analog control signal and generating a digital signal; an analog dimming circuit for receiving the analog control signal and generating an analog signal; and a power circuit enabled by the digital signal for converting a supply voltage to an output voltage according to the analog signal generated by the analog dimming circuit.

Abstract: The present invention discloses an LDMOS device having an increased punch-through voltage and a method for making same. The LDMOS device includes: a substrate; a well of a first conductive type formed in the substrate; an isolation region formed in the substrate; a body region of a second conductive type in the well; a source in the body region; a drain in the well; a gate structure on the substrate; and a first conductive type dopant region beneath the body region, for increasing a punch-through voltage.

Abstract: The present invention discloses a switching regulator, a control circuit and a control method therefor. The switching regulator comprises an upper gate switch, a lower gate switch, and an inductor connected to a switching node. When a current passing through the upper gate switch or the inductor is lower than a threshold, the lower gate switch is kept OFF until a next cycle, and during the cycle wherein the lower gate switch is OFF, the upper gate switch is turned ON for a period of time.

Abstract: The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a first conductive type substrate, wherein the substrate has an upper surface. The high voltage device includes: a second conductive type buried layer, which is formed in the substrate; a first conductive type well, which is formed between the upper surface and the buried layer; and a second conductive type well, which is connected to the first conductive type well and located at different horizontal positions. The second conductive type well includes a well lower surface, which has a first part and a second part, wherein the first part is directly above the buried layer and electrically coupled to the buried layer; and the second part is not located above the buried layer and forms a PN junction with the substrate.

Abstract: A control circuit of a switching regulator, which controls rectified power within a predetermined range, detects an input voltage and an input current to generate a voltage detection signal and a current detection signal respectively, and the voltage detection signal and the current detection signal are multiplied by one the other to generate a power index. The control circuit generates an error signal according to the power index and a reference signal. A low-pass-filter filters a high frequency band in the process. A control signal generation circuit of the control circuit generates a control signal according to the error signal. And a driver circuit of the control circuit generates an operation signal according to the control signal, for switching a power switch to convert the rectified power to an output voltage.