Abstract: The present disclosure provides a field effect transistor. The field effect transistor includes: an electron transport layer; an electron supply layer disposed on the electron transport layer; a plurality of source electrodes, a plurality of drain electrodes and a plurality of gate structures disposed on the electron supply layer. Each gate structure includes a gate layer and a gate electrode disposed on the gate layer. The field effect transistor further includes: a first high resistance region, a plurality of gate connection portions, a gate wiring and an insulating layer. The first high resistance region is disposed in the electron transport layer and the electron supply layer at a position between the drain electrodes adjacent to each other along an X direction. The gate connection portions electrically connect gate structures adjacent to each other along the X direction. The gate wiring is located above the first high resistance region.

Abstract: A flip-flop circuit includes master latch including a first inverter and a first tri-state inverter, wherein the first tri-state inverter includes a first NMOS transistor and a first PMOS transistor; a slave latch including a second inverter and a second tri-state inverter, wherein the second tri-state inverter includes a second PMOS transistor and a second NMOS transistor; and at least one of a first wiring configured to connect a source of the first PMOS transistor and a source of the first NMOS transistor and a second wiring configured to connect a source of the second PMOS transistor and a source of the second NMOS transistor.

Abstract: A method for producing a semiconductor power device includes forming a gate trench from a surface of the semiconductor layer toward an inside thereof. A first insulation film is formed on the inner surface of the gate trench. The method also includes removing a part on a bottom surface of the gate trench in the first insulation film. A second insulation film having a dielectric constant higher than SiO2 is formed in such a way as to cover the bottom surface of the gate trench exposed by removing the first insulation film.

Abstract: A liquid laundry detergent formulation is provided, comprising: a liquid carrier; a cleaning surfactant; and a cleaning booster polymer, wherein the cleaning booster polymer has structural units of a monoethylenically unsaturated carboxylic acid monomer; structural units of an ethylenically unsaturated monomer of formula (I) optionally, structural units of an ethylenically unsaturated monomer of formula (III) and optionally, structural units of an ethylenically unsaturated monomer of formula (IV)

Abstract: A semiconductor device includes a semiconductor chip having a main surface, a first conductivity type drift region formed in a surface layer portion of the main surface, and a second conductivity type column region formed in a column shape extending in the thickness direction in the drift region, the column region having a lower end portion, an intermediate portion and an upper end portion, wherein the column region has a compensation region including a low concentration portion which is formed between the lower end portion and the intermediate portion, and a high concentration portion which is formed between the intermediate portion and the upper end portion, the compensation region in which a charge balance is compensated within an impurity concentration range between the low concentration portion and the high concentration portion.

Abstract: A semiconductor device includes a semiconductor layer having a first face with a trench formed thereon and a second face opposite to the first face, a gate electrode, and a gate insulating layer. The semiconductor layer includes a first n-type semiconductor layer, a second n-type semiconductor layer, a p-type semiconductor layer, and an n-type semiconductor region. The trench is formed to penetrate through the p-type semiconductor layer and to reach the second n-type semiconductor layer. The p-type semiconductor layer includes an extended portion extending to a position closer to the second face of the semiconductor layer than the trench is. Such structure allows suppressing dielectric breakdown in the gate insulating layer.

Abstract: A semiconductor device includes a semiconductor element, a packaging material that encapsulates the semiconductor element, and a metal member electrically connected to the semiconductor element and having a protruding portion protruding from an end face of the packaging material, in which the protruding portion has a lateral peripheral edge along the end face of the packaging material, a longitudinal peripheral edge along the normal direction of the end face, and a corner peripheral edge formed by side portions that are disposed at the corners of the protruding portion and continue to the lateral peripheral edge and the longitudinal peripheral edge, and in which the corner peripheral edge includes a first side portion intersecting substantially orthogonally with the lateral peripheral edge and extending toward the end face of the packaging material and a second side portion with one end thereof intersecting substantially orthogonally with the first side portion and the other end intersecting substantially ort

Abstract: The present disclosure provides a two-component solvent-less adhesive composition. The two-component solvent-less adhesive composition contains the reaction product of (A) an isocyanate component containing the reaction product of (i) an isocyanate monomer and (ii) a first dimer acid polyester polyol; and (B) a polyol component containing (i) a second dimer acid polyester polyol and (ii) optionally, a polyol selected from a polyether polyol, a polyester polyol, and combinations thereof. The two-component solvent-less adhesive composition contains from 15 wt % to 45 wt % units derived from dimer acid, based on the total weight of the two-component solvent-less adhesive composition.

Abstract: An electronic component includes an underlay resin, and a pad electrode that has a sidewall located on the underlay resin and an uneven portion formed at a lower end portion of the sidewall.

Abstract: A transformer chip of this signal transmission device comprises a substrate, an element insulation layer, and a first transformer and a second transformer provided within the element insulation layer. The first transformer is provided with a first coil, and a second coil which is disposed facing the first coil in a z direction. The second transformer is provided with a first coil, and a second coil which is disposed facing the first coil in the z direction. The second coil of the first transformer and the second coil of the second transformer are electrically connected. The substrate includes a body part, and a substrate insulation layer formed on the surface of the body part. The element insulation layer is layered on the surface of the substrate insulation layer.

Abstract: The present disclosure provides a nitride semiconductor device. The nitride semiconductor device includes a gate layer formed on an electron supply layer; a first insulating film, formed on the gate layer and having an opening exposing the gate layer; and a gate electrode including a gate field plate portion formed on the first insulating film. A side surface of the first insulating film is located further inside the gate electrode than a side surface of the gate field plate portion. The nitride semiconductor device further includes a second insulating film covering at least side surfaces of each of the gate layer, the first insulating film and the gate electrode. The second insulating film includes a portion embedded in a recessed portion formed by a lower surface of the gate field plate portion, the side surface of the first insulating film and an upper surface of the gate layer.

Abstract: A transformer chip of a signal transmitting device has a substrate, an element insulation layer, and a first transformer and a second transformer provided within the element insulation layer. The first transformer comprises a first coil, and a second coil positioned facing the first coil in the z direction. The second transformer comprises a first coil, and a second coil positioned facing the first coil in the z direction. The second coil of the first transformer and the second coil of the second transformer are electrically connected. The transformer chip comprises a back surface insulating layer provided on the back surface of the substrate.

Abstract: The present disclosure provides a MEMS sensor. The MEMS sensor includes: a semiconductor substrate having a first surface and a second surface opposite to the first surface, and including a cavity; a membrane on the first surface to seal the cavity; a first region of a first conductivity type formed at a bottom of the cavity; and a second region of a second conductivity type formed on the membrane, facing the first region and separated from the first region by the cavity.

Abstract: The present disclosure provides a MEMS sensor. The MEMS sensor includes: a substrate, on which a first sensor region for an acceleration sensor is formed; a first cavity, formed in the first sensor region of the substrate; a first weight portion, including a first membrane formed on the first cavity; a beam portion, supporting the first weight portion; and a piezoresistor, formed in the beam portion. A first opposing surface of the first weight portion facing the first cavity and a second opposing surface of the beam portion facing the first cavity are formed on same plane.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate and a substrate-side insulating layer disposed on the semiconductor substrate. The substrate-side insulating layer includes: a first oxide film; a second oxide film, disposed on the first oxide film and separated from the first oxide film; and a first nitride insulating layer and a second nitride insulating layer disposed between the first oxide film and the second oxide film. The second nitride insulating layer has a film density higher than a film density of the first nitride insulating layer.

Abstract: Disclosed herein is a universal serial bus port controller on a source side. The universal serial bus port controller is compatible with universal serial bus Type-C. A source is equipped with the universal serial bus port controller including a power supply terminal, a power supply circuit, a switch connected between an output of the power supply circuit and the power supply terminal, a capacitor connected to the power supply terminal, and a discharge resistance and a discharge switch connected in series with each other between the power supply terminal and a ground line. The universal serial bus port controller includes an abnormality detector which detects an output voltage of the power supply terminal a plurality of times after the discharge switch is turned on and detects an abnormality on the basis of a temporal change in the output voltage.

Abstract: The present disclosure relates to an organic electroluminescent compound and an organic electroluminescent device comprising the same. By comprising the organic electroluminescent compound, an organic electroluminescent device having a low driving voltage and/or a high luminous efficiency and/or a long lifespan can be provided.

Abstract: The present disclosure relates to a buck DC/DC converter, a controller thereof and controlling method thereof, and an electronic device. A pulse modulator generates a pulse modulation signal such that an output of the buck DC/DC converter is pulse-modulated to approach a target state. An overcurrent detection circuit compares a low-side current flowing through a low-side transistor with a predetermined overcurrent threshold value to generate an overcurrent detection signal that is asserted when the low-side current is greater than the overcurrent threshold value. (i) In a first mode, the control pulse that is input to the driver circuit corresponds to the pulse modulation signal, and (ii) in a second mode, the control pulse takes a second level for a period during which the overcurrent detection signal is asserted and takes a first level during a fixed on time after the overcurrent detection signal is negated.

Abstract: A driver device supplies an output current to each coil in a stepping motor to rotate a rotor. After the polarity and magnitude of the output current for each coil have reached the target polarity and magnitude, during control for keeping the polarity and magnitude of the output current for each coil at the target polarity and magnitude, occurrence of a particular current waveform in the output current due to a back-electromotive force resulting from the rotation of the rotor is detected so that, if a particular current waveform is detected, a predetermined detection signal is transmitted to an external device.