Abstract: Reduced source resistance is realized in a laterally diffused MOS transistor by fabricating the transistor in a P-doped epitaxial layer on an N-doped semiconductor substrate and using a trench contact for ohmically connecting the N-doped source region to the N-doped substrate.
Type:
Grant
Filed:
June 13, 2008
Date of Patent:
May 31, 2011
Assignee:
Rovec Acquisitions Ltd., LLC
Inventors:
Jeff Babcock, Johan Agus Darmawan, John Mason