Abstract: A method includes forming a first region including a pair of first FinFETs and a second region including a pair of second FinFETs on a substrate. Each FinFET includes a metal gate having a first spacer adjacent thereto, and each first FinFET has a gate dielectric that is thicker than a gate dielectric of each second FinFET, such that the first FinFETs can be higher voltage input/output devices. The method forms a first contact between the metal gates of the pair of first FinFETs with a second spacer thereabout, the second spacer contacting a portion of each first spacer. The second spacer thus has a portion extending parallel to the metal gates, and a portion extending perpendicular to the metal gates. A second contact is formed between the metal gates of the pair of second FinFETs, and the second contact devoid of the second spacer.
Type:
Grant
Filed:
April 5, 2019
Date of Patent:
April 27, 2021
Assignee:
GLOBALFOUNDRIES U.S. INC.
Inventors:
Abu Naser M. Zainuddin, Christopher D. Sheraw, Sangameshwar Rao Saudari, Wei Ma, Kai Zhao, Bala S Haran
Abstract: Optical coupler structures include a waveguide having waveguide metamaterial segments aligned along a first line. A second insulator is on the first insulator and the waveguide metamaterial segments. A coupler structure is in the second insulator and has coupler metamaterial segments aligned along a second line. The first line and the second line are parallel and within a plane. A portion of the waveguide overlaps a portion of the coupler structure. The waveguide metamaterial segments intersect the plane and have first widths perpendicular to the plane, and the first widths have a first taper along the first line. The coupler metamaterial segments intersect the plane and have second widths in the direction perpendicular to the plane. The second widths have a second taper along the second line that is different from the first taper of the first widths where the waveguide overlaps the second coupler structure.
Type:
Grant
Filed:
December 23, 2019
Date of Patent:
April 27, 2021
Assignee:
GlobalFoundries U.S. Inc.
Inventors:
Bo Peng, Ajey Poovannummoottil Jacob, Yusheng Bian
Abstract: The present invention pertains to improved processes and catalysts for aromatization. The processes generally contacting a feed stream comprising a naphtha fraction having a C6 to C8 content with a catalyst pellet composition to form aromatic hydrocarbons. The catalyst pellet composition generally comprises a plurality of cylindrical pellets each pellet comprising a Group VIII metal on a zeolite. The pellets may have (a) a plurality of holes passing through the length of the cylindrical pellets, (b) a dome-shaped top and bottom, and (c) a plurality of semi-circular grooves along the length of the exterior of the cylinder.
Abstract: Disclosed are embodiments of a back end of the line (BEOL) metal structure that includes, within a metal level, a metal via, which has at least eight sides and all interior angles at 135° or more, and a metal wire thereon. The metal wire and via include respective portions of a continuous conformal metal layer. A passivation layer coats the top surface of the metal layer. The metal via and the metal wire thereon can be in an upper metal level and can be made of one metal (e.g., aluminum or an aluminum alloy). The upper metal level can be above a lower metal level that similarly includes a metal via and metal wire thereon, but the metal used can be different (e.g., copper) and/or the shape of the via can be different (e.g., four-sided). Also disclosed herein are method embodiments for forming the above-described BEOL metal structure.
Type:
Application
Filed:
October 16, 2019
Publication date:
April 22, 2021
Applicant:
GLOBALFOUNDRIES U.S. INC.
Inventors:
Dirk Breuer, Oliver M. Witnik, Carla Byloos, Holger S. Schuehrer
Abstract: The present invention provides a single-piece printed circuit board heat sink and encapsulation device configured to efficiently dissipate heat away from the printed circuit board, along with associated methodology for dispersing heat from a printed circuit board.
Type:
Grant
Filed:
October 16, 2018
Date of Patent:
April 20, 2021
Assignee:
INGERSOLL-RAND INDUSTRIAL U.S., INC.
Inventors:
Joshua O. Johnson, Vairavasundaram Swaminathan, Justin T. Chellew
Abstract: Structures including a photodetector and methods of fabricating such structures. A substrate, which is composed of a semiconductor material, includes a first trench, a second trench, and a pillar of the semiconductor material that is laterally positioned between the first trench and the second trench. A first portion of a dielectric layer is located in the first trench and a second portion of the dielectric layer is located in the second trench. A waveguide core is coupled to the pillar at a top surface of the substrate.
Type:
Grant
Filed:
November 5, 2019
Date of Patent:
April 20, 2021
Assignee:
GLOBALFOUNDRIES U.S. INC.
Inventors:
Vibhor Jain, Siva P. Adusumilli, John J. Ellis-Monaghan
Abstract: Data in physical space may be converted to layer space before performing modeling to generate one or more subsurface representations. Computational stratigraphy model representations that define subsurface configurations as a function of depth in the physical space may be converted to the layer space so that the subsurface configurations are defined as a function of layers. Conditioning information that defines conditioning characteristics as the function of depth in the physical space may be converted to the layer space so that the conditioning characteristics are defined as the function of layers. Modeling may be performed in the layer space to generate subsurface representations within layer space, and the subsurface representations may be converted into the physical space.
Type:
Grant
Filed:
December 6, 2019
Date of Patent:
April 20, 2021
Assignee:
Chevron U.S.A. Inc.
Inventors:
Lewis Li, Tao Sun, Sebastien B. Strebelle
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to n-well resistors and methods of manufacture. The structure includes: a substrate composed of a N-well implant region and a deep N-well implant region; and a plurality of shallow trench isolation regions extending into both the N-well implant region and a deep N-well implant region.
Abstract: An apparatus (10) and method for performing nonlinear elasticity measurements using the dynamic acousto-elasticity technique (DAET) at simulated subsurface conditions in the laboratory, are described. The current state-of-the-art for measuring nonlinear elasticity parameters using DAET is limited to ambient pressure conditions on the bench-top. The present invention permits nonlinear parameter measurements at controlled sample internal fluid pore pressures (52) and external confining stress (44), (50) conditions.
Type:
Grant
Filed:
March 26, 2017
Date of Patent:
April 20, 2021
Assignees:
TRIAD NATIONAL SECURITY, LLC, CHEVRON U.S.A. INC.
Inventors:
Peter M. Roberts, Harvey E. Goodman, Marcel C. Remillieux
Abstract: Integrated circuits, wafer level integrated III-V device and CMOS driver device packages, and methods for fabricating products with integrated III-V devices and silicon-based driver devices are provided. In an embodiment, an integrated circuit includes a semiconductor substrate, a plurality of transistors overlying the semiconductor substrate, and an interlayer dielectric layer overlying the plurality of transistors with a metallization layer disposed within the interlayer dielectric layer. The plurality of transistors and the metallization layer form a gate driver circuit. The integrated circuit further includes a plurality of vias disposed through the interlayer dielectric layer, a gate driver electrode coupled to the gate driver circuit, a III-V device electrode overlying and coupled to the gate driver electrode, and a III-V device overlying and coupled to the III-V device electrode.
Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to middle of line structures and methods of manufacture. The structure includes: a plurality of gate structures comprising source and/or drain metallization features; spacers on sidewalls of the gate structures and composed of a first material and a second material; and contacts in electrical contact with the source and/or drain metallization features, and separated from the gate structures by the spacers.
Type:
Grant
Filed:
January 15, 2020
Date of Patent:
April 13, 2021
Assignee:
GLOBALFOUNDRIES U.S. INC.
Inventors:
Hui Zang, Guowei Xu, Keith Tabakman, Viraj Sardesai
Abstract: In-situ upgrading of heavy hydrocarbons includes injecting into a reservoir solvent, an asphaltene precipitant additive and optionally steam, at a ratio of solvent to heavy hydrocarbon between 0.1:1 and 20:1 under reservoir conditions. The additive has C—H, C—C and/or C—O bonds that thermally crack to generate free radicals in the vapor phase after injection. Formed downhole are a blend containing an upgraded hydrocarbon, and precipitated asphaltenes. The upgraded hydrocarbon is produced such that the precipitated asphaltenes remain in the reservoir. The upgraded hydrocarbon has a greater API gravity, lower asphaltene content, and lower viscosity than the heavy hydrocarbon. The precipitated asphaltenes are present in a higher amount than a similar blend not containing the additive.
Type:
Grant
Filed:
February 7, 2018
Date of Patent:
April 13, 2021
Assignee:
CHEVRON U.S.A. INC.
Inventors:
Cesar Ovalles, Estrella Rogel, Ian Phillip Benson, Ronald A. Behrens
Abstract: Embodiments of the present disclosure provide an apparatus including mask pattern formed on a mask substrate. A plurality of spatial radiation modulators may be vertically displaced from the mask pattern, and distributed across a two-dimensional area. Each of the plurality of spatial radiation modulators may be adjustable between a first transparent state and a second transparent state to control whether radiation transmitted through the mask pattern passes through each of the plurality of spatial radiation modulators.
Type:
Grant
Filed:
October 23, 2019
Date of Patent:
April 13, 2021
Assignee:
GLOBALFOUNDRIES U.S. INC.
Inventors:
Ezra D. B. Hall, Jed H. Rankin, Alok Vaid
Abstract: A gate cut isolation including an air gap and an IC including the same are disclosed. A method of forming the gate cut isolation may include forming an opening in a dummy gate that extends over a plurality of spaced active regions, the opening positioned between and spaced from a pair of active regions. The opening is filled with a fill material, and the dummy gate is removed. A metal gate is formed in a space vacated by the dummy gate on each side of the fill material, and the fill material is removed to form a preliminary gate cut opening. A liner is deposited in the preliminary gate cut opening, creating a gate cut isolation opening, which is then sealed by depositing a sealing layer. The sealing layer closes an upper end of the gate cut isolation opening and forms the gate cut isolation including an air gap.
Abstract: A semiconductor device is provided, which includes an array of active regions, gate stacks and substantially uniform epitaxial structures. The gate stacks of the array include a first gate stack and a second gate stack over an active region. An active pillar between the first gate stack and the second gate stack, and the active pillar separating two substantially uniform epitaxial structures. A contact structure over the active pillar, positioned equidistant from the first gate stack and the second gate stack.
Type:
Grant
Filed:
June 30, 2019
Date of Patent:
April 6, 2021
Assignee:
GLOBALFOUNDRIES U.S. INC.
Inventors:
Michael V Aquilino, Daniel Jaeger, Man Gu, Bradley Morgenfeld, Haiting Wang, Kavya Sree Duggimpudi, Wang Zheng
Abstract: A catalyst system has been designed that disrupts the sedimentation process. The catalyst system achieves this by saturating key feed components before the feed components are stripped into their incompatible aromatic cores. The efficacy of this disruptive catalyst system is particularly evident in a hydrocracker configuration that runs in two-stage-recycle operation. The catalyst is a self-supported multi-metallic catalyst prepared from a precursor in the hydroxide form, and the catalyst must be toward the top level of the second stage of the two-stage system.
Type:
Grant
Filed:
August 6, 2019
Date of Patent:
April 6, 2021
Assignee:
Chevron U.S.A. Inc.
Inventors:
Theodoras Ludovicus Michael Maesen, Derek Blackwell, Viorel Duma, Varut Komalarajun, Alexander E. Kuperman, Hyunuk Ryu, Horacio Trevino, Alex Yoon, Ujjal Mukherjee
Abstract: Exemplary apparatus and optical systems for forward and side view apparatus are described. These apparatus include a light focusing element, a grating element inclined with respect to the optical axis of the apparatus, and a transparent element. The transparent element has a proximal surface in contact with the grating element and an inclined distal surface. Such apparatus can be used as spectrally encoded endoscopy (SEE) probes.
Type:
Grant
Filed:
August 4, 2016
Date of Patent:
April 6, 2021
Assignee:
Canon U.S.A., Inc.
Inventors:
Kenji Yamazoe, Anderson Mach, Zhuo Wang
Abstract: Provided is a cylinder liner having a first portion with a first thermal conductivity and a second portion with a second thermal conductivity. The first portion having the first thermal conductivity can include as-cast projections or a coating of a material, as desired. The first thermal conductivity can be greater than the second thermal conductivity. In this manner, the cylinder liner can exhibit a thermal conductivity gradient.
Abstract: Structures for a filter and methods of fabricating a structure for a filter. The filter is coupled to a waveguide core. The filter includes a first plurality of grating structures positioned adjacent to a first section of the waveguide core and a second plurality of grating structures positioned adjacent to a second section of the waveguide core. The first plurality of grating structures are configured to cause laser light in a first portion of a wavelength band to be transferred between the first section of the waveguide core and the first plurality of grating structures. The second plurality of grating structures are configured to cause laser light in a second portion of a wavelength band to be transferred between the second section of the waveguide core and the second plurality of grating structures.
Type:
Grant
Filed:
November 13, 2019
Date of Patent:
April 6, 2021
Assignee:
GLOBALFOUNDRIES U.S. INC.
Inventors:
Shuren Hu, Bo Peng, David Riggs, Karen Nummy, Kevin K. Dezfulian, Francis Afzal