Abstract: A beam deflection apparatus includes a first beam deflector that deflects light in a first direction and a second beam deflector that deflects light in a second direction perpendicular to the first direction, wherein the first beam deflector and the second beam deflector each include a first region for deflecting light of a first wavelength and a second region for deflecting light of a second wavelength, and a ratio of a spatial period of a signal applied to first drive electrodes arranged in the first region of the first beam deflector to the first wavelength is the same as a ratio of a spatial period of a signal applied to second drive electrodes arranged in the second region of the first beam deflector to the second wavelength.

Abstract: A storage device is provided. A storage device includes a non-volatile memory including a plurality of memory segments, and a storage controller connected to the non-volatile memory through a plurality of channels, each of the plurality of channels connected to a respective one of the plurality of memory segments such that each of the plurality of channels has a respective associated memory segment, wherein the storage controller is configured to generate parity according to speed information received from a host with respect to data to be written to the non-volatile memory and store the parity in at least one of the memory segments.

Abstract: An electronic device is provided. The electronic device includes a plurality of antennas, a radio frequency (RF) circuit configured to electrically connect with the plurality of antennas, and a processor. The plurality of antennas include a first main antenna, a first sub-antenna, a second main antenna, and a second sub-antenna. The processor controls the RF circuit to operate in a first mode of receiving a signal using the first main antenna and the first sub-antenna. The processor controls the RF circuit to operate in a second mode different from the first mode to receive the signal based on a signal state.

Abstract: A semiconductor package includes a mold substrate, at least one first semiconductor chip in the mold substrate and including chip pads, wiring bonding pads formed at a first surface of the mold substrate and connected to the chip pads by bonding wires, and a redistribution wiring layer covering the first surface of the mold substrate and including redistribution wirings connected to the wiring bonding wirings.

Abstract: A method of managing access to a plurality of Packet Switched (PS) networks of a wireless communication apparatus including a plurality of Subscriber Identity Modules (SIMs) includes obtaining first information indicating data service-related preferences for the plurality of SIMs, selecting at least one SIM necessary for accessing each of the plurality of PS networks from among the plurality of SIMs, based on the first information and second information indicating a wireless network capable of being provided by an operator corresponding to each of the plurality of SIMs, and accessing each of the plurality of PS networks by using the selected at least one SIM.

Abstract: A three-dimensional semiconductor device includes a lower substrate, a plurality of lower transistors disposed on the lower substrate, an upper substrate disposed on the lower transistors, a plurality of lower conductive lines disposed between the lower transistors and the upper substrate, and a plurality of upper transistors disposed on the upper substrate. At least one of the lower transistors is connected to a corresponding one of the lower conductive lines. Each of the upper transistors includes an upper gate electrode disposed on the upper substrate, a first upper source/drain pattern disposed in the upper substrate at a first side of the upper gate electrode, and a second upper source/drain pattern disposed in the upper substrate at a second, opposing side of the upper gate electrode. The upper gate electrode includes silicon germanium (SiGe).

Abstract: An atomic layer etching method capable of precisely etching a metal thin film at units of atomic layer from a substrate including the metal thin film, includes forming a metal layer on a substrate, and etching at least a portion of the metal layer. The etching at least a portion of the metal layer includes at least one etching cycle. The at least one etching cycle includes supplying an active gas onto the metal layer, and supplying an etching support gas after supplying the active gas. The etching support gas is expressed by the following general formula wherein each of R1, R2, R3, R4 and R5 independently includes hydrogen or a C1-C4 alkyl group, and N is nitrogen.

Abstract: The disclosure provides a method and a device for efficiently operating network slicing. According to the disclosure, a method of operating a first node configured to manage a network slice of a communication system includes: transmitting a service level agreement (SLA) range for each network slice subnet and a message requesting a resource according to the SLA range to a second node configured to manage the network slice subnet, receiving SLA arrangement flavor mapping relationship information in the network slice subnet unit from the second node, and identifying the SLA arrangement flavor mapping relationship in a network slice unit based on the received SLA arrangement flavor mapping relationship information in a network slice subnet unit.

Abstract: A semiconductor package includes a base substrate having a first semiconductor substrate, and a first protective layer covering a top side thereof. A first semiconductor chip is on the first protective layer. A first fillet layer fills a space between the first protective layer and the first semiconductor chip. A first side surface of the base substrate extends in a first direction, and second and third side surfaces extend in a second direction. The base substrate includes two corner regions and a side region between the corner regions. A first protective layer in the side region includes a first side trench which overlaps the first semiconductor chip. A part of the first fillet layer fills the first side trench.

Abstract: Configuring control information comprises determining a frequency offset including an RB and RE level frequency offset, where the frequency offset is determined based on a lowest RE of an SS/PBCH block and a lowest RE of CORESET for RMSI, jointly configuring, using a first field of 4 bits, the RB level frequency offset with a multiplexing pattern of the SS/PBCH block and the CORESET, a BW of the CORESET, and a number of symbols for the CORESET for a combination of a SCS of the SS/PBCH block and a SCS of the CORESET, configuring using a second field of the 4 bits generating an MIB including the RB level frequency offset and the RE level frequency offset; and transmitting, to a UE, the MIB over a PBCH.

Abstract: A processor-implemented vehicle controlling method includes: determining whether an object in a vehicle is a living object based on radio detection and ranging (radar) information received from a radar sensor; in response to a determination that the object is a living object, determining bioinformation of the object based on the radar information; and adjusting a temperature in the vehicle based on the bioinformation and temperature information received from a temperature sensor.

Abstract: A system and method for display distortion calibration are configured to capture distortion with image patterns and calibrate distortion with ray tracing for an optical pipeline with lenses. The system includes an image sensor and a processor to perform the method for display distortion calibration. The method includes generating an image pattern to encode display image pixels by encoding display distortion associated with a plurality of image patterns. The method also includes determining a distortion of the image pattern resulting from a lens on a head-mounted display (HMD) and decoding the distorted image patterns to obtain distortion of pixels on a display. A lookup table is created of angular distortion of all the pixels on the display. The method further includes providing a compensation factor for the distortion by creating distortion correction based on the lookup table of angular distortion.

Abstract: A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode including an outer protective layer, a conductive layer between opposing sidewalls of the outer protective layer, and an inner protective layer between opposing sidewalls of the conductive layer, a first supporter pattern on a side surface of the lower electrode, the first supporter pattern including a supporter hole, a dielectric layer on a surface of each of the lower electrode and the first supporter pattern, and an upper electrode on the dielectric layer. The outer protective layer includes titanium oxide, the conductive layer includes titanium nitride, and the inner protective layer includes titanium silicon nitride. In a horizontal cross-sectional view, the outer protective layer has an arc shape that extends between the dielectric layer and the conductive layer.

Abstract: A semiconductor device including a plurality of active regions extending in a first direction on a substrate; a device isolation layer between the plurality of active regions such that upper portions of the plurality of active regions protrude from the device isolation layer; a first gate electrode and a second gate electrode extending in a second direction crossing the first direction and intersecting the plurality of active regions, respectively, on the substrate, the first gate electrode being spaced apart from the second gate electrode in the second direction; a first gate separation layer between the first gate electrode and the second gate electrode; and a second gate separation layer under the first gate separation layer and between the first gate electrode and the second gate electrode, the second gate separation layer extending into the device isolation layer in a third direction crossing the first direction and the second direction.

Abstract: A CMOS image sensor (CIS) package includes a package substrate, a CIS chip arranged on an upper surface of the package substrate and electrically connected with the package substrate, a glass arranged over the CIS chip, and an adhesive layer interposed between an edge portion of an upper surface of the CIS chip and an edge portion of a lower surface of the glass to attach the glass to the CIS chip. An interlocking recess is provided to at least one of the CIS chip and the glass, and the adhesive layer comprises an interlocking protrusion inserted into the interlocking recess.

Abstract: A neural network apparatus for performing a matrix multiplication operation includes a memory having at least one program stored therein and a processor to perform one or more operations by executing the at least one program. The processor can determine whether to divide an initial weight in one of a column direction and a row direction according to whether a reshape operation and a transpose operation are performed before or after a matrix multiplication operation and generate division weights by dividing the initial weight by a head count in the determined direction. Also, the processor can generate intermediate feature maps by performing a matrix multiplication operation between the input feature map and the division weights and generate a final feature map based on the intermediate feature maps.

Abstract: An electronic device includes an antenna module including an antenna array, a radio frequency integrated circuit (RFIC) connected with the antenna array and a flexible printed circuit board connected with the RFIC, a connector disposed on the flexible printed circuit board, a communication processor disposed on a first printed circuit board, a coaxial cable electrically connecting the flexible printed circuit board and the communication processor through the connector, and a second printed circuit board configured to electrically connect the communication processor and the flexible printed circuit board. The communication processor provides a data signal to be transmitted to an external electronic device to the RFIC along a first path in the flexible printed circuit board through the coaxial cable and the connector, and provide a control signal to the RFIC along a second path in the flexible printed circuit board through the second printed circuit board.

Abstract: An on-device training-based user recognition method includes performing on-device training on a feature extractor based on reference data corresponding to generalized users and user data, determining a registration feature vector based on an output from the feature extractor in response to the input of the user data, determining a test feature vector based on an output from the feature extractor in response to an input of test data, and performing user recognition on a test user based on a result of comparing the registration feature vector to the test feature vector.

Abstract: An electronic device is provided. The electronic device includes a first housing, a second housing coupled to the first housing, a plurality of first adhesive portions arranged between the first housing and the second housing, and spaced apart from each other along a first perimeter portion of the first housing, and a plurality of second adhesive portions arranged between the plurality of first adhesive portions and arranged along a second perimeter portion of the first housing, wherein the first adhesive portions include an adhesive support portion extending in one direction and a first adhesive material arranged on one side or both sides of the adhesive support portion, and the second adhesive portions include a second adhesive material.