Abstract: Semiconductor devices may include a substrate, an active region that is on the substrate and extends in a first direction, a gate structure that traverses the active region and extends in a second direction that may be different from the first direction, a source/drain region on the active region adjacent a side of the gate structure, an insulating layer on the substrate, the gate structure and the source/drain region, and a contact structure that is in the insulating layer and is connected to the source/drain region. In the source/drain region, a contact region that is in contact with the contact structure includes first and second side regions spaced apart from each other in the second direction and a central region between the first and second side regions, and at least one of the first and second side regions may include a recess.

Abstract: An image sensor includes a pixel group. The pixel group includes a first color filter, first to third photodiodes below the first color filter such that the first color filter overlaps each of the first to third third photodiodes in a vertical direction, wherein the first to third photodiodes are arranged in a first direction perpendicular to the vertical direction, first to third floating diffusions configured to accumulate electric charges generated by the first to third photodiodes, respectively, a source follower transistor configured to output a first pixel signal based on the electric charges accumulated in at least one of the first to third floating diffusions, and a first metal layer configured to receive the first pixel signal from the source follower transistor, wherein the first metal layer extends in a second direction intersecting the first direction, wherein the first to third floating diffusions are arranged in the first direction.

Abstract: A multi-processor system includes a plurality of processors, a scheduler, and a selector. Each of the plurality of processors is included in at least one of a plurality of domains. The plurality of domains include three or more domains and are defined based on a hierarchical domain structure. The scheduler receives and manages at least one task performed by the plurality of processors. The selector selects one of the plurality of domains based on states of the plurality of domains to assign the at least one task to the selected domain, and selects at least one processor among processors in the selected domain based on states of the processors in the selected domain to assign the at least one task to the selected processor, when the at least one task is received.

Abstract: An apparatus for obtaining bio-information may include a pulse wave sensor including a light source and a detector. The light source is configured to emit multi-wavelength light to an object of interest and the detector is configured to detect light reflected from the object. In addition, the apparatus may include a processor configured to obtain a change in volume of a blood vessel based on one or more of quantity of detected multi-wavelength light and absorbance coefficients of respective wavelengths of the multi-wavelength light and obtain bio-information based on the measured change in volume of the blood vessel.

Abstract: A method performed by a first user equipment (UE) in a vehicle to everything (V2X) communication system, the method comprising: measuring, at least one parameter related to signal quality between the first UE and a cellular network; identifying a first event among a preconfigured set of events based on measuring of the at least one parameter; and transmitting, to a second UE, first information including information related to the first event and second information related to the first UE, based on a trigger of the first event, wherein the first information and the second information are for a prediction of the second UE associated with a state change of the cellular network, and wherein an operation of the second UE is based on the prediction.

Abstract: An electronic device is provided. The electronic device includes frame constituting at least a part of the side exterior of the electronic device, an internal mechanical element disposed inside the frame, multiple frame holes formed through the frame at a predetermined interval in an identical shape, an air channel comprising a first hole, at least a part of which is formed through the internal mechanical element in a first direction so as to be connected to at least one of the multiple frame holes, and a second hole formed through the internal mechanical element in a direction perpendicular to the first direction so as to be connected to the first hole, an air vent disposed in the second hole of the air channel, and a speaker channel connected to remaining holes of the multiple frame holes and connected to a speaker module.

Abstract: A storage device includes a non-volatile memory; a volatile memory; and a storage controller configured to: receive a new data and append data write command from a host, write new data and append data to at least one of the non-volatile memory and the volatile memory, receive, from the host, a remap command including mapping information between old data and the new data and a first identification (ID), based on the remap command, store in the volatile memory the mapping information between the old data and the new data and the first ID, receive, from the host, a metadata write command requesting writing meta data for the append data and including the first ID, and based on the metadata write command, update the mapping information between the old data and the new data, and write metadata related to the append data to the non-volatile memory.

Abstract: Disclosed herein is a washing machine and a control method thereof, and more particularly, to a technology capable of controlling washing modes in various manners by manipulating a control panel of the washing machine. The washing machine includes a display configured to display a washing mode, an inputter configured to receive a washing mode select command, a storage configured to store a selected washing mode, and a controller configured to allow a washing mode, which has the largest number of times selected during a predetermined number of times of washings, to be displayed on a first screen of the display, and in response to the number of the washing mode having the largest number of selection times being plural, configured to allow a washing mode, which is the last selected among the plurality of washing modes, to be displayed on the first screen of the display.

Abstract: Disclosed is an integrated circuit including intellectual property (IP) pieces including test logics, respectively, a scanner configured to collect debugging data from the test logics of the IP pieces, and an encryption circuit configured to convert the debugging data into an encrypted data form.

Abstract: Disclosed is a storage device comprises a non-volatile memory configured to store data; a storage controller configured to determine a time to back up recovery data when a sudden power-off occurs and to perform a data dump operation according to a dump level determined based on the determined time when a user data dump fails; and a power loss protection (PLP) integrated circuit configured to measure at least one of a discharge time or remaining time of an auxiliary power supply when the sudden power-off occurs and to provide at least one of discharge time information or remaining time information to the storage controller, wherein the storage controller is configured to determine a minimum recovery data backup time in case of a user data dump failure using the at least one of the discharge time information or the remaining time information.

Abstract: A semiconductor device includes a semiconductor chip including a semiconductor integrated circuit, and a cooling channel including at least a first portion that is inside the semiconductor chip, a wall surface including a fine pattern configured to generate a capillary force that causes a liquid coolant to flow in the cooling channel, a liquid channel area in a first area of the cooling channel where the fine pattern is formed and configured to pass the liquid coolant, and a gas channel area in a second area of the cooling channel where the fine pattern is not formed and configured to pass a gaseous coolant.

Abstract: Provided in various embodiments of the present disclosure are a device for measuring the load of food materials put on a tray in a cooking apparatus, and a control method therefor. To this end, the cooking apparatus has a stick-shaped guide rod extending in the vertical direction toward the bottom of a cavity from the lower side of an accommodation tray to which each of a plurality of rollers making roll-contact with the bottom surface of the tray can be independently mounted, has a first coupling part formed on a load-transferring member such that the lower end portion of the guide rod is fitted and fixed therein, and generates an electrical signal in a load cell due to the load transferred by the load-transferring member. Other various embodiments are possible.

Abstract: Provided is a dynamic vision sensor. The dynamic vision sensor includes: a pixel array including a plurality of pixels arranged in a plurality of rows and a plurality of columns, wherein each of the plurality of pixels is configured to detect a change in intensity of incident light; and a readout circuit configured to simultaneously select first pixels of first target columns among the plurality of columns in a first section of a binning operation, and generate and output first binning event signals of first binning pixel groups based on first event signals simultaneously output from the first pixels.

Abstract: An outdoor unit of an air conditioner, including a cabinet; a heat exchange room inside the cabinet; a component room case at one side of the heat exchange room, including an opening in a first side of the component room case; a component room inside the component room case; an electric component in the component room; a case cover to cover the opening of the component room case; a sealing member between the component room case and the case cover; a duct at a second side of the component room case, and connected to the heat exchange room; and a duct hole in the second side of the component room case connecting the component room case and the duct. The component room case and the duct are configured so that a refrigerant in the component room flows through the duct hole, and then the duct, to outside of the cabinet.

Abstract: An electronic device includes a vibration sensor; a microphone; memory storing at least one instruction; and at least one processor, wherein the at least one processor is configured to execute the at least one instruction to: receive, via the microphone, a speech signal including reverberation uttered by a user, receive, via the vibration sensor, a vibration signal related to the speech signal, transmitted through at least a portion of a body of the user, predict reverberation information based on the speech signal and the vibration signal, and eliminate the reverberation included in the speech signal based on the predicted reverberation information.

Abstract: A method of operating a memory device which is configured to communicate with a host device, and which includes a memory cell array and a processing-in-memory (PIM) chip, including loading activation data and weight data from the memory cell array, by the PIM chip; generating pruned activation data by performing a first pruning operation on the activation data, by the PIM chip; providing the pruned activation data to the host device, by the PIM chip; generating pruned weight data by performing a second pruning operation on the weight data, by the PIM chip; providing the pruned weight data to the host device, by the PIM chip; and storing output data corresponding to a neural network operation performed based on the pruned activation data and the pruned weight data, by the memory cell array.

Abstract: Apparatuses and methods are disclosed. The apparatus includes a bus master including processing circuitry and a bus interface. The processing circuitry is configured to control operation of the bus master such that the bus master transmits a first address to a bus slave through a bus in a first mode and to transmit a second address having a same first length as the first address to the bus slave through the bus in a second mode. The bus interface is configured to generate the second address such that the second address includes a plurality of short addresses corresponding to a plurality of special function registers of the bus slave, respectively, in the second mode.

Abstract: The present disclosure provides a semiconductor chip. In some embodiments, a semiconductor chip includes a semiconductor substrate, an integrated circuit layer formed on the semiconductor substrate, and a plurality of metal wiring layers sequentially formed on the semiconductor substrate and the integrated circuit layer. The semiconductor chip further includes a first through via structure bundle extending in a vertical direction from a first metal wiring layer of the plurality of metal wiring layers toward the semiconductor substrate and penetrating through the semiconductor substrate. The semiconductor chip further includes a second through via structure bundle spaced apart from the first through via structure bundle, extending in the vertical direction from a second metal wiring layer of the plurality of metal wiring layers toward the semiconductor substrate, and penetrating through the semiconductor substrate.

Abstract: A computing device separates a first target layer including a plurality of target patterns from an original design layout, shifts the plurality of target patterns in the first target layer based on misalignment values at positions of the plurality of target patterns to generate a second target layer, and combines the second target layer with the original design layout from which the first target layer is separated to generate a corrected design layout.

Abstract: A memory system, a memory controller are provided. The memory system includes: a memory device; and a memory controller configured to: control a patrol scrubbing operation in which data is read from and re-written to the memory device, based on a scrubbing cycle; and adaptively adjust the scrubbing cycle based on a comparison of an error count value of the memory device and a plurality of risk threshold values.