Abstract: Embodiments of the present invention relate to methods and devices where an erase count is maintained for at least one block of solid state memory. Errors are corrected in data read from the solid state memory in accordance with the associated erase count of the memory block. In some embodiments, one or more of the following error-correction operations may be effected according to the associated erase count of a memory block from which the data is read: (i) a decoder and/or decoder mode is selected; (ii) a decision to attempt correcting errors using a lighter-weight weight decoder (mode) and/or heavier weight decoder (mode) and/or faster decoder (mode) and/or slower decoder (mode) is made; (iii) a mode transition and/or error correction attempt resource budget is determined; (iv) a number of soft bits is determined; and (v) a decoding bus width size is selected.

Abstract: A memory includes cells at intersections of word lines and bit lines, word and bit line selection mechanisms and a programming mechanism. The cells on each bit line are connected in series. Cells of a word line are programmed simultaneously. For low-power reading, only some of the bit lines that intersect the word line at the programmed cells are selected and only the cells at those intersections are sensed. Another type of memory includes a physical page of cells, a sensing mechanism and a selection mechanism. Hard bits are sensed from all the cells of the physical page. Only some of those cells are selected for sensing soft bits. Another memory includes a plurality of cells, a sensing mechanism, an export mechanism and a selection mechanism. Hard and soft bits are sensed from all the cells of the plurality. Only some of the soft bits are selected for export.

Abstract: Methods, apparatus and computer readable medium for handling error correction in a memory are disclosed. In some embodiments, after an attempt is made to write original data to a ‘target’ memory, data is read back from the target memory in a ‘first read operation’, thereby generating first read data. After the first read operation, the first read data is compared to the original data and/or an indication of a difference between the original data and the first data is determined. The information obtained by effecting the data-comparison and/or information related to the difference indication is used when correcting errors in data read back from the target memory in a ‘second read operation.’. The presently-disclosed teachings are applicable to any kind of memory including (i) non-volatile memories such as flash memory, magnetic memory and optical storage and (ii) volatile memory such as SRAM or DRAM.

Abstract: In a nonvolatile memory, that includes cells organized in a plurality of bit lines and a plurality of word lines, user data are stored in respective portions of each of two of the word lines. Control information is stored in a cell that is common to one of the bit lines and one of the two word lines. A cell that is common to the bit line and the other word line is used as a reference cell. A flash memory, that includes a plurality of primary cells and a plurality of spare cells, is interrogated to determine which spare cells have been used to replace respective primary cells. At least some of the other spare cells are used as reference cells.

Abstract: A computer-readable storage medium having computer-readable code embodied thereon including: program code for restricting access, by a file system running on a host system, to a restricted area of a storage area of a storage device; and program code for enabling at least one application to access the restricted area via the file system. Preferably, the computer-readable code further includes: program code for enabling the storage device to copy data from a non-restricted area to the restricted area. Preferably, the computer-readable code further includes: program code for directing the storage device to route host-system read-requests, directed to addresses in the restricted area, to addresses in a non-restricted area. Preferably, the computer-readable code further includes: program code for applying access commands of the host system to restricted data residing in the restricted area when the host system requests access to non-restricted data addressed to a non-restricted area.

Abstract: To store, in a memory block whose word lines are written successively in a word line writing order, a plurality of data pages that are ordered by logical page address, the pages are written to the word lines so that every page that is written to any one of the word lines has a higher logical page address than any page that is written to a subsequently written word line, regardless of the sequence in which the pages are received for writing. Alternatively, the pages are written to the word lines so that for every pair of written word lines, the word line of the pair that is earlier in the writing order has written thereto a page having a higher logical page address than at least one page written to the other word line of the pair.

Abstract: Cells of a flash memory are read by determining respective adaptive reference voltages for the cells and comparing the cells' threshold voltages to their respective reference voltages. The adaptive reference voltages are determined either from analog measurements of the threshold voltages of the cells' neighbors or from preliminary estimates of the cells' threshold voltages based on comparisons of the cells' threshold voltages with integral or fractional reference voltages common to all the cells. Cells of a flash memory also are read by comparing the cells' threshold voltages to integral reference voltages, comparing the threshold voltages of cells that share a common bit pattern to a fractional reference voltage, and adjusting the reference voltages in accordance with the comparisons.

Abstract: A storage device is protected, when interfaced with a host device, by operating a security processor of the storage device in a “security” mode in which the security processor filters commands that are received from the host device and are targeted to the storage controller, and upon determining by the security processor that the “security” mode is no longer required, by operating the security processor in a “safe” mode in which the security processor (i) does not filter commands it receives from the host device and (ii) forwards to a storage controller of the storage device such unfiltered commands.

Abstract: A system including a portable object and a portable object holder is disclosed. Preferably, the portable object is an electronic device such as a flash memory drive such as a USB flash drive. According to some embodiments, when the portable object and the portable object holder are attached to each other, the combination is convenient for a user to carry in her pocket. While detached from each other, the portable object holder is retained in a state where the portable object holder is inconvenient for a user to carry in her pocket. Thus, the user may be less likely to forget the electronic device after use, and may be more likely to remember to replace the electronic device in or on the device holder. According to some embodiments, the portable object holder has a first state and a second state. Detachment of the portable object from the portable object holder is operative to cause the device holder to adopt the second state, where at least one dimension of the device holder is increased.

Abstract: A NAND controller for interfacing between a host device and a flash memory device (e.g. a NAND flash memory device) fabricated on a flash die is disclosed. In some embodiments, the presently disclosed NAND controller includes electronic circuitry fabricated on a controller die, the controller die being distinct from the flash die, a first interface (e.g. a host-type interface, for example, a NAND interface) for interfacing between the electronic circuitry and the flash memory device, and a second interface (e.g. a flash-type interface) for interfacing between the controller and the host device, wherein the second interface is a NAND interface. According to some embodiments, the first interface is an inter-die interface. According to some embodiments, the first interface is a NAND interface. Systems including the presently disclosed NAND controller are also disclosed. Methods for assembling the aforementioned systems, and for reading and writing data using NAND controllers are also disclosed.

Abstract: A method of using a device, including monitoring host activity in an autonomous manner, without the host reporting to the device about its activity. The method also including initiating communications from the device and using resources of the host for such communications, thereby enabling the device to function as a proactive device.

Abstract: A flash memory system that uses repeated writing of the data to achieve stable storage, is adapted for efficient cache flushing operations by utilizing a part of the non-volatile flash memory array as a designated buffer for the data, in which data integrity is retained until all repeat writing thereof is complete. Repeated writing is carried out from the designated buffer directly to the final storage locations in the flash memory array, for example using simple internal copy back operations.

Abstract: A memory device generates one or more read reference voltages rather than being explicitly supplied with each read reference voltage from an external host controller. The technique involves providing a command to the memory device that causes a reading of a set of storage elements by the memory device using a reference voltage which is different than a reference voltage used in a previous reading, where the new read reference value is not explicitly set outside the memory device. In one implementation, the memory device is provided with an initial reference voltage and a step size for generating additional reference voltages. The technique can be used, e.g., in determining a threshold voltage distribution of a set of storage elements. In this case, a voltage sweep can be applied to a word line associated with the set of storage elements, and data obtained based on the number of conductive storage elements.

Abstract: Methods, apparatus and computer readable medium for handling error correction in a memory are disclosed. In some embodiments, first data is written to the memory, and a value(s) of an operational parameter(s) that is a consequence of the writing of the first data is determined. Second data is read from the memory, and the value(s) of the operational parameter(s) may be used when correcting errors in the second data. In some embodiments, the first data is the same as the second data. The presently-disclosed teachings are applicable to any kind of memory including (i) non-volatile memories such as flash memory, magnetic memory and optical storage and (ii) volatile memory such as SRAM or DRAM.

Abstract: The present invention relates to a portable device containing software adapted to execute on and instruct a host computing device. When executing the software, the host computing device may recognize financial account fields in a web page during a browsing session and automatically fill these fields with financial account information stored on the portable device to facilitate a web-based transaction. The portable device may contain information relating to multiple financial accounts.

Abstract: Methods, apparatus and computer readable medium for writing data into a flash memory device are disclosed. In some embodiments, the data is written in a writing mode selected in accordance with an extent to which the flash memory storage device or a flash die thereof is full of previously-stored data. The presently disclosed techniques may be implemented on the “device-side” (for example, by a device controller of the flash device) and/or on the “host-side.” In some embodiments, the selected writing mode is a bits-per-cell density mode. In some embodiments, the selected writing mode is a “slower” or “faster” writing mode. The presently disclosed techniques relate to SBC as well as MBC devices.

Abstract: A computing system having a host device and at least one client device having a lock used to prevent modification of data in the client device. A lock clear signal from the host device causes the client device to clear a lock used to prevent modification of data stored in at least a protected portion of the client device where the client device remains fully operational.

Abstract: In one aspect, a method of transferring data over a plurality of communication lines is described. A first command is sent from a master device coupled with the communication lines to a first destination slave device coupled with the communication lines instructing the first destination slave device to listen to and write data from the communication lines starting at a first time. A second command is sent from the master device to a second source slave device coupled with the communication lines instructing the second source slave device to read and output first data onto the communication lines starting at or after the first time. In this way, the first data output from the second source slave device beginning at the first time is stored by the first destination slave device beginning at the first time without requiring first transferring the data to the master device or any other device.

Abstract: A data storage device includes one or more non-volatile, blockwise erasable data storage media and a mechanism for sanitizing the media in response to a single external stimulus or in response to a predetermined physical or logical condition. Optionally, only part of the media is sanitized, at a granularity finer than the blocks of the medium. Setting a flag in an auxiliary nonvolatile memory enables an interrupted sanitize to be detected and restarted. Optionally, a “death certificate” verifying the sanitizing is issued. Preferably, the media are configured in a manner that allows atomic operations of the sanitizing to be effected in parallel.

Abstract: A method for managing page-based data storage media such as flash media, a system that uses that method, and a computer-readable storage medium bearing code for implementing the method. New data are written to the storage medium in a manner that precludes corruption of old data if the writing of the new data is interrupted. Specifically, risk zones are defined, by identifying, for each page, the other pages whose data are put at risk of corruption if writing to the page is interrupted. A page, that otherwise would be the target of a write operation, is not written if any of the pages in its risk zone contain data that could be corrupted if the write operation is interrupted.