Abstract: An apparatus, protocol and methods for reducing vehicle energy consumption and for precise electronic event control, by implementing full CPU off-loading, using pulse-width modulation (PWM) with analog feedback diagnosis enabling real-time operation. Accordingly, analog feedback is used for external integrated circuits (IC) controlled by a PWM output, for processes to be analyzed. The apparatus includes a microprocessor that integrates an autonomous PWM module and an analog-to-digital converter (ADC) group manager, each including register modules for enabling analog-to-digital signal conversion comparisons of PWM feedback data, and generating of an interrupt commands when required.

Abstract: An apparatus, protocol and methods for reducing vehicle energy consumption and for precise electronic event control, by implementing full CPU off-loading, using pulse-width modulation (PWM) with analog feedback diagnosis enabling real-time operation. Accordingly, analog feedback is used for external integrated circuits (IC) controlled by a PWM output, for processes to be analyzed. The apparatus includes a microprocessor that integrates an autonomous PWM module and an analog-to-digital converter (ADC) group manager, each including register modules for enabling analog-to-digital signal conversion comparisons of PWM feedback data, and generating of an interrupt commands when required.

Abstract: An apparatus for interfacing between a CPU and Flash memory units, enabling optimized sequential access to the Flash memory units. The apparatus interfaces between the address, control and data buses of the CPU and the address, control and data lines of the Flash memory units. The apparatus anticipates the subsequent memory accesses, and interleaves them between the Flash memory units. An optimization of the read access is therefore provided, thereby improving Flash memory throughput and reducing the latency. Specifically, the apparatus enables improved Flash access in embedded CPUs incorporated in a System-On-Chip (SOC) device.

Abstract: An apparatus, protocol and methods for configuration of a platform for prototyping and emulation of a system-on-chip (SOC) device. The apparatus is an extensible platform for configurable prototyping of SOCs using an integrated circuit board comprised of a configurable board controller and a plurality of configurable modules which implement the SOC functionality. A plurality of such platform boards may be linked together to provide emulation and prototyping functionality for a multi-core system. The protocol specifies the SOC platform configuration data, commands for configuration and reading and writing data to each module and the communications between the host computer and the platform. The apparatus uses methods for configurable execution of the configuration commands by the board controller, and for the preparation of the configuration specification by the host computer. The host computer provides a user interface for management of the configuration specification preparation.

Abstract: Apparatus and methods for video processing that integrate multiple processing modules that execute methods for simultaneous format conversion, scaling and image blending from a plurality of video sources, resulting in a video output ready for display. The modules use methods that are optimized for integration in pipeline architecture, enabling the processor to increase the number of video input sources while minimizing access to external memory. The processor combines multiple such pipelines, enabling the processor to simultaneously process a plurality of video inputs and combine these inputs into a single video output. The architecture is implemented as a hardware video processing apparatus.