Abstract: A high-order harmonics generator includes a plurality of high-pass filters to block out DC signals. In one embodiment, high-pass filters are coupled to the output signals from an envelope detector and a power detector. A high-pass filter can also be coupled to the output of a multiplier that multiplies the filtered envelope signal and the filtered power signal. Additional multipliers may also be used at outputs of multipliers in a cascaded chain of multipliers for higher harmonics generation.

Abstract: An RF squarer circuit comprises a first RF multiplier and a first variable gain transimpedance amplifier (TIA). The first RF multiplier receives an RF input signal RFIN and provides a first output current. The first TIA receives the first output current as an input. The first TIA provides an output voltage VOUT.

Abstract: Pre-distortion and memory compensation apparatuses and methods for a non-linear component are provided. The apparatus comprises an adaptive block for generating a plurality of correlation coefficients, which are used to weight a plurality of synthesis work functions to pre-distort a given signal. The adaptive block can be driven by an error signal generated from a feedback signal from the non-linear component output signal and a delayed version of the input signal. The apparatus is capable of being operated directly at radio frequency. Also provided are apparatuses and methods for generation of quadrature signals, transconductance amplification employing negative resistance, variable-gain amplification, and envelope detection.

Abstract: Pre-distortion apparatuses and methods for a non-linear component are provided. The apparatus comprises an adaptive block for generating a plurality of correlation coefficients, which are used to weight a plurality of synthesis work functions to pre-distort a given signal. The adaptive block can be driven by an error signal generated from a feedback signal from the non-linear component output signal and a delayed version of the input signal. The apparatus is capable of being operated directly at radio frequency. Also provided are apparatuses and methods for generation of quadrature signals, transconductance amplification employing negative resistance, variable-gain amplification, and envelope detection.

Abstract: A polynomial generator and memory compensator module is provided that includes: a first bank of delay filters for generating current and delayed versions of the envelope for an RF input signal and for the square of the envelope, a polynomial generator for generating polynomials using the current and delayed versions of the envelope, each polynomial being weighted according to pre-distortion weights; an adder for adding the polynomials to provide a pre-distortion signal for pre-distorting the RF input signal to provide a pre-distorted RF input signal such that a power amplifier amplifying the pre-distorted RF input signal provides an amplified RF output signal that reduces a non-linearity of the power amplifier; and a second bank of delay filters for generating delayed versions of the output signal, wherein the adder further adds the delayed versions of the output signal to the polynomials to provide the pre-distortion signal.

Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

Abstract: Systems and methods provide multi-use input/output (I/O) pads for an integrated circuit. For example in accordance with an embodiment, the multi-use pads may be shared to support different integrated circuit functions via the pads, such as selectively for high-speed signaling or general I/O.

Abstract: A continuous time equalizer for equalizing an input signal using a feedforward equalizer portion and a feedback equalizer portion is provided that includes: a slicer operable to make bit decisions on a combined output from the feedforward and feedback equalizer portions; an adaptive delay circuit operable to delay the combined output to form a delayed output; and a controller operable to control the delay provided by the adaptive delay circuit such that a first group delay through the slicer and a second group delay through the adaptive delay circuit in response to a sinusoidal form of the input signal are substantially equal.

Abstract: Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.

Abstract: A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer. The dynamic timing is controlled by a signal formed as a combination of feedback and feedforward signals. The feedback signal is an error signal related to a difference between pre-slicer and post-slicer signals. The feedforward signal is formed by differentiating and delaying the incoming data signal.

Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

Abstract: A circuit and method for reducing the DC offset in a signal produced by the mixing of two AC signals.

Abstract: Systems and methods are disclosed to provide channel monitoring and/or performance monitoring for a communication channel. For example, in accordance with an embodiment of the present invention, an equalizer is disclosed that equalizes for channel distortions and also provides channel and performance monitoring information, such as for example bandwidth estimation, channel identification, signal-to-noise ratio, chromatic dispersion, and/or polarization-mode dispersion.

Abstract: A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range.

Abstract: Systems and methods provide analog delay elements, which may be utilized in isolation or in a cascade. For example, a delay element may include a broadband amplifier and a passive, programmable filter, which may provide a desired magnitude and group delay response over a wide frequency range while being tolerant of process variations.

Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.

Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.

Abstract: A waveform shaping method comprises: (a) receiving link-distorted signal pulses; (b) passing the link-distorted signal pulses through a series of differential amplifiers each have independently tunable, base gains, peak boost gains, boost frequencies and boost bandwidths; and (c) adjusting one or more of the base gains, peak boost gains, boost frequencies and boost bandwidths of the series of differential amplifiers so as to realize a selective and progressive waveform re-shaping of the link-distorted signal pulses.

Abstract: A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer. The dynamic timing is controlled by a signal formed as a combination of feedback and feedforward signals. The feedback signal is an error signal related to a difference between pre-slicer and post-slicer signals. The feedforward signal is formed by differentiating and delaying the incoming data signal.

Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.