Abstract: A data storage device may generally be directed to a buffer that stores a plurality of command requests pending for a data storage medium and a processor that is configured to skip a first command request and execute a second command request in response to the second command request having an access latency within a first predetermined performance impact range and a power consumption within a second predetermined power savings range compared to the first command request.

Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, a non-volatile (NV) buffer is adapted to store input write data having a selected logical address. A write circuit is adapted to transfer a copy of the input write data to an NV main memory while retaining the stored input write data in the NV buffer. A verify circuit is adapted to perform a verify operation at the conclusion of a predetermined elapsed time interval to verify successful transfer of the copy of the input write data to the NV main memory. The input write data are retained in the NV buffer until successful transfer is verified.

Abstract: This disclosure is related to systems and methods for selective metadata storage in a system having multiple memories. In one example, a device may include a control circuit configured to selectively store a metadata base map in a first memory or a second memory. The metadata base map may include information to determine a physical memory address from a logical block address. The control circuit may also be configured to store metadata updates separately from the metadata base map. The metadata updates may comprise changes to the metadata base map. The control circuit may also be configured to selectively store the metadata updates in the first memory or the second memory based on characteristics of the device.

Abstract: An apparatus and associated methodology associated with a thermally conductive frame having a perimeter surface defining a passage. A printed circuit board assembly (PCBA) is operably disposed within the passage and connected to the frame. The PCBA includes a solid state memory component. An internal cover is disposed in the passage on one side of the PCBA. The internal cover conducts heat to the frame that is operably generated by the solid state memory component. An external cover is attachable to the frame on an opposing side of the PCBA. The external cover cooperates with the frame and the internal cover to enclose the PCBA.

Abstract: Methods of securely authenticating a host to a storage system are provided. A series of authentication sessions are illustratively performed. Each of the authentication sessions includes the host transmitting an authentication request to the storage system. The storage system authenticates the host based at least in part upon a content of the authentication request. After each successful authentication of the host to the storage system, an encryption key that was utilized in encrypting the authentication request that was transmitted to the storage system is deleted. After each encryption key deletion, a new encryption key that is different than the previous key is optionally stored and is utilized in the next authentication session.

Abstract: An encrypted transport SSD controller has an interface for receiving commands, storage addresses, and exchanging data with a host for storage of the data in a compressed (and optionally encrypted) form in Non-Volatile Memory (NVM), such as flash memory. Encrypted data received from the host is decrypted and compressed using lossless compression for advantageously reducing flash memory write amplification. The compressed data is re-encrypted and stored in the flash memory. The stored data is retrieved, decrypted, decompressed, and re-encrypted before delivery to the host. When implemented within a secure physical boundary, such as a single integrated circuit, the SSD controller protects the encrypted data, from receipt through storage within the flash memory, including delivery to the host. In specific embodiments, the controller exchanges session encryption/decryption keys with the host and/or uses a security protocol such as TCG Opal to determine encryption/decryption keys.

Abstract: A baseplate for attaching at least two elements includes a flange having at least one first portion with a first uniform thickness and having at least one second portion with a second uniform thickness. The second uniform thickness is less than the first uniform thickness. The baseplate further includes a boss tower that protrudes from and is contiguous with the flange. The boss tower protrudes from the at least one second portion of the flange.

Abstract: Various embodiments may be generally directed to a magnetic element capable of reading magnetic data bits. Such a magnetic element may have at least a magnetic stack laterally adjacent a side shield and non-magnetic pedestal on an air bearing surface (ABS). The non-magnetic pedestal can be configured to have a greater stripe height from the ABS than the side shield.

Abstract: Systems and methods are disclosed for writable servo zone overlap regions on a disc memory. An apparatus may comprise a controller configured to determine a servo gate (sgate) timing for an overlap zone including servo patterns of a first servo super zone and a second servo super zone of a disc memory, the sgate timing based on servo pattern timing for the first servo super zone and the second servo super zone. The controller may initiate writing to the overlap zone based on the sgate timing. The controller may also reduce the impact of servo pattern frequency change between zones by calculating a trajectory error prior to the crossing, and providing 1/X of the trajectory error into a servo feedback loop for a following X servo sampling points.

Abstract: Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a memory cell is provided with a plurality of available programming states to accommodate multi-level cell (MLC) programming. A control circuit stores a single bit logical value to the memory cell using single level cell (SLC) programming to provide a first read margin between first and second available programming states. The control circuit subsequently stores a single bit logical value to the memory cell using virtual multi-level cell (VMLC) programming to provide a larger, second read margin between the first available programming state and a third available programming state.

Abstract: A magnetic data storage medium capable of storing data bits may be configured at least with a magnetic underlayer structure and a recording structure. The recording structure can have at least a first magnetic layer and a second magnetic layer with the first magnetic layer decoupled by being constructed of an alloy of cobalt, platinum, and a platinum group metal element.

Abstract: Methods and apparatus are provided for soft data generation for memory devices based on a performance factor adjustment. At least one soft data value is generated for a memory device, such as a flash memory device, by obtaining at least one read value; and generating the soft data value based on the obtained at least one read value and an adjustment based on one or more performance factors of the memory device. The read values may be soft data or hard data. Possible performance factors include endurance, number of read cycles, retention time, temperature, process corner, inter-cell interference impact, location and a pattern of aggressor cells. One or more pattern-dependent and/or location-specific performance factors may also be considered. The generated soft data value may be a soft read value used to generate one or more log likelihood ratios or may be the log likelihood ratios themselves.

Abstract: A data reader may be configured at least with detector and injector stacks that each has a common spin accumulation layer. The detector stack may positioned on an air bearing surface (ABS) while the injector stack is positioned distal the ABS. The injector stack can have a diffusive layer with a larger spin diffusion length than mean free path.

Abstract: Methods and apparatuses for data sector cluster-based data recording are disclosed. In one embodiment, an apparatus may comprise a processor configured to receive a write request containing host data for writing to a target location of a data storage medium. A target location may comprise one or more clusters, where a cluster may be multiple sequentially-numbered data storage addresses of the data storage medium. The processor may write at least one cluster of the target location with host data and dummy data pursuant to the write request, dummy data being arbitrary data written to fill data storage addresses in the target location not written by host data.

Abstract: A data storage device may generally be constructed and operated with at least one variable resistance memory cell configured with non-factory operational parameters by a controller. The non-factory operational parameters are assigned in response to an identified variance from a predetermined threshold in at least one variable resistance memory cell.

Abstract: Certain exemplary aspects of the present disclosure are directed towards apparatuses and methods which mitigate the effect of speaker vibration on a disc drive. Audio associated with a speaker output is detected and triggers the generation of an output signal indicative of speaker vibration associated with such an audio output of a speaker. A magnetoresistive transducer of the disc drive is positioned relative to a storage medium based on the output signal, a target data storage location in the storage medium from which data is to be accessed via the positioning, and the position of the transducer. The output signal mitigates the effect of the speaker vibration on the transducer.

Abstract: Polarity transitions of a write signal applied to a write coil correspond to first bit boundaries written to a magnetic recording media. A heat signal is applied to heat the magnetic recording media via a heat source while bits are being written. The heat signal includes negative pulses that de-energize the heat source during cooling periods corresponding to the writing of the first bit boundaries. The negative pulses are offset from the polarity transitions by a predetermined time.

Abstract: An implementation of a system disclosed herein provides a method comprising detecting a power loss to an apparatus, isolating the apparatus from a power supply, notifying the apparatus of the power loss, and extending operation of the apparatus for a predetermined time period using a charge reservoir.

Abstract: Disclosed is an embodiment of a suspension for a disk drive having a slider configured for bonding with a gimbal using an adhesive. Embodiments of the slider include one or more cavities in a portion of a slider mounting surface of the slider. The one or more cavities are configured for increasing a volume of the adhesive between the slider mounting surface and the gimbal. A method of forming the one or more cavities on the slider mounting surface, and bonding together the gimbal and the slider is disclosed.