Abstract: In a particular embodiment, a system is disclosed that includes a controller to read data from and write data to a first storage medium. The controller is adapted to monitor logical block addresses (LBAs) of each read operation from the first storage medium and to selectively store files associated with the monitored LBAs that are less than a predetermined length at a second storage medium to enhance performance of applications associated with the LBAs.
Abstract: In an example, a method comprises aligning a central axis of a paddle portion on a write pole circuit to be substantially perpendicular to an adjacent magnetic surface, and bending a central axis of an extended tip portion relative to the central axis of the paddle portion. In another example, a transducer head comprises a write pole circuit having a paddle portion with a central axis, and an extended tip portion with a central axis, the central axis of the extended tip portion angled from the central axis of the paddle portion. In another example, a magnetic circuit comprises a write pole circuit having a paddle portion and an extended tip portion, the extended tip portion bending away from a central axis of the paddle portion, and a coil wrapping around the extended tip portion.
Type:
Application
Filed:
December 20, 2013
Publication date:
May 1, 2014
Applicant:
Seagate Technology LLC
Inventors:
Kirill Aleksandrovich Rivkin, Mourad Benakli, Ned Tabat
Abstract: Apparatuses having variable communication speeds are disclose. In one example, an apparatus may comprise a controller configured to: receive a signal from a host, the signal being compatible with a data communication protocol at a first data communication speed; selectively implement a first data communication protocol from a plurality of data communication protocols to communicate with a first memory or implement a second data communication protocol from the plurality of data communication protocols to communicate with a second memory based on the data communication speed; store data in the first memory via the first data communication protocol when the data communication speed is a first speed; and store data in the second memory via the second data communication protocol when the data communication speed is a second speed that is different than the first speed.
Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, an energy storage device such as a capacitive storage circuit is powered relative to the powering of one or more additional circuits from a common power supply to limit the draw upon the power supply. Certain applications involve delaying or otherwise modifying the powering of the capacitive storage circuit, which may involve an initial startup of the capacitive storage circuit.
Abstract: Approaches for decoding data read from memory cells of a nonvolatile, solid state memory involve attempting to decode hard data using a hard decoding process prior to a time that soft data is available to the decoder. The hard data includes information about the digital symbols stored in the memory cells without data confidence information. The soft data includes information about the digital symbols stored in the memory cells and data confidence information. In response to the hard decoding process failing to achieve convergence, after the soft data becomes available to the decoder, the soft data is decoded using a soft decoding process. The decoder generates an output of the decoded data after the hard decoding process or the soft decoding process achieves convergence.
Type:
Application
Filed:
January 7, 2014
Publication date:
May 1, 2014
Applicant:
Seagate Technology LLC
Inventors:
Ara Patapoutian, Bernardo Rub, Bruce D. Buch
Abstract: Bit errors affecting cells of a solid-state, non-volatile memory are assigned to at least a first or a second category based on a relative amount of voltage shift that caused the respective bit errors in the respective cells. A reference voltage used to access the respective cells is adjusted to manage the respective bit errors of the first category. Additional corrective measures are taken to manage the respective bit errors of the second category.
Abstract: A magnetic element is generally provided that can be implemented as a transducing head. Various embodiments may configure a magnetic stack to be separated from a side shield lamination on an air bearing surface (ABS). The side shield lamination can be constructed to have a plurality of magnetic and non-magnetic layers each coupled to a top shield.
Type:
Grant
Filed:
June 29, 2012
Date of Patent:
April 29, 2014
Assignee:
Seagate Technology LLC
Inventors:
Levent Colak, Mark William Covington, Dimitar Velikov Dimitrov, Mark Thomas Kief, Anthony Mack, Dian Song
Abstract: Apparatus for two dimensional data reading. In accordance with some embodiments, a magnetic read element has a plurality of read sensors positioned symmetrically about a pivot point with at least two of the read sensors configured to concurrently read two dimensional user data while being immune to skew angle misalignment.
Abstract: A memory unit includes a giant magnetoresistance cell electrically coupled between a write bit line and a write source line. The giant magnetoresistance cell includes a free magnetic layer. A magnetic tunnel junction data cell is electrically coupled between a read bit line and a read source line. The magnetic tunnel junction data cell includes the free magnetic layer. A write current passes through the giant magnetoresistance cell to switch the giant magnetoresistance cell between a high resistance state and a low resistance state. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by magnetostatic coupling with the giant magnetoresistance cell, and be read by a read current passing though the magnetic tunnel junction data cell.
Type:
Grant
Filed:
March 5, 2013
Date of Patent:
April 29, 2014
Assignee:
Seagate Technology LLC
Inventors:
Haiwen Xi, Hongyue Liu, Michael Xuefei Tang, Antoine Khoueir, Song S. Xue
Abstract: A low-coupling perpendicular magnetic recording media comprising a magnetic storage layer and at least one low saturation magnetization layer. The magnetic storage layer has a saturation magnetization between about 400-900 emu/cm3 and the at least one low saturation magnetization layer has a saturation magnetization below that of the magnetic storage layer.
Type:
Grant
Filed:
August 31, 2012
Date of Patent:
April 29, 2014
Assignee:
Seagate Technology LLC
Inventors:
Erol Girt, Hans Jurgen Richter, Mariana R. Munteanu, Thomas Nolan
Abstract: A method of protecting information written to a recording medium includes magnetizing the recording medium to form a first magnetic pattern corresponding to information to be stored, and magnetizing the recording medium to form a protective magnetic pattern having a phase difference of 180° from the first magnetic pattern at a position adjacent to where the first magnetic pattern is formed, with adjacent bits of the first magnetic pattern opposite and the protective magnetic pattern opposite to each other.
Abstract: A shallow trench discrete track media structure is fabricated by etching a magnetic recording layer to provide a plurality of discrete magnetic data tracks separated by shallow trenches. Each shallow trench has a trench floor formed at a depth in the magnetic recording layer that is less than the thickness of the magnetic recording layer. Exposed regions of the magnetic recording layer beneath the trench floor are reacted with reactive plasma to diminish the magnetic moment of the exposed regions.
Abstract: In accordance with various embodiments, at least one magnetic shield for a magnetoresistive (MR) element has one or more lateral hard magnets and a coupling layer contactingly adjacent both the MR element and the hard magnet. The coupling layer concurrently magnetically decouples the MR element while magnetically coupling the hard magnet.
Type:
Grant
Filed:
May 6, 2011
Date of Patent:
April 29, 2014
Assignee:
Seagate Technology LLC
Inventors:
Eric W. Singleton, Junjie Quan, Shaun E. McKinlay
Abstract: An apparatus includes a waveguide shaped to direct light to a focal point, and a near-field transducer positioned adjacent to the focal point, wherein the near-field transducer includes a dielectric component and a metallic component positioned adjacent to at least a portion of the dielectric component. An apparatus includes a waveguide shaped to direct light to a focal point, and a near-field transducer positioned adjacent to the focal point, wherein the near-field transducer includes a first metallic component, a first dielectric layer positioned adjacent to at least a portion of the first metallic component, and a second metallic component positioned adjacent to at least a portion of the first dielectric component.
Type:
Grant
Filed:
August 21, 2012
Date of Patent:
April 29, 2014
Assignee:
Seagate Technology LLC
Inventors:
Lien Lee, Xuhui Jin, Kaizhong Gao, Amit Itagi, William A. Challener
Abstract: The disclosure is related to an apparatus and methods for addressing variations in bit error rates amongst data storage segments. In a particular embodiment, an apparatus includes a controller that detects variations in bit error rates amongst different segments of a plurality of segments in a storage medium. The controller also adjusts a read/write operation parameter according to the detected variations amongst the bit error rates in the plurality of segments.
Type:
Application
Filed:
October 19, 2012
Publication date:
April 24, 2014
Applicant:
Seagate Technology LLC
Inventors:
Clifford Jayson Bringas Camalig, Mui Chong Chai
Abstract: Methods for adhering parts together using part gap spacers are provided herein. Part gap spacers are formed in a selected pattern and a selected height on a surface of at least one surface of two parts to be oppositely disposed. When disposed opposite each other, at least some of the part gap spacers contact the opposite surface, and establish a standoff distance that is generally uniform, and thereby creating voids. Adhesive is disposed in at least some of the voids to adhere the part surfaces to each other. Further methods comprise forming part gap spacers on multiple sides of a third part to be disposed intermediate two surfaces. The part gap spacers can be formed in a variety of shapes, including bumps, tapers, ribs, and flange edges.
Type:
Application
Filed:
January 2, 2014
Publication date:
April 24, 2014
Applicant:
Seagate Technology LLC
Inventors:
Paco Flores, Anthony J. Aiello, Klaus D. Kloeppel, Reid E. Berry
Abstract: An implementation of a system disclosed herein provides a method of compensating for a change in write position of a recording head due to a change in an operating condition of the recording head.
Abstract: An apparatus and method for cooling a planar workpiece, such as a substrate of a recording disk, in an evacuated environment has a heat exchanging structure with at least two heat sinks having substantially parallel facing surfaces disposed within a vacuum chamber. A drive arrangement is connected to the heat sinks to controllably and dynamically drive the parallel facing surfaces of the heat sinks towards and away from each other.
Type:
Grant
Filed:
May 21, 2004
Date of Patent:
April 22, 2014
Assignee:
Seagate Technology LLC
Inventors:
Chang Bok Yi, Tatsuru Tanaka, Paul Mcleaod
Abstract: A disclosed device having a principle axis and including a magnetoresistive stack, the magnetoresistive stack having first and second opposing surfaces, the magnetoresistive stack including a free layer, a spacer layer, and a reference layer, wherein the spacer layer is positioned between the first and reference layer, the free layer includes magnetic material having a free magnetic orientation in a first plane; the spacer layer includes nonmagnetic material; and the reference layer includes magnetic material having a pinned magnetic orientation in a second plane, wherein the second plane is perpendicular to the first plane and parallel to the principle axis of the device; an insulating layer at least a portion of the outer surface of the magnetoresistive stack; a shielding layer surrounding at least a portion of the insulating layer; and a conducting layer, wherein the conducting layer provides electrical connection between the magnetoresistive stack and the shielding layer.
Type:
Grant
Filed:
February 26, 2010
Date of Patent:
April 22, 2014
Assignee:
Seagate Technology LLC
Inventors:
William Hill Butler, Dimitar V. Dimitrov
Abstract: A shock absorber is provided that also includes vibration damping. The shock absorber includes at least one shock absorbing frame member that partially surrounds an electronic device enclosure. The shock absorber also includes at least two protrusions that protrude from the at least one shock absorbing frame member. Each protrusion extends beyond the at least one shock absorbing frame member from a recessed surface recessed into the at least one shock absorbing frame member.