Abstract: Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with various embodiments, a first data access operation is conducted on a memory cell and a first temperature associated with the memory cell and associated with the first data access operation is measured. A second temperature associated with the memory cell is measured. At least one operational parameter is adjusted responsive to the first and second temperatures associated with the memory cell. A second data access operation is conducted on the memory cell using the adjusted operational parameter.

Abstract: An apparatus comprising a memory and a controller. The memory may be configured to process a plurality of read/write operations. The memory comprises a plurality of memory units each having a size less than a total size of the memory. The controller may be configured to perform a first error correction code decoding on the memory units using a plurality of initial log likelihood ratio values. The controller may be configured to count a number of unsatisfied checks if the first error correction code decoding fails. The controller may be configured to generate a plurality of measured log likelihood ratio values if the number of unsatisfied checks is below a threshold. The plurality of measured log likelihood ratio values are (a) based on calculations using decoded bits of the first error correction code decoding, and (b) used to perform a second error correction code decoding on the memory units.

Abstract: A plurality of aligned or unaligned data packets are received in a data storage device. A data bundle is constructed by concatenating different ones of the plurality of unaligned data packets. Data loss protection identifiers are utilized to track the construction of the data bundle. The data loss protection identifiers are employed to prevent at least one of packet data loss or metadata loss in response to detecting a state reset of the data storage device.

Abstract: An apparatus comprising a memory and a controller. The memory is configured to process a plurality of read/write operations. The memory comprises a plurality of memory modules each having a size less than a total size of the memory. The controller is configured to salvage data stored in a failed page of the memory determined to exceed a maximum number of errors. The controller copies raw data stored in the failed page. The controller identifies locations of a first type of data cells that fail erase identification. The controller identifies locations of a second type of data cells that have program errors. The controller flips data values in the raw data at the locations of the first type of data cells and the locations of the second type of data cells. The controller is configured to perform error correcting code decoding on the raw data having flipped data values. The controller salvages data stored in the failed page.

Abstract: Devices including at least one storage disc having a recording surface segmented into a plurality of radial zones, each radial zone having an inner diameter and an outer diameter, each of the plurality of zones having a plurality of concentric tracks; and a track density ramp ratio assigned to each of the plurality of zones, where the track density ramp ratio describes an increase in the track density from the inner diameter of the zone to the outer diameter of the zone.

Abstract: The present disclosure relates to examples of controlling recycling of blocks of memory. In one example implementation according to aspects of the present disclosure, a method comprises determining whether to reclaim one or more blocks of a memory. The method further comprises allocating at least one of the blocks to be written in accordance with the equalizing, in response to the determining, and selected from a subset of the blocks, wherein a respective lifetime factor is below a threshold set prior to the allocating.

Abstract: A head structure for a lapping assembly including a lapping control feature is disclosed. The lapping control feature includes a raised contact surface elevated from a front surface of the head structure of the lapping assembly. A relative position of the workpiece and raised contact surface are aligned to control workpiece thickness and other lapping parameters. In illustrated embodiments, the relative position of the workpiece and raised contact surface are aligned via an adjustment mechanism on the head structure. In illustrated embodiments, the adjustment mechanism is configured to adjust a position of the workpiece relative to the raised contact surface.

Abstract: A method including: reading a portion of stored data from a storage medium, decrypting the portion of stored data, then if changes are requested, making the changes to the portion of stored data to produce changed data, encrypting the changed data, and writing the encrypted changed data to the storage medium. An apparatus that performs the method is also included.

Abstract: A method includes rotating a first motor part around a first structure substantially similar to a second motor part. The method also includes applying a first current to the first structure to electro-chemically machine the first motor part.

Abstract: A recording head that includes at least one protection feature that prevents at least one other feature of the recording head from directly colliding with a data storage medium with which the recording head communicates. The recording head includes a transducer element having a leading edge and a trailing edge. The recording head also includes a transducer element heater located closer to the leading edge of the transducer element than the trailing edge of the transducer element. A contact pad is interposed between the leading edge of the transducer element and the transducer element heater to prevent the transducer element from directly colliding with the data storage medium.

Abstract: A magnetoresistive memory element is provided with a read module having a first pinned layer with a magnetoresistance that is readable by a read current received from an external circuit. A write module has a nanocontact that receives a write current from the external circuit and, in turn, imparts a spin torque to a free layer that functions as a shared storage layer for both the read module and the write module.

Abstract: Provided herein is an apparatus, including a storage compartment; a central partition of the storage compartment, wherein the central partition of the storage compartment provides a housing for a number of connectors for respectively connecting a number of digital data storage devices into both sides of the central partition of the storage compartment.

Abstract: An apparatus having a device and a circuit is disclosed. The device has a plurality of bit-lines and is configured to store a codeword. The circuit is configured to (i) receive the codeword from the device, (ii) generate a syndrome by performing a portion less than all of an iterative decoding procedure on the codeword and (iii) generate a map of defects according to the syndrome. Each of a plurality of bits in the map corresponds to a respective one of the bit-lines.

Abstract: An apparatus includes a controller and an adaptive error correction code decoder. The controller may be configured to read data from and write data to a memory device. The controller may be further configured to write data in a two-step process, which includes (i) after writing data to a least significant bit (LSB) page, checking the data stored in the LSB page using a first strength error correction code (ECC) decoding process and (ii) after writing data to a most significant bit (MSB) page associated with the LSB page, checking the data stored in both the LSB and MSB pages using a second strength error correction code (ECC) decoding process.

Abstract: The present application relates to a write gap structure for a magnetic recording head. In illustrated embodiments, the write gap structure includes multiple write gap segments along a beveled pole tip surface between a top edge and a bottom edge of the beveled pole tip surface to provide a narrow write gap proximate to the air bearing surface and a larger write gap behind the air bearing surface. In illustrated embodiments, the narrow write gap segment is formed between the beveled pole tip surface and a lower back surface of front shield and the larger write gap is formed between the beveled pole tip surface and an upper back surface of the front shield.

Abstract: An apparatus includes a first component and a second component. The second component is located at a first position. The second component includes a first connection to the first component. The first position and the first connection are configured to stiffen an electric motor assembly.

Abstract: A circuit may be configured to reduce the amount of space used on a storage device when a transducer having a reader and writer passes from a writable data field to a read-only field by enabling both the reader and writer simultaneously. The circuit can be configured to reduce to a threshold level the noise on a read signal that can occur when the reader is over a read-only field and the writer is over a writable data field, and can ignore the read data when both the writer and reader are enabled simultaneously over a writable data field.

Abstract: A waveguide including a top cladding layer, the top cladding layer including a material having an index of refraction, n1; an assistant layer, the assistant layer positioned adjacent the top cladding layer, the assistant layer including a material having an index of refraction, n2; a core layer, the core layer positioned adjacent the assistant layer, the core layer including a material having an index of refraction, n3; and a bottom cladding layer, the bottom cladding layer positioned adjacent the core layer, the bottom cladding layer including a material having an index of refraction, n4, wherein n1 is less than both n2 and n3, n3 is greater than n1 and n4, and n4 is less than n3 and n2.

Abstract: An apparatus having a circuit and an interface to a nonvolatile memory is disclosed. The circuit is configured to (i) read a plurality of bits in a read channel of the nonvolatile memory. The bits are encoded with a polar code. The circuit is also configured to (ii) generate a plurality of probabilities based on a plurality of log likelihood ratio values of the read channel and (iii) decode the bits based on the probabilities.

Abstract: Apparatus and method for optimizing read channel parameters in a storage device. In some embodiments, a method includes obtaining raw error rate data for different read channel parameter values in each of a plurality of zones of a memory. The raw error rate data for each of the different reach channel parameter values are filtered to provide a sequence of second order polynomial curves with smoothed data points in each of the zones. A second order regression is applied to the smoothed data points in each of the zones to provide a sequence of regression curves. An optimal read channel parameter value for each of the zones is selected using the sequence of regression curves, and the optimal read channel parameter values are used during subsequent read operations to retrieve data stored in the zones.