Patents Assigned to Seagate Technologies
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Patent number: 9218836Abstract: Systems that include an energy source configured to provide transverse electric (TE) mode energy; a channel waveguide configured to receive energy from the energy source, the channel waveguide having at least one mirror plane; and a near field transducer (NFT) configured to receive energy from the channel waveguide, the NFT having at least one mirror plane.Type: GrantFiled: October 28, 2014Date of Patent: December 22, 2015Assignee: Seagate Technology LLCInventors: Amit Vasant Itagi, Pierre Asselin, Frank Edgar Stageberg, Werner Scholz
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Patent number: 9213600Abstract: An apparatus includes one or more error-correction decoders, a buffer, at least one direct memory access (DMA) engine, and at least one processor. The buffer may be configured to store data to be decoded by the one or more error-correction decoders. The at least one DMA engine may couple the buffer and the one or more error-correction decoders. The at least one processor may be enabled to send messages to the at least one DMA engine. The messages may be configured to deliver DMA control information and corresponding datapath control information. Data may be read from the buffer based upon the DMA control information and delivered to the one or more error-correction decoders along with the corresponding datapath control information. The one or more error-correction decoders may be enabled to decode the data read from the buffer according to the corresponding datapath control information.Type: GrantFiled: November 27, 2013Date of Patent: December 15, 2015Assignee: Seagate Technology LLCInventors: Earl T. Cohen, Yunxiang Wu, Alexander Hubris, Christopher Brewer
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Patent number: 9213646Abstract: Systems and methods are disclosed for cache data value tracking. In an embodiment, a controller may be configured to select data; set a node weight for the data representing a cache hit potential for the data; store a first time stamp value for the data representing when the data was accessed; and store the data in a cache memory based on the node weight and the first time stamp value. In another embodiment, a method may comprise setting a node weight for data associated with a data access command, storing a first access counter value for the data representing a number of times new data has been stored to the cache memory when the data was accessed, and removing the data from the cache memory or maintaining the data in the cache memory based on the node weight and the first access counter value.Type: GrantFiled: June 20, 2013Date of Patent: December 15, 2015Assignee: Seagate Technology LLCInventors: Margot Ann LaPanse, Joseph Masaki Baum, Stanton MacDonough Keeler, Michael Edward Baum, Thomas Dale Hosman, Robert Dale Murphy
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Patent number: 9213599Abstract: An apparatus includes a non-volatile memory and a controller. The controller may be configured to track one or more channel parameters of the non-volatile memory. The controller may be further configured to estimate an erase state voltage distribution of the non-volatile memory by selecting one or more parameters of the erase state distribution from a look-up table based upon at least one of the one or more channel parameters.Type: GrantFiled: September 30, 2013Date of Patent: December 15, 2015Assignee: Seagate Technology LLCInventors: Yunxiang Wu, Zhengang Chen, Yu Cai, Erich F. Haratsch
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Patent number: 9212900Abstract: Provided herein is an apparatus, including a photon detector array configured to receive photons scattered from features in a surface of an article; and a characterization means for characterizing the features in the surface of the article, wherein the characterization means contrasts signals from the photon detector array corresponding to two sets of photons scattered from features in the surface of the article, and the two sets of photons respectively originate from photon emitters at different locations.Type: GrantFiled: June 28, 2013Date of Patent: December 15, 2015Assignee: Seagate Technology LLCInventors: Joachim Walter Ahner, Stephen Keith McLaurin, Samuel Kah Hean Wong, Henry Luis Lott
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Patent number: 9213602Abstract: An apparatus having mapping and interface circuits. The mapping circuit (i) generates a coded item by mapping write unit bits using a modulation or recursion of past-seen bits, and (ii) calculates a particular state to program into a nonvolatile memory cell. The interface circuit programs the cell at the particular state. Two normal cell states are treated as at least four refined states. The particular state is one of the refined states. A mapping to the refined states mitigates programming write misplacement that shifts an analog voltage of the cell from the particular state to an erroneous state. The erroneous state corresponds to a readily observable illegal or atypical write sequence, and results in a modified soft decision from that calculated based on the normal states only. A voltage swing between the particular state and the erroneous state is less than between the normal states.Type: GrantFiled: June 23, 2014Date of Patent: December 15, 2015Assignee: Seagate Technology LLCInventors: AbdelHakim S. Alhussien, Erich F. Haratsch, Earl T. Cohen, Yunxiang Wu
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Patent number: 9213633Abstract: A method of associating a logical block address with a physical location in a non-volatile memory includes (A) in response to a write request comprising a respective logical block address in a logical block address space and respective data to be written to the non-volatile memory, determining a physical location in the non-volatile memory to store the respective data of the write request, (B) adding an entry to a journal, such that the added entry trails any entries already in the journal and the added entry has a respective logical block address field set to the respective logical block address of the write request and a respective physical location field set to the determined physical location, and (C) updating one of a plurality of second-level map pages in a two-level map according to the respective logical block address of the write request with the determined physical location.Type: GrantFiled: May 8, 2013Date of Patent: December 15, 2015Assignee: Seagate Technology LLCInventors: Timothy L. Canepa, Earl T. Cohen, Alex G. Tang
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Patent number: 9209832Abstract: A method for encoding a reduced polar code is disclosed. The method generally includes (a) modifying an input codeword including polar code encoded input data by removing one or more bits from one of (i) a first part of the input codeword and (ii) a second part of the input codeword and (b) generating an output codeword by concatenating the first and the second parts of the modified input codeword.Type: GrantFiled: April 13, 2015Date of Patent: December 8, 2015Assignee: Seagate Technology LLCInventors: AbdelHakim S. Alhussien, Erich F. Haratsch, Yue Li
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Patent number: 9207947Abstract: The disclosure is related systems and method for improved boot and resume from hibernate times in hybrid drives. In one embodiment, a device may comprise an interface circuit to communicate with a host device, a first nonvolatile data storage medium, and a controller configured to monitor the interface circuit for a trigger event and pin data associated with read requests to the first nonvolatile data storage medium during a first specific duration in response to the trigger event. Another embodiment may be a method comprising receiving a trigger event, monitoring a duration since the trigger event, retrieving data from a nonvolatile cache memory, retrieving data from a disc memory when the data is not in the nonvolatile cache memory, and pinning the data retrieved from the disc memory to the nonvolatile cache memory.Type: GrantFiled: August 30, 2012Date of Patent: December 8, 2015Assignee: Seagate Technology LLCInventors: Robert Dale Murphy, Robert William Dixon, John Frederic Wehman
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Patent number: 9209835Abstract: An apparatus for reading a non-volatile memory includes a tracking module operable to calculate means and variances of voltage level distributions in a non-volatile memory and to calculate at least one reference voltage to be used when reading the non-volatile memory based on the means and variances, a likelihood generator operable to calculate at least one other reference voltage to be used when reading the non-volatile memory, wherein the at least one other reference voltage is based at least in part on a predetermined likelihood value constellation, and to map read patterns from the non-volatile memory to likelihood values, and a read controller operable to read the non-volatile memory using the at least one reference voltage and the at least one other reference voltage to yield the read patterns.Type: GrantFiled: December 20, 2013Date of Patent: December 8, 2015Assignee: Seagate Technology LLCInventors: AbdelHakim S. Alhussien, Erich F. Haratsch, Sundararajan Sankaranarayanan, YingQuan Wu
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Patent number: 9209670Abstract: Provided herein, is an apparatus that includes a first weld attaching a first motor component and a second motor component, a second weld attaching the first motor component and the second motor component, and a plurality of spot welds along a joint between the first and second weld wherein the plurality of spot welds are configured to align the first motor component and the second motor component.Type: GrantFiled: September 5, 2013Date of Patent: December 8, 2015Assignee: Seagate Technology LLCInventor: Chris M. Woldemar
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Patent number: 9209720Abstract: A system that includes a first data storage element actuated by a first electric motor. The system also includes a second data storage element actuated by a second electric motor. An electrical connector assembly transfers electrical energy from a back electromotive force generated in the first electric motor, by movement of the first data storage element, to the second electric motor to thereby energize the second electric motor.Type: GrantFiled: September 24, 2013Date of Patent: December 8, 2015Assignee: Seagate Technology LLCInventors: Timothy R. Feldman, John W. Shaw
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Patent number: 9208823Abstract: A method and apparatus for managing address map information are disclosed. In one embodiment, an apparatus may comprise a processor configured to store address map changes to a first data storage medium, save the address map changes to a nonvolatile data storage medium when an abnormal power state is detected, and when the power state is no longer abnormal retrieve the last saved address map information and address map changes and update the address map information using the address map changes. The apparatus may be configured to retrieve the instructions for the processor operation over a network connection.Type: GrantFiled: April 27, 2012Date of Patent: December 8, 2015Assignee: Seagate Technology LLCInventor: Se Wook Na
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Patent number: 9202489Abstract: An apparatus that includes a slider having a mounting surface, the mounting surface opposite a media-facing surface of the slider. The apparatus includes a laser diode mounted on a side surface to the mounting surface. The laser diode has an active region of the laser diode is disposed substantially perpendicular to the mounting surface.Type: GrantFiled: January 24, 2014Date of Patent: December 1, 2015Assignee: Seagate Technology LLCInventors: Nils Gokemeijer, Edward Charles Gage, Roger L. Hipwell, Michael Christopher Kautzky, Scott Eugene Olson
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Patent number: 9200671Abstract: Disclosed herein is an apparatus that includes a fluid dynamic bearing defined in a gap between an inner component and an outer component. In some instances, the inner component and the outer component are configured for relative rotation. In some instances, the apparatus further includes a fluid reservoir configured to supply a fluid to the fluid dynamic bearing and the fluid reservoir is defined by shearless surfaces.Type: GrantFiled: June 17, 2013Date of Patent: December 1, 2015Assignee: Seagate Technology LLCInventors: Hans Leuthold, Troy M. Herndon
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Patent number: 9202527Abstract: An interface connector apparatus and associated method is provided having a reach portion extending from a body portion a first distance, and electrical contacts at an end of the reach portion. An alignment member is connected to the reach portion and extends from the body portion a second distance that is greater than the first distance, the alignment member including a retainer operably imparting a bias that retains the interface connector in another device.Type: GrantFiled: June 3, 2013Date of Patent: December 1, 2015Assignee: Seagate Technology, LLCInventors: Michael Gene Morgan, Homer Stewart Pitner
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Patent number: 9201019Abstract: Provided herein is an apparatus, including a photon emitting means for emitting photons onto surface edges of an article, a photon detecting means for detecting photons scattered from particles on the surface edges of the article, and a mapping means for mapping a particle or a defect of the surface of the article.Type: GrantFiled: December 3, 2013Date of Patent: December 1, 2015Assignee: Seagate Technology LLCInventors: David M. Tung, Joachim W. Ahner
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Patent number: 9201178Abstract: A planar collimator has first and second sections each intersecting at a junction between a first axis and a second axis normal to the first axis. Each of the first and second sections have geometries configured to receive light from a source point located on the first axis and collimate the light at respective positive and negative tilting angles relative to the second axis. The first and second sections direct the collimated light to respective first and second sides of a focusing mirror and away from a gap between the first and second sides of the focusing mirror.Type: GrantFiled: March 12, 2013Date of Patent: December 1, 2015Assignee: Seagate Technology LLCInventors: Chubing Peng, Kaizhong Gao, Frank Edgar Stageberg
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Patent number: 9201728Abstract: Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, the apparatus has a solid-state non-volatile memory and a processing circuit configured to write data to a selected location of the memory. The data are arranged in the form of multi-bit code words each comprising a user data payload and associated parity data configured to correct one or more bit errors in the user data payload. The processing circuit adjusts at least a selected one of a size of the code words, a size of the user data payloads or a size of the parity data responsive to at least a selected one of an accumulated count of access operations upon the selected location or an error rate associated with the selected location.Type: GrantFiled: September 12, 2013Date of Patent: December 1, 2015Assignee: Seagate Technology LLCInventors: Ara Patapoutian, Ryan James Goss, Mark Allen Gaertner, Bruce Douglas Buch, Arvind Sridharan
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Patent number: 9202499Abstract: An apparatus is arranged to detect contact between an air bearing surface of a transducer and a medium using a modulated thermal sensor signal. A laser source produces modulated laser light. A thermal sensor is disposed at or near the air bearing surface and is subject to cyclic heating by the modulated laser light. The thermal sensor is configured to produce the modulated sensor signal in response to the cyclic heating.Type: GrantFiled: March 13, 2013Date of Patent: December 1, 2015Assignee: Seagate Technology LLCInventors: James Dillon Kiely, Karl Scheppers, Declan Macken, Michael Thomas Johnson