Patents Assigned to Seagate
  • Patent number: 8518563
    Abstract: A magnetic data storage medium may include a substrate, a magnetic recording layer, a protective carbon overcoat, and a monolayer covalently bound to carbon atoms adjacent a surface of the protective carbon overcoat. According to this aspect of the disclosure, the monolayer comprises at least one of hydrogen, fluorine, nitrogen, oxygen, and a fluoro-organic molecule. In some embodiments, a surface of a read and recording head may also include a monolayer covalently bound to carbon atoms of a protective carbon overcoat.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventors: Paul M. Jones, Xiaoping Yan, Lei Li, James Dillon Kiely, Christopher Loren Platt, Michael J. Stirniman, Jiping Yang, Yiao-Tee Hsia
  • Patent number: 8519495
    Abstract: A magnetic memory device includes a first electrode separated from a second electrode by a magnetic tunnel junction. The first electrode provides a write current path along a length of the first electrode. The magnetic tunnel junction includes a free magnetic layer having a magnetization orientation that is switchable between a high resistance state magnetization orientation and a low resistance state magnetization orientation. The free magnetic layer is spaced from the first electrode a distance of less than 10 nanometers. A current passing along the write current path generates a magnetic field. The magnetic field switches the free magnetic layer magnetization orientation between a high resistance state magnetization orientation and a low resistance state magnetization orientation.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventors: Insik Jin, Hongyue Liu, Yong Lu, Xiaobin Wang
  • Patent number: 8520432
    Abstract: Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventors: Yong Lu, Hongyue Liu, Zheng Gao, Insik Jin, Dimitar V. Dimitrov
  • Patent number: 8519673
    Abstract: An apparatus is provided with a system load and a plurality of batteries that are individually selectable to provide power to the load, and arbitration circuitry configured to selectively calibrate each of the batteries in relation to respective calibration status data stored in memory for each of the batteries. The arbitration circuitry executes a method for comparing charging records of each of the plurality of batteries, and then instigating a battery power calibration procedure to a selected battery of the plurality of batteries in relation to results of the comparing step.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventor: Jeffrey A. Williams
  • Patent number: 8519376
    Abstract: Nonvolatile resistive memory devices are disclosed. In some embodiments, the memory devices comprise multilayer structures including electrodes, one or more resistive storage layers, and separation layers. The separation layers insulate the resistive storage layers to prevent charge leakage from the storage layers and allow for the use of thin resistive storage layers. In some embodiments, the nonvolatile resistive memory device includes a metallic multilayer comprising two metallic layers about an interlayer. A dopant at an interface of the interlayer and metallic layers can provide a switchable electric field within the multilayer.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventors: Dimitar Velikov Dimitrov, Insik Jin, Haiwen Xi
  • Patent number: 8522360
    Abstract: An anchor-point based digital rights management provides for a posted move of one or more digital rights between two devices. By executing a posted move, a user (1) disables a binding record of a source user device, thereby terminating authorized use of the digital property instance through at the source anchor point; and (2) enables a different binding record of a target user device, thereby allowing authorized use of the digital property instance through that target anchor point. Such a “move” can accomplished through secure communications links mediated by one or both of a content handler and an anchor point message system.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventor: Paul Marvin Sweazey
  • Patent number: 8520339
    Abstract: This disclosure is directed to air-bearing sliders used in magnetic storage systems that employ a trench arranged between a transducing head connected to a slider body and a leading edge of the slider body. The trench is configured to divert air passing over an air-bearing surface of the slider body away from the transducing head.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventors: Paul J. Sonda, Lars H. Ahlen
  • Patent number: 8519498
    Abstract: A magnetic cell includes a ferromagnetic free layer having a free magnetization orientation direction and a first ferromagnetic pinned reference layer having a first reference magnetization orientation direction that is parallel or anti-parallel to the free magnetization orientation direction. A first oxide barrier layer is between the ferromagnetic free layer and the first ferromagnetic pinned reference layer. The magnetic cell further includes a second ferromagnetic pinned reference layer having a second reference magnetization orientation direction that is orthogonal to the first reference magnetization orientation direction. The ferromagnetic free layer is between the first ferromagnetic pinned reference layer and the second ferromagnetic pinned reference layer.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Zheng Gao, Wenzhong Zhu, Wonjoon Jung, Haiwen Xi
  • Patent number: 8520344
    Abstract: A magnetoresistive device includes a free layer, a separating layer, a pinned layer, and a magnetic stabilizer in close proximity to the pinned layer, wherein the magnetic stabilizer may enhance the stability of the magnetization direction of the pinned layer.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: August 27, 2013
    Assignee: Seagate Technology LLC
    Inventors: Song Sheng Xue, Paul Edward Anserson, Konstantin Rudolfovich Nikolaev, Patrick Joseph Ryan
  • Publication number: 20130215674
    Abstract: A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.
    Type: Application
    Filed: March 19, 2013
    Publication date: August 22, 2013
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventor: Seagate Technology LLC
  • Publication number: 20130214629
    Abstract: Provided herein is a motor including a plastic component; a stationary component having a thrustplate; and a rotatable component having a sleeve and a counterplate, wherein the plastic component is positioned outside the sleeve, and wherein the thrustplate and the counterplate are positioned to form a fluid dynamic bearing (“FDB”) at a top portion of the sleeve. Also provided is a motor comprising a plastic component; a stationary component comprising a thrustplate; and a rotatable component comprising a sleeve; wherein the plastic component is affixed to the sleeve, and wherein the thrustplate and the plastic component are positioned to form a FDB. Also provided is a motor comprising a plastic component; a stationary component comprising an inner component; and a rotatable component comprising the plastic component and a supporting means for supporting the inner component, wherein the inner component and the supporting means are positioned to form a FDB.
    Type: Application
    Filed: March 18, 2013
    Publication date: August 22, 2013
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventor: SEAGATE TECHNOLOGY LLC
  • Publication number: 20130215534
    Abstract: A slider comprising a body having an air bearing surface (ABS), wherein the ABS extends between a leading edge and a trailing edge of the body. The slider comprises a transducer supported by the body and positioned near the trailing edge, wherein the transducer comprises a pole tip partially extending from the body. The slider comprises a surface defined in the body and forming the trailing edge, wherein the surface comprises a plurality of segments. A first segment of the plurality of segments extends from the ABS and is offset from a portion of the pole tip recessed within the body. The first segment is offset from the pole tip portion by a lesser extent than any other of the plurality of segments.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 22, 2013
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Gordon Merle Jones, Edwin Frank Rejda, Joseph Michael Stephan
  • Patent number: 8513752
    Abstract: A magnetic tunnel junction includes an amorphous ferromagnetic reference layer having a first reference layer side and an opposing second reference layer side. The first reference layer side has a greater concentration of boron than the second reference layer side. A magnesium oxide tunnel barrier layer is disposed on the second side of the amorphous ferromagnetic reference layer. The magnesium oxide tunnel barrier layer has a crystal structure. An amorphous ferromagnetic free layer is disposed on the magnesium oxide tunnel barrier layer.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: August 20, 2013
    Assignee: Seagate Technology LLC
    Inventors: Xilin Peng, Konstantin Nikolaev, Taras Pokhil, Victor Sapazhnikov, Yonghua Chen
  • Patent number: 8514671
    Abstract: A slider may have a first surface on an air bearing surface (ABS) and a laser recess formed in a second surface of the slider, opposite the first surface. A laser can then be positioned in the laser recess with the laser extending from the slider to a top plane. A stud may be formed adjacent to and separated from the laser on the second surface of the slider with the stud extending from the second surface of the slider to the top plane.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: August 20, 2013
    Assignee: Seagate Technology LLC
    Inventors: Yongjun Zhao, Mike Allen Seigler, Mark Henry Ostrowski
  • Patent number: 8514605
    Abstract: A memory unit includes a magnetic tunnel junction data cell is electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a write current through the magnetic tunnel junction data cell. A first diode is electrically between the magnetic tunnel junction data cell and the source line and a second diode is electrically between the magnetic tunnel junction data cell and the source line. The first diode and second diode are in parallel electrical connection, and having opposing forward bias directions. The memory unit is configured to be precharged to a specified precharge voltage level and the precharge voltage is less than a threshold voltage of the first diode and second diode.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: August 20, 2013
    Assignee: Seagate Technology LLC
    Inventors: Yiran Chen, Hai Li, Hongyue Liu, Yong Lu, Song S. Xue
  • Patent number: 8516341
    Abstract: A method is provided for correcting a write defect in a data storage apparatus comprising a storage medium. The method comprises reading information from a track of the storage medium in which a write defect occurs, calculating a number of error-corrected error correction code symbols in sectors of the track based on the read information, determining a number of sectors on which write defect correction is to be performed by comparing the calculated number of error-corrected error correction code symbols with a threshold, and performing a rewrite operation on the track, beginning at a starting sector determined by the number of sectors on which write defect correction is to be performed.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: August 20, 2013
    Assignee: Seagate Technology International
    Inventors: Kyung-jin Kim, Jae-hyuk Yu
  • Patent number: 8514608
    Abstract: A resistive sense memory apparatus includes a bipolar select device having a semiconductor substrate, a plurality of collector contacts disposed in a first side of the of the semiconductor substrate, an emitter contact layer disposed in a second side of the semiconductor substrate, and a base layer separating the plurality of collector contacts from the emitter contact layer. Each collector contact is electrically isolated from each other. A resistive sense memory cells is electrically coupled to each collector contacts and a bit line. The base layer and the emitter contact layer provide an electrical path for the plurality of collector contacts.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: August 20, 2013
    Assignee: Seagate Technology LLC
    Inventor: Maroun Georges Khoury
  • Patent number: 8514673
    Abstract: A near-field transducer includes a substrate that defines a substrate-parallel plane. The near-field transducer also includes a composite layer deposited on the substrate-parallel plane. The composite layer has a first layer of the plasmonic material and a second layer of an insertion material adjacent the substrate. The insertion material reduces plastic deformation of the near-field transducer at elevated temperatures.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: August 20, 2013
    Assignee: Seagate Technology LLC
    Inventors: Tong Zhao, Michael Christopher Kautzky, Amit Itagi, Michael Allen Seigler
  • Patent number: 8514637
    Abstract: Three dimensional cross-point array memory devices and selecting cells within a three dimensional cross-point array memory. In a particular embodiment, three different voltages levels are applied to bit lines of the cross point array to allow for selection of a specific cell. Series of select devices may be implemented to provide a high voltage and a low voltage to specific bit lines, while a middle voltage may also be provided. In a particular embodiment, the select devices comprise Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs).
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: August 20, 2013
    Assignee: Seagate Technology LLC
    Inventors: Chulmin Jung, Jinyoung Kim, Yong Lu, Harry Liu
  • Patent number: 8510931
    Abstract: A disc drive disc stack assembly and a method for forming the disc stack assembly to reduce servo pattern runout. The disc stack assembly includes a number of prewritten discs having a servo pattern and a disc alignment mark. The first step is to place a first disc about a spindle motor hub of the disc drive. The second step is to align a disc alignment mark of the first disc in relation to a direction of a biasing force. The third step is to apply the biasing force to the first disc to engage the first disc against the spindle motor hub. The fourth step is to repeat the first three steps for each remaining disc in the disc stack assembly. The final step is to clamp the prewritten discs with a disc clamp to secure the position of each prewritten disc relative to the spindle motor hub.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: August 20, 2013
    Assignee: Seagate Technology LLC
    Inventor: Arnold G. Slezak