Patents Assigned to Seiko Epson
  • Publication number: 20030197184
    Abstract: A surface-emitting light-emitting device, which can control optical characteristics of emitting light and the manufacturing method thereof, an optical module which includes the surface-emitting light-emitting device, and a light-transmission device are provided. A surface-emitting light-emitting device includes an emitting surface for light emission and a bank that is formed so as to surround the emitting surface. An upper edged portion of the bank is located at a position higher than the emitting surface.
    Type: Application
    Filed: February 27, 2003
    Publication date: October 23, 2003
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Tsuyoshi Kaneko
  • Publication number: 20030197222
    Abstract: The invention provides a method of manufacturing a semiconductor device, capable of enhancing characteristics of each semiconductor element constituting the semiconductor device, while reducing or suppressing non-uniformity in the characteristics thereof. When forming a thin-film circuit constructed by arranging a plurality of pixel circuits on a glass substrate, first, a plurality of concave portions to be seeds in crystallizing a semiconductor film are formed on the glass substrate with a pitch n times an array pitch of a plurality of pixel circuits. Then, an amorphous silicon film is formed on the glass substrate on which the concave portions are formed, and by crystallizing the silicon film by heating, a substantially monocrystalline silicon film is formed within a region centered on the concave portions. Using each of the substantially monocrystalline silicon film formed substantially centered around the respective concave portions, pixel circuits are formed.
    Type: Application
    Filed: March 24, 2003
    Publication date: October 23, 2003
    Applicant: Seiko Epson Corporation
    Inventors: Hiroyuki Hara, Satoshi Inoue
  • Publication number: 20030197934
    Abstract: A polarization converter (414) has polarizing conversion element body (414B) including: a polarization separating film (511) that separates an incident light into two linearly polarization beam; a reflecting film (512) alternately disposed between the polarization separating films (511), the reflecting film reflecting a linearly polarization beam reflected by the polarization separating film (511); a sheet glass (513) provided with the polarization separating film (511) and the reflecting film (512); and a retardation plate (600) that converts a polarization axis of the linearly polarization beam transmitted through the polarization separating film (511), a fixing frame (414A) that shields incident light beam on a position on the light-incident side of the polarizing conversion element body (414B) not opposing to the polarizing conversion element body (414B), the fixing frame (414A) having a holder that holds an end of the polarizing conversion element body (414B) and a fixing portion to be fixed to an inner
    Type: Application
    Filed: March 27, 2003
    Publication date: October 23, 2003
    Applicant: Seiko Epson Corporation
    Inventors: Yasunori Ogawa, Fumie Kawai
  • Publication number: 20030197764
    Abstract: A manufacturing method of semiconductor devices, micromachines such as semiconductor device, narrow pitch connectors, electrostatic actuators or piezoelectric actuators, and ink jet heads, ink jet printers, liquid crystal panels, and electronic appliances, including them characterized in that short circuit due to dusts floating in the air will not take place. In a method where a silicon wafer (30) undergoes dicing to manufacture semiconductor devices (20), a groove (30a) covered by an insulating layer and spanning a dicing line is formed in the above described silicon wafer, and the silicon wafer undergoes dicing along the dicing line.
    Type: Application
    Filed: April 25, 2003
    Publication date: October 23, 2003
    Applicant: Seiko Epson Corporation
    Inventor: Eiichi Sato
  • Publication number: 20030199144
    Abstract: A mask is disclosed for use in forming a thin-layer pattern of an organic electroluminescence element having high-precision pixels. The mask is manufactured by wet-etching a (100) silicon wafer (single crystal silicon substrate) 1 in a crystal orientation-dependent anisotropic fashion so as to form through-holes 11 having (111)-oriented walls 11a serving as apertures corresponding to a thin-layer pattern to be formed.
    Type: Application
    Filed: May 6, 2003
    Publication date: October 23, 2003
    Applicant: Seiko Epson Corporation
    Inventors: Mitsuro Atobe, Shinichi Kamisuki, Ryuichi Kurosawa, Shinichi Yotsuya
  • Publication number: 20030197231
    Abstract: A semiconductor device includes an NMOSFET and a PMOSFET. Each MOSFET includes first and second impurity diffusion layers for forming a source region and a drain region which are formed in a silicon layer of an SOI substrate or the like, a channel region formed between the first and second impurity diffusion layers, a gate insulation layer at least formed on the channel region, and agate electrode formed on the gate insulation layer. The gate electrode includes a tantalum nitride layer in a region in contact with at least the gate insulation layer. The semiconductor device exhibits high current drive capability and can be manufactured at high yield.
    Type: Application
    Filed: May 7, 2003
    Publication date: October 23, 2003
    Applicants: Seiko Epson Corporation, Tadahiro OHMI
    Inventors: Tadahiro Ohmi, Hiroyuki Shimada
  • Publication number: 20030197189
    Abstract: The present invention provides a color transflective liquid crystal display that is capable of display with good coloring and high visibility in both a reflective mode and a transmissive mode while suppressing deterioration in color reproduction caused by unevenness of the spectral properties of the illumination light, if any. The liquid crystal display can include a liquid crystal display panel including pixels formed of a plurality of sub-pixels each corresponding to different colors, and an illumination device, wherein the liquid crystal display panel includes a transflective layer and a color filter of color corresponding to each of the sub-pixels.
    Type: Application
    Filed: April 30, 2003
    Publication date: October 23, 2003
    Applicant: Seiko Epson Corporation
    Inventor: Chiyoaki Iijima
  • Publication number: 20030200232
    Abstract: The invention provides an information processor that allows a difference in the frequency of use among data storage regions to be reduced, thereby prolonging the useful life of the information recording device as a whole. An available data storage region in a flash memory is searched in a searching sequence recorded in a management table in a RAM, data is stored in the available data storage region thus detected, and the searching sequence recorded in the management table is updated.
    Type: Application
    Filed: March 12, 2003
    Publication date: October 23, 2003
    Applicant: SEIKO EPSON CORPORATION.
    Inventors: Hiroki Matsuoka, Chikara Nakayama, Hirotaka Ogura, Akihiko Saito
  • Patent number: 6634742
    Abstract: Ink flow paths are formed that corresponds in number to the ink chambers of a mounted ink cartridge, to supply ink from the ink chambers to a recording head. These ink flow paths are constituted by first communication paths (59, 60), which communicate with the ink outlets of corresponding ink chambers, second communication paths (61, 67), which communicate with the corresponding ink inlets of the recording head, and convergent flow paths (65), which connect the first and the second communication paths and converge as they approach the recording head. Filters (56) are located in the second communication paths.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Hiroshige Owaki, Fujio Akahane, Takayuki Iijima, Katsuhiro Okubo
  • Patent number: 6636206
    Abstract: Electric power consumed in an operation of displaying a gray-scale image is reduced. One of a plurality of scanning lines is selected during one horizontal scanning period, and a selection voltage is applied to the scanning line during one of a first half period and a second half period that said horizontal scanning period has been divided into. When an intermediate gray level is displayed, the selection voltage is applied to a scanning line in an odd-numbered column during the second half period and the selection voltage is applied to a scanning line in an even-numbered column during the first half period.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Satoshi Yatabe
  • Patent number: 6636891
    Abstract: In a network having an initiator, a server, and an input/output (I/O) device remote from the initiator, the initiator transmits to the server a request containing the network location of data to be retrieved from an input device, such as a video camera, fax, or scanner, or output by an output device, such as a printer. Output requests are placed in a queue and scheduled for completion. When an output device is ready, the server retrieves the data from a network storage location different from the queue and transmits the data to the printer or output device for action. When an input device is ready, the server retrieves the data from the input device and transmits it to a network location based on the request. The server can also provide the initiator with status information about the request and the input or output device.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Gregory A. LeClair, Babulal J. Thummar
  • Patent number: 6636192
    Abstract: In order to provide an electro-optical panel in which the gap between the substrates is precise and is uniform over the entire image display region, a projection display apparatus using the electro-optical panel, and an electro-optical panel production method, a resin, which is elastically deformable even after being set, is applied to surround an image display region 37 on the surface of a TFT array substrate 2, and the resin is set, thereby forming an inner peripheral protrusion 22 and an outer peripheral protrusion 23 having circular portions 24. Subsequently, an unset sealing material 200 is applied in a rectangular area placed between the inner peripheral protrusion 22 and the outer peripheral protrusion 23. An unset conducting member 56 for continuity between the substrates is applied in areas enclosed by the circular portions 24 of the outer peripheral protrusion 23.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Hiromi Saitoh
  • Patent number: 6636341
    Abstract: A method is provided for manufacturing an electrophoretic display device that includes a pair of substrates and a rib that partitions a space into a plurality of cells. The method comprises the steps of applying a liquid included in common by all the cells by using an application device, and allowing a discharge device to separately discharge a plurality of liquids so that the liquids differ in composition with respect to each of the plurality of cells and thereby fill in respective cells.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Sadao Kanbe
  • Patent number: 6636284
    Abstract: This invention provides an electro-optical device that includes on a TFT array substrate, scanning lines, data lines, a plurality of TFTs connected to these lines, pixel electrodes connected to the TFTs, an upper light shield layer which is formed in a grid-like configuration above the plurality of TFTs and defines a non-aperture area of each pixel, and a lower light shield layer which is formed in a grid-like configuration beneath the plurality of TFTs. In an image display area in a plan view, the formation area of the lower light shield layer is within the formation area of the upper light shield layer, and a channel region of the TFT is within a crossing portion of the lower light shield layer. In this arrangement, the electro-optical device presents a high quality image with increased light resistance.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Takashi Sato
  • Patent number: 6636071
    Abstract: A circuit for transmitting/receiving a logic signal through a capacitor is provided, which prevents signal delay and malfunction on the receiving circuit side. The power supply voltage of the buffer that transmits the logic signal in the transmitting circuit is enhanced to be larger than the power supply voltage of the buffer that inputs the logic signal in the receiving circuit. As a result, the amplitude of the logic signal at the input point is expanded from the clipping level according to the protection diodes, so that the signal delay, as well as the malfunction are prevented.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Satoshi Yatabe
  • Patent number: 6635896
    Abstract: A glass substrate is affixed through an UV-hardening resin to the signal face of an optical stamper and is examined using an optical head having optical constants equivalent to those of a disk examination machine, thus making it possible to obtain characteristic playback examination results equivalent to those obtained from disks manufactured using the optical stamper, wherefore optical stamper quality can be easily assessed.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Kimio Hirono, Hirofumi Kurosawa, Noboru Furuya
  • Patent number: 6636207
    Abstract: The invention provides a first pair of bit lines BM and {overscore (BM)} that read data from a specified one of memory cells in a memory cell column, and a second pair of bit lines BS and {overscore (BS)} that write data in another specified one of the memory cells in the memory cell column include a display read line that successively reads out display data from the memory cell column. As viewed in a plan view, the display read line is disposed between the pair of bit lines BS and {overscore (BS)}. Potentials of signals that are transmitted through the pair of bit lines BS and {overscore (BS)} are in a mutually opposite relationship. Therefore, even when coupling capacitors are formed between the pair of bit lines BS and {overscore (BS)} and the display read line, the charges that are charged and discharged between the capacitances and the display read line are offset, and therefore the signal potential on the display read line does not deteriorate.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Shigeru Matsuyama
  • Patent number: 6636194
    Abstract: Writing and holding a data signal to and in a memory circuit in a pixel driving circuit are controlled according to whether a row scanning line and a column scanning line are selected or not. According to a data signal held in the memory circuit, a pixel driver connects a first voltage signal line or a second voltage signal line to a pixel. A reference voltage is applied to a counter electrode of a counter substrate, and display is performed by a potential difference between the reference voltage and a first voltage signal or a second voltage signal.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Ryo Ishii
  • Patent number: 6635850
    Abstract: A laser machining method and apparatus performs high-speed and high-precision machining on a thin film and a liquid crystal panel. The apparatus includes: a plurality of pulse laser generators, drivers for alternately driving a plurality of pulse laser generators to generate laser beams delayed in phase between each other; collimators for making the generated laser beams equal in quality; a wave plate for converting the laser beams into elliptically polarized laser beams; and a phase grating for dividing each laser beam emitted by each of the plurality of laser beam generators into a plurality of laser beams; such that an object to be processed is selectively illuminated with the plurality of laser beams produced by the phase grating. The phase grating has structure on its surface for dividing each of the laser beams into equal intensity beams. Open grooves are formed having uniform shape and quality.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Jun Amako, Masami Murai, Tsutomu Ota, Tomio Sonehara
  • Patent number: D481056
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: October 21, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Mugio Kawasaki, Hirohisa Nakano