Patents Assigned to Semiconductor Energy Laboratories Co., Ltd.
  • Patent number: 11936036
    Abstract: A positive electrode active material in which a capacity decrease caused by charge and discharge cycles is suppressed is provided. Alternatively, a positive electrode active material having a crystal structure that is unlikely to be broken by repeated charging and discharging is provided. The positive electrode active material contains titanium, nickel, aluminum, magnesium, and fluorine, and includes a region where titanium is unevenly distributed, a region where nickel is unevenly distributed, and a region where magnesium is unevenly distributed in a projection on its surface. Aluminum is preferably unevenly distributed in a surface portion, not in the projection, of the positive electrode active material.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yohei Momma, Hiroshi Kadoma, Yoshihiro Komatsu, Shiori Saga, Shunpei Yamazaki
  • Patent number: 11937498
    Abstract: A novel compound is provided. Alight-emitting device having high emission efficiency and a long lifetime is also provided. An organic compound is represented by General Formula (G2), in which a benzo[a]anthracene skeleton is bonded to the 2-position of an anthracene skeleton. In General Formula (G2), R1 to R3, R5 to R12, and R21 to R29 each independently represent any one of hydrogen, an alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 6 carbon atoms, and a substituted or unsubstituted aryl group having 6 to 13 carbon atoms in a ring. Another embodiment of the present invention is a light-emitting device including the compound.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroshi Kadoma, Satoshi Seo, Hiroki Suzuki, Naoaki Hashimoto, Tsunenori Suzuki
  • Patent number: 11935897
    Abstract: A display device capable of performing proper display without image signal conversion is provided. In the case of high-resolution display, individual data is supplied to each pixel through a first signal line and a first transistor included in each pixel. In the case of low-resolution display, the same data is supplied to a plurality of pixels through a second signal line and a second transistor electrically connected to the plurality of pixels. When the number of image signals to be displayed is more than one and the image signals support different resolutions, display can be performed without up conversion or down conversion by switching an image signal supply path as described above.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Susumu Kawashima, Naoto Kusumoto
  • Patent number: 11936043
    Abstract: A composite oxide with high diffusion rate of lithium is provided. Alternatively, a lithium-containing complex phosphate with high diffusion rate of lithium is provided. Alternatively, a positive electrode active material with high diffusion rate of lithium is provided. Alternatively, a lithium ion battery with high output is provided. Alternatively, a lithium ion battery that can be manufactured at low cost is provided. A positive electrode active material is formed through a first step of mixing a lithium compound, a phosphorus compound, and water, a second step of adjusting pH by adding a first aqueous solution to a first mixed solution formed in the first step, a third step of mixing an iron compound with a second mixed solution formed in the second step, a fourth step of performing heat treatment under a pressure more than or equal to 0.1 MPa and less than or equal to 2 MPa at a highest temperature more than 100° C. and less than or equal to 119° C.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Miwa, Yumiko Yoneda, Teppei Oguni
  • Patent number: 11935964
    Abstract: A semiconductor device having high reliability is provided. The semiconductor device includes a transistor and an insulator placed so as to surround the transistor; the insulator has a barrier property against hydrogen; the transistor includes an oxide and a conductor; the conductor includes nitrogen and a metal; the conductor has a physical property of extracting hydrogen; the conductor includes a region having a hydrogen concentration higher than or equal to 2.0×1019 atoms/cm3 and lower than or equal to 1.0×1021 atoms/cm3; and at least part of hydrogen atoms included in the region is bonded to a nitrogen atom.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yoshihiro Komatsu, Toshikazu Ohno
  • Patent number: 11937475
    Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Mizuki Sato
  • Patent number: 11935944
    Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Shinya Sasagawa, Motomu Kurata, Masashi Tsubuku
  • Publication number: 20240090247
    Abstract: A novel functional panel that is highly convenient, useful, or reliable is provided. The functional panel includes a first element and a second element. The first element includes a first electrode, a second electrode, and a first optical functional layer. The first optical functional layer includes a region interposed between the first electrode and the second electrode. The first optical functional layer includes a first layer and a layer containing a first light-emitting material. The second element includes a third electrode, the second electrode, and a second optical functional layer. The second optical functional layer includes a region interposed between the third electrode and the second electrode. The second optical functional layer includes the first layer and a layer containing a photoelectric conversion material.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke KUBOTA, Taisuke Kamada
  • Publication number: 20240090194
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.
    Type: Application
    Filed: August 10, 2023
    Publication date: March 14, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuichi SATO, Ryota HODO, Yuta IIDA, Tomoaki MORIWAKA
  • Publication number: 20240090306
    Abstract: A display device having a biometric authentication function is provided. A highly convenient display device is provided. The display device includes a first substrate, a light guide plate, a plurality of first light-emitting elements, a second light-emitting element, and a plurality of light-receiving elements. The light guide plate includes a first portion having a first surface and a second portion having a second surface that connects with the first surface and has a different normal direction from the first surface. The first light-emitting elements and the light-receiving elements are provided between the first substrate and the light guide plate. The first light-emitting elements have a function of emitting first light through the light guide plate, and the second light-emitting element has a function of emitting second light to a side surface of the light guide plate. The light-receiving elements have a function of receiving the second light and converting the second light to an electric signal.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke KUBOTA, Ryo HATSUMI, Taisuke KAMADA
  • Publication number: 20240088303
    Abstract: A semiconductor device including an oxide semiconductor film that includes a transistor with excellent electrical characteristics is provided. It is a semiconductor device including a transistor. The transistor includes a gate electrode, a first insulating film, an oxide semiconductor film, a source electrode, a drain electrode, and a second insulating film. The source electrode and the drain electrode each include a first conductive film, a second conductive film over and in contact with the first conductive film, and a third conductive film over and in contact with the second conductive film. The second conductive film contains copper, the first conductive film and the third conductive film include a material that inhibits diffusion of copper, and an end portion of the second conductive film includes a region containing copper and silicon.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasutaka NAKAZAWA, Junichi KOEZUKA, Takashi HAMOCHI
  • Patent number: 11927862
    Abstract: An object is to reduce parasitic capacitance of a signal line included in a liquid crystal display device. A transistor including an oxide semiconductor layer is used as a transistor provided in each pixel. Note that the oxide semiconductor layer is an oxide semiconductor layer which is highly purified by thoroughly removing impurities (hydrogen, water, or the like) which become electron suppliers (donors). Thus, the amount of leakage current (off-state current) can be reduced when the transistor is off. Therefore, a voltage applied to a liquid crystal element can be held without providing a capacitor in each pixel. In addition, a capacitor wiring extending to a pixel portion of the liquid crystal display device can be eliminated. Therefore, parasitic capacitance in a region where the signal line and the capacitor wiring intersect with each other can be eliminated.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshikazu Kondo, Jun Koyama, Shunpei Yamazaki
  • Patent number: 11929438
    Abstract: A novel oxide semiconductor, a novel oxynitride semiconductor, a transistor including them, or a novel sputtering target is provided. A composite target includes a first region and a second region. The first region includes an insulating material and the second region includes a conductive material. The first region and the second region each include a microcrystal whose diameter is greater than or equal to 0.5 nm and less than or equal to 3 nm or a value in the neighborhood thereof. A semiconductor film is formed using the composite target.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11928988
    Abstract: A plurality of display panels having a curved surface are placed in a limited space. Two, or three or more display panels are combined to form one display region having a T-shaped outer edge as one screen, and a driver can curve part of the display panel as appropriate so that the driver can see the screen easily. A first display panel or a second display panel has flexibility and includes a position adjustment function of curving an end portion. That is, by curving part of the display panel, the user can see the display panel easily. The in-car design can also be varied.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yosuke Tsukamoto, Daiki Nakamura, Daisuke Furumatsu, Kazuhiko Fujita, Kyoichi Mukao, Junya Maruyama
  • Patent number: 11929437
    Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Matsubayashi, Keisuke Murayama
  • Patent number: 11929412
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima, Kenichi Okazaki
  • Patent number: 11930653
    Abstract: A light-emitting device with high emission efficiency and reliability is provided. The light-emitting device includes a fluorescent light-emitting layer and a phosphorescent light-emitting layer. A host material used in the fluorescent light-emitting layer has a function of converting triplet excitation energy into light emission and a guest material used in the fluorescent light-emitting layer emits fluorescence. The guest material has a molecular structure including a luminophore and a protecting group, and one molecule of the guest material includes five or more protecting groups. The introduction of the protecting groups into the molecule inhibits transfer of triplet excitation energy from the host material to the guest material by the Dexter mechanism. An alkyl group or a branched-chain alkyl group is used as the protecting group.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Ishisone, Nobuharu Ohsawa, Satoshi Seo
  • Patent number: 11929426
    Abstract: A semiconductor device with high reliability is provided. The present invention relates to a method for manufacturing a transistor including an oxide semiconductor. A stacked-layer structure of an oxide semiconductor and an insulator functioning as a gate insulator is subjected to microwave-excited plasma treatment, whereby the carrier concentration of the oxide semiconductor is reduced and the barrier property of the gate insulator is improved. In addition, a conductor functioning as an electrode and the insulator functioning as a gate insulator are formed in contact with the oxide semiconductor and then the microwave-excited plasma treatment is performed, whereby a high-resistance region and a low-resistance region can be formed in the oxide semiconductor in a self-aligned manner. Moreover, the microwave-excited plasma treatment is performed under an atmosphere containing oxygen with a high pressure, whereby a transistor having favorable electrical characteristics can be provided.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Naoki Okuno, Hiroki Komagata
  • Patent number: 11929416
    Abstract: A semiconductor device with favorable reliability is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a first insulator over the second oxide, a first conductor over the first insulator, and a second conductor and a third conductor over the second oxide. The second conductor includes a first region and a second region, the third conductor includes a third region and a fourth region, the second region is positioned above the first region, the fourth region is positioned above the third region, and each of the second conductor and the third conductor contains tantalum and nitrogen. The atomic ratio of nitrogen to tantalum in the first region is higher than the atomic ratio of nitrogen to tantalum in the second region, and the atomic ratio of nitrogen to tantalum in the third region is higher than the atomic ratio of nitrogen to tantalum in the fourth region.
    Type: Grant
    Filed: September 2, 2019
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Ryo Tokumaru, Shinya Sasagawa, Tomonori Nakayama
  • Patent number: 11930701
    Abstract: A novel compound is provided. The novel compound is represented by General Formula (G1). In General Formula (G1), A represents a substituted or unsubstituted condensed aromatic ring having 10 to 30 carbon atoms or a substituted or unsubstituted condensed heteroaromatic ring having 10 to 30 carbon atoms, and R1 represents a substituted or unsubstituted aryl group having 6 to 25 carbon atoms. Each of Y1 and Y2 independently represents a cycloalkyl group having a bridge structure and having 7 to 10 carbon atoms.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Haruyama, Satoshi Seo, Nobuharu Ohsawa