Patents Assigned to Semiconductor Energy Laboratories Co., Ltd.
  • Patent number: 11948515
    Abstract: A low-power display device is provided. The display device is provided with a plurality of display portions. A data driver circuit and an addition circuit are provided to have a region overlapping with the display portion. First analog data is output from the data driver circuit in the case where first digital data consisting of a first digital value is input to the data driver circuit, whereas second analog data is output from the data driver circuit in the case where second digital data consisting of a second digital value is input to the data driver circuit. The addition circuit generates analog data corresponding to digital data that has a high-order bit that is the first digital value and a low-order bit that is the second digital value, by adding the second analog data to the first analog data. An output terminal of the data driver circuit is directly connected to an input terminal of the addition circuit without through an amplifier circuit.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kouhei Toyotaka, Kiyotaka Kimura, Hidetomo Kobayashi, Kei Takahashi
  • Patent number: 11950410
    Abstract: A semiconductor device with a large storage capacity per unit area can be provided. A memory cell including a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor includes a stack including a first conductor, a first insulator over the first conductor, a second conductor over the first insulator, a second insulator over the second conductor, and a third conductor over the second insulator; a first oxide arranged in a ring-like shape on a side surface of an opening portion of the second conductor; a fourth conductor arranged in a ring-like shape in contact with an inner wall of the first oxide; a cylindrical third insulator arranged to penetrate the stack, the first oxide, and the fourth conductor; and a second oxide arranged in contact with an inner wall of the third insulator.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshinobu Asami
  • Patent number: 11947398
    Abstract: A sturdy electronic device is provided. A reliable electronic device is provided. A novel electronic device is provided. An electronic device includes a first board, a second board, a display portion having flexibility, and a power storage device having flexibility. The first board and the second board face each other. The display portion and the power storage device are provided between the first board and the second board. The display portion includes a first surface facing the power storage device. The first surface includes a first region not fixed to the power storage device. The first region overlaps with a display region of the display portion.
    Type: Grant
    Filed: April 12, 2023
    Date of Patent: April 2, 2024
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Masaaki Hiroki
  • Patent number: 11948945
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes an oscillation circuit including a first coil, a second coil, a first capacitor, a second capacitor, a first transistor, and a second transistor and a frequency correction circuit including a third capacitor, a fourth capacitor, a third transistor, a fourth transistor, and a switching circuit. The switching circuit has a function of controlling a conduction state or a non-conduction state of the third transistor and the fourth transistor. The frequency correction circuit is provided above the oscillation circuit and has a function of adjusting an oscillation frequency of the oscillation circuit. The first transistor and the second transistor each include a semiconductor layer containing silicon in a channel formation region. The third transistor and the fourth transistor each include a semiconductor layer containing an oxide semiconductor in a channel formation region.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuto Yakubo, Hitoshi Kunitake, Takayuki Ikeda
  • Patent number: 11948959
    Abstract: An imaging device that generates, in a pixel, a potential higher than a potential to be supplied to the pixel is provided. The imaging device includes a pixel including a first circuit and a second circuit; the second circuit includes a photoelectric conversion device; the first circuit is electrically connected to the second circuit; the first circuit has a function of adding a first potential and a second potential to generate a third potential; and the second circuit has a function of generating data in the photoelectric conversion device to which the third potential is applied and has a function of outputting the data.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Naoto Kusumoto
  • Patent number: 11949021
    Abstract: A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: April 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Hideomi Suzawa
  • Publication number: 20240105855
    Abstract: A novel semiconductor device is provided. A component extending in a first direction, and a first conductor and a second conductor extending in a second direction are provided. The component includes a third conductor, a first insulator, a first semiconductor, and a second insulator. In a first intersection portion of the component and the first conductor, the first insulator, the first semiconductor, the second insulator, a second semiconductor, and a third insulator are provided concentrically. In a second intersection portion of the component and the second conductor, the first insulator, the first semiconductor, the second insulator, a fourth conductor, and a fourth insulator are provided concentrically around the third conductor.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Hitoshi KUNITAKE
  • Publication number: 20240107854
    Abstract: The thickness of a display device including a touch sensor is reduced. Alternatively, the thickness of a display device having high display quality is reduced. Alternatively, a method for manufacturing a display device with high mass productivity is provided. Alternatively, a display device having high reliability is provided. Stacked substrates in each of which a sufficiently thin substrate and a relatively thick support substrate are stacked are used as substrates. One surface of the thin substrate of one of the stacked substrates is provided with a layer including a touch sensor, and one surface of the thin substrate of the other stacked substrate is provided with a layer including a display element. After the two stacked substrates are attached to each other so that the touch sensor and the display element face each other, the support substrate and the thin substrate of each stacked substrate are separated from each other.
    Type: Application
    Filed: December 11, 2023
    Publication date: March 28, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Yoshiharu HIRAKATA, Kensuke YOSHIZUMI
  • Patent number: 11940703
    Abstract: A liquid crystal display device with a high aperture ratio is provided. The display device includes a transistor, a first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer, a pixel electrode, a common electrode, and a liquid crystal layer in a pixel. The first insulating layer is positioned over a channel formation region of the transistor. The first conductive layer is positioned over the first insulating layer. The second insulating layer is positioned over the transistor, the first insulating layer, and the first conductive layer. The pixel electrode is positioned over the second insulating layer, the third insulating layer is positioned over the pixel electrode, the common electrode is positioned over the third insulating layer, and the liquid crystal layer is positioned over the common electrode. The common electrode includes a region overlapping with the first conductive layer with the pixel electrode positioned therebetween.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: March 26, 2024
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kouhei Toyotaka, Kazunori Watanabe, Susumu Kawashima, Kei Takahashi, Koji Kusunoki, Masataka Nakada, Ami Sato
  • Patent number: 11942132
    Abstract: The operation speed of a semiconductor device is improved. The semiconductor device includes a first memory region and a second memory region; in the semiconductor device, a first memory cell in the first memory region is superior to a second memory cell in the second memory region in data retention characteristics such as a large storage capacitance or a large channel length-channel width ratio (L/W) of a transistor. When the semiconductor device is used as a cache memory or a main memory device of a processor, the first memory region mainly stores a start-up routine and is not used as a work region for arithmetic operation, and the second memory region is used as a work region for arithmetic operation. The first memory region becomes an accessible region when the processor is booted, and the first memory region becomes an inaccessible region when the processor is in normal operation.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Shunpei Yamazaki
  • Patent number: 11940697
    Abstract: To improve viewing angle characteristics by varying voltage which is applied between liquid crystal elements. A liquid crystal display device in which one pixel is provided with three or more liquid crystal elements and the level of voltage which is applied is varied between the liquid crystal elements is varied. In order to vary the level of the voltage which is applied between the liquid crystal elements, an element which divides the applied voltage is provided. In order to vary the level of the applied voltage, a capacitor, a resistor, a transistor, or the like is used. Viewing angle characteristics can be improved by varying the level of the voltage which is applied between the liquid crystal elements.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11942483
    Abstract: A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11942497
    Abstract: An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Naoto Kusumoto
  • Patent number: 11942602
    Abstract: To provide a power storage device whose charge and discharge characteristics are unlikely to be degraded by heat treatment. To provide a power storage device that is highly safe against heat treatment. The power storage device includes a positive electrode, a negative electrode, a separator, an electrolytic solution, and an exterior body. The separator is located between the positive electrode and the negative electrode. The separator contains polyphenylene sulfide or solvent-spun regenerated cellulosic fiber. The electrolytic solution contains a solute and two or more kinds of solvents. The solute contains LiBETA. One of the solvents is propylene carbonate.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuhei Narita, Ryota Tajima, Teppei Oguni
  • Patent number: 11940684
    Abstract: A display device or an electronic device with high portability and browsability is provided. A display device which includes two display panels that overlap with each other and in which the area of a portion where the two display panels overlap with each other is variable is provided. The larger the area where the two display panels overlap with each other is, the smaller the display device becomes. The first display panel includes a first region that performs display. The second display panel includes a second region that performs display, and a third region that is adjacent to the second region and transmits visible light. When the third region overlaps with the side of a surface which performs display of the first region, display can be performed using a seamless large display region.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuichi Yanagisawa, Nozomu Sugisawa, Natsuko Takase
  • Patent number: 11942057
    Abstract: It is an object to provide a display device which can favorably display a image without delayed or distorted signals. The display device includes a first gate driver and a second gate driver. The first gate driver and the second gate driver each include a plurality of flip flop circuits and a plurality of transfer signal generation circuits. Both the flip flop circuit and the transfer signal generation circuit are circuits which output a signal inputted to a first input terminal with a half clock cycle delay. In addition, an output terminal of the transfer signal generation circuit is directly connected to a first input terminal of the flip flop circuit in the next stage. Therefore, delay and distortion of the signal which is inputted from the transfer signal generation circuit to the flip flop circuit can be reduced.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Umezaki
  • Patent number: 11943944
    Abstract: A novel light-emitting device is provided. Alternatively, a light-emitting device having a long driving lifetime at high temperature is provided. The light-emitting device includes an anode, a cathode, and an EL layer positioned between the anode and the cathode. The EL layer includes a first layer, a second layer, a third layer, and a light-emitting layer in this order from the anode side. The first layer includes a first organic compound and a second organic compound. The second layer includes a third organic compound. The third layer includes a fourth organic compound. The light-emitting layer includes a fifth organic compound and an emission center substance. The first organic compound exhibits an electron-accepting property with respect to the second organic compound. A difference between HOMO levels of the fourth organic compound and the fifth organic compound is less than or equal to 0.24 eV.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yusuke Takita, Tsunenori Suzuki, Naoaki Hashimoto, Takumu Okuyama, Satoshi Seo
  • Patent number: 11941197
    Abstract: A novel functional panel that is highly convenient, useful, or reliable is provided. The functional panel includes a first driver circuit, a second driver circuit, and a pixel set, the first driver circuit has a function of supplying a first selection signal and a second selection signal, a second driver circuit has a function of supplying an image signal and a control signal, and the control signal includes a first level and a second level. The pixel set includes a first pixel, and the first pixel includes a first element and a first pixel circuit. The first pixel circuit has functions of obtaining the image signal on the basis of the first selection signal, obtaining the control signal on the basis of the second selection signal, and holding a first state to a third state.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kubota, Susumu Kawashima, Koji Kusunoki
  • Patent number: 11940702
    Abstract: A novel composite oxide semiconductor which can be used in a transistor including an oxide semiconductor film is provided. In the composite oxide semiconductor, a first region and a second region are mixed. The first region includes a plurality of first clusters containing In and oxygen as main components. The second region includes a plurality of second clusters containing Zn and oxygen as main components. The plurality of first clusters have portions connected to each other. The plurality of second clusters have portions connected to each other.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11942170
    Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiko Amano, Kouhei Toyotaka, Hiroyuki Miyake, Aya Miyazaki, Hideaki Shishido, Koji Kusunoki