Patents Assigned to Semiconductor Energy Laboratory Co. Ltd., a Japan corporation
  • Publication number: 20040211965
    Abstract: A wiring line to which a high-frequency signal is applied is electrically connected in parallel to an auxiliary, wiring line via a plurality of contact holes. The contact holes are formed through an interlayer insulating film and arranged in vertical direction to the wiring line. Since the auxiliary wiring line is formed in the same layer as an electrode that constitutes a TFT, the electric resistance of the wiring line can be reduced effectively and waveform rounding of an applied high-frequency signal can be reduced without increasing the number of manufacturing steps.
    Type: Application
    Filed: May 21, 2004
    Publication date: October 28, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Jun Koyama, Hisashi Ohtani, Yasushi Ogata, Shunpei Yamazaki
  • Publication number: 20040206958
    Abstract: A thin film semiconductor transistor structure has a substrate with a dielectric surface, and an active layer made of a semiconductor thin film exhibiting a crystallinity as equivalent to the single-crystalline. To fabricate the transistor, the semiconductor thin film is formed on the substrate, which film includes a mixture of a plurality of crystals which may be columnar crystals and/or capillary crystal substantially parallel to the substrate. The resultant structure is then subject to thermal oxidation in a chosen atmosphere containing halogen, thereby removing away any metallic element as contained in the film. This may enable formation of a mono-domain region in which the individual columnar or capillary crystal is in contact with any adjacent crystals and which is capable of being substantially deemed to be a single-crystalline region without presence or inclusion of any crystal grain boundaries therein. This region is for use in forming the active layer of the transistor.
    Type: Application
    Filed: May 12, 2004
    Publication date: October 21, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Shunpei Yamazaki, Jun Koyama, Akiharu Miyanaga, Takeshi Fukunaga
  • Publication number: 20040196561
    Abstract: There is provided a structure for reducing optical loss in an optical apparatus (homogenizer) for making the intensity distribution of a laser beam uniform.
    Type: Application
    Filed: April 23, 2004
    Publication date: October 7, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventor: Koichiro Tanaka
  • Publication number: 20040195590
    Abstract: There has been a problem that the manufacturing process is complicated and the number of processes is increased when a TFT with an LDD structure or a TFT with a GOLD structure is formed. In a method of manufacturing a semiconductor device, after low concentration impurity regions (24, 25) are formed in a second doping process, a width of the low concentration impurity region which is overlapped with the third electrode (18c) and a width of the low concentration impurity region which is not overlapped with the third electrode can be freely controlled by a fourth etching process. Thus, in a region overlapped with the third electrode, a relaxation of electric field concentration is achieved and then a hot carrier injection can be prevented. And, in the region which is not overlapped with the third electrode, the off-current value can be suppressed.
    Type: Application
    Filed: April 28, 2004
    Publication date: October 7, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Hideomi Suzawa, Koji Ono, Toru Takayama, Tatsuya Arao, Shunpei Yamazaki
  • Publication number: 20040192025
    Abstract: A semiconductor device having reliable electrode contacts. First, an interlayer dielectric film is formed from a resinous material. Then, window holes are formed. The interlayer dielectric film is recessed by oxygen plasma. This gives rise to tapering window holes. This makes it easy to make contacts even if the circuit pattern is complex.
    Type: Application
    Filed: April 8, 2004
    Publication date: September 30, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Shunpei Yamazaki, Takeshi Fukunaga
  • Publication number: 20040183075
    Abstract: A wiring line to which a high-frequency signal is applied is electrically connected in parallel to an auxiliary wiring line via a plurality of contact holes. The contact holes are formed through an interlayer insulting film and arranged in vertical direction to the wiring line. Since the auxiliary wiring line is formed in the same layer as an electrode that constitutes a TFT, the electric resistance of the wiring line can be reduced effectively and waveform rounding of an applied high-frequency signal can be reduced without increasing the number of manufacturing steps.
    Type: Application
    Filed: March 19, 2004
    Publication date: September 23, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd. a Japan corporation
    Inventors: Jun Koyama, Hisashi Ohtani, Yasushi Ogata, Shunpei Yamazaki
  • Publication number: 20040183132
    Abstract: In a semiconductor device using a crystalline semiconductor film on a substrate 106 having an insulating surface, impurities are locally implanted into an active region 102 to form a pinning region 104. The pinning region 104 suppresses the spread of a depletion layer from the drain side to effectively prevent the short channel effect. Also, since a channel forming region 105 is intrinsic or substantially intrinsic, a high mobility is realized.
    Type: Application
    Filed: January 29, 2004
    Publication date: September 23, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Akiharu Miyanaga, Toru Mitsuki, Takeshi Fukunaga
  • Publication number: 20040179164
    Abstract: The present invention related to unifying steps of sealing material so that the yield and the reliability of a liquid-crystal display device become high. A starting film of scanning lines is patterned so that prismatic dummy wirings 301 for the first layer which are not electrically connected are formed in regions R1 and R2, and wirings 302 extending from the pixel section are formed in a region R3, and wirings 303 having connection end portions 303a are formed in a region R4. After an interlayer insulation film is formed on those surface, the starting film of the signal lines is patterned so that the dummy wirings 304 for the second layer are formed to embed the gaps between the wirings 301 to 303, and also the wirings 305 and the wirings 303 which extend from the pixel portion are connected to each other. As a result, the cross-sectional structure along the line A-A′ of the sealing material formation region 107 can be unified.
    Type: Application
    Filed: March 30, 2004
    Publication date: September 16, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventor: Hongyong Zhang
  • Publication number: 20040173849
    Abstract: There is disclosed a hybrid circuit in which a circuit formed by TFTs is integrated with an RF filter. The TFTs are fabricated on a quartz substrate. A ceramic filter forming the RF filter is fabricated on another substrate. Terminals extend through the quartz substrate. The TFTs are connected with the ceramic filter via the terminals. Thus, an RF module is constructed.
    Type: Application
    Filed: March 15, 2004
    Publication date: September 9, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd, a Japan corporation
    Inventors: Shunpei Yamazaki, Satoshi Teramoto
  • Publication number: 20040173811
    Abstract: There is provided a light emitting device which is bright and has low electric power consumption and high reliability. A triplet EL element 203 electrically connected to a current controlling TFT 102 is provided in a pixel portion 201. A luminescent material used for the triplet EL element 203 has a feature that EL is obtained by triplet excitation, and exhibits high luminous efficiency at a low operation voltage as compared with the prior art. Accordingly, the operation is made at the low operation voltage, so that the light emitting device which is bright and has low electric power consumption and high reliability can be obtained.
    Type: Application
    Filed: January 12, 2004
    Publication date: September 9, 2004
    Applicant: Semiconductor Energy Laboratory Co., LTD, a Japan Corporation
    Inventors: Shunpei Yamazaki, Kazutaka Inukai
  • Publication number: 20040174485
    Abstract: In a horizontal electric field drive type liquid crystal electro-optic device wherein a liquid crystal material is driven by controlling the strength of an electric field parallel to a substrate, noncontinuity of the electric field strength around each pixel electrode is minimized and thereby the occurrence of flaws in the orientation of the liquid crystal material and dispersion in operation are reduced and a construction having improved display characteristics and a method of manufacturing the same are provided. In a horizontal electric field drive type liquid crystal electro-optic device wherein a gate electrode 403, a source electrode 407, a drain electrode 408, a semiconductor film 406 and a common electrode 404 are formed on a glass substrate and a liquid crystal material is driven by controlling the strength of an electric field substantially parallel to the glass substrate, the electrodes and the semiconductor film are made curved, for example semi-circular or semi-elliptical, in sectional profile.
    Type: Application
    Filed: March 24, 2004
    Publication date: September 9, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Shunpei Yamazaki, Takeshi Nishi, Rumo Satake
  • Publication number: 20040174189
    Abstract: A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1 becomes a high level, each of TFTs (101, 103) is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT (102) is increased to (VDD−V thN) and the gate is floated. TFT (102) is thus turned on. Then CK1 becomes low level and each of TFTs (101, 103) is turned off. Simultaneously, CK3 becomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT (102) is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (104), so that the high level appearing at the signal output section (Out) becomes equal to VDD.
    Type: Application
    Filed: November 4, 2003
    Publication date: September 9, 2004
    Applicant: Semiconductor Energy Laboratory Co. Ltd., a Japan corporation
    Inventors: Shou Nagao, Munehiro Azami, Yoshifumi Tanada
  • Publication number: 20040174324
    Abstract: Problems exist in areas such as image visibility, endurance of the device, precision, miniaturization, and electric power consumption in an information device having a conventional resistive film method or optical method pen input function. Both EL elements and photoelectric conversion elements are arranged in each pixel of a display device in an information device of the present invention having a pen input function. Information input is performed by the input of light to the photoelectric conversion elements in accordance with a pen that reflects light by a pen tip. An information device with a pen input function, capable of displaying a clear image without loss of brightness in the displayed image, having superior endurance, capable of being miniaturized, and having good precision can thus be obtained.
    Type: Application
    Filed: March 18, 2004
    Publication date: September 9, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Publication number: 20040169183
    Abstract: A semiconductor device with high reliability and operation performance is manufactured without increasing the number of manufacture steps. A gate electrode has a laminate structure. A TFT having a low concentration impurity region that overlaps the gate electrode or a TFT having a low concentration impurity region that does not overlap the gate electrode is chosen for a circuit in accordance with the function of the circuit.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 2, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Etsuko Fujimoto, Satoshi Murakami, Shunpei Yamazaki, Shingo Eguchi
  • Publication number: 20040169177
    Abstract: The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semiconductor device whose active region is formed from the crystalline semiconductor film and a method of manufacturing the semiconductor device are provided. In a semiconductor film containing silicon and germanium as its ingredient and having a crystal structure, the {101} plane reaches 30% or more of all the lattice planes detected by Electron backscatter diffraction.
    Type: Application
    Filed: March 4, 2004
    Publication date: September 2, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd. a Japan corporation
    Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toru Mitsuki, Kenji Kasahara, Tamae Takano, Chiho Kokubo, Shunpei Yamazaki, Takeshi Shichi
  • Publication number: 20040164296
    Abstract: There are provided a structure of a semiconductor device in which low power consumption is realized even in a case where a size of a display region is increased to be a large size screen and a manufacturing method thereof. A gate electrode in a pixel portion is formed as a three layered structure of a material film containing mainly W, a material film containing mainly Al, and a material film containing mainly Ti to reduce a wiring resistance. A wiring is etched using an IPC etching apparatus. The gate electrode has a taper shape and the width of a region which becomes the taper shape is set to be 1 &mgr;m or more.
    Type: Application
    Filed: November 24, 2003
    Publication date: August 26, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Yoshihiro Kusuyama, Koji Ono, Jun Koyama
  • Publication number: 20040165831
    Abstract: To suppress the occurrence of a failure caused by static electricity in the manufacturing process of an active matrix type display device in which an active matrix circuit and peripheral drive circuits are integrated on a glass substrate, a protective capacitor to be connected to a short ring is formed using a semiconductor layer made from the same material as the active layer of a thin film transistor present under the short ring. This protective capacitor has a function to absorb an electric pulse generated in the plasma using process. Discharge patterns are provided to prevent an electric pulse from affecting each circuit.
    Type: Application
    Filed: November 4, 2003
    Publication date: August 26, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd. a Japan Corporation
    Inventors: Hongyong Zhang, Satoshi Teramoto
  • Publication number: 20040164300
    Abstract: A semiconductor device includes TFTs designed in accordance with characteristics of circuits. In a first structure of the invention, the TFT is formed by using a crystalline silicon film made of a unique crystal structure body. The crystal structure body has a structure in which rod-like or flattened rod-like crystals grow in a direction parallel to each other. In a second structure of the invention, growth distances of lateral growth regions are made different from each other in accordance with channel lengths of the TFTs. By this, characteristics of TFTs formed in one lateral growth region can be made as uniform as possible.
    Type: Application
    Filed: January 9, 2004
    Publication date: August 26, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Shunpei Yamazaki, Hisashi Ohtani
  • Publication number: 20040154542
    Abstract: There is provided a film formation apparatus for forming an organic compound film including a plurality of functional regions. A plurality of evaporation sources (203a to 203c) are included in a film formation chamber (210), functional regions made of respective organic compounds are successively formed, and a mixed region can be further formed in an interface between the functional regions. Also, when means for applying energy to an organic compound molecule to be formed into a film in a molecular activation region (213) is provided in such a film formation chamber, a dense film can be formed.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 12, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Shunpei Yamazaki, Satoshi Seo, Noriko Shibata
  • Publication number: 20040157432
    Abstract: The number of masks is reduced in a method of manufacturing a semiconductor device that has a transistor and a photoelectric conversion element on an insulating surface. In a manufacturing method of the present invention semiconductor layers functioning as a source region, a drain region, and a channel formation region of a transistor are formed at the same time an n type semiconductor layer and p type semiconductor layer of a photoelectric conversion element are formed. Connection wiring lines to be electrically connected to the n type semiconductor layer and p type semiconductor layer of the photoelectric conversion element are formed at the same time a source wiring line and a drain wiring line of a transistor are formed.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 12, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japan corporation
    Inventors: Masato Yonezawa, Hajime Kimura, Yu Yamazaki, Jun Koyama, Yasuko Watanabe