Patents Assigned to Semiconductor Energy Laboratory Co.
  • Patent number: 11961894
    Abstract: A semiconductor device includes a semiconductor layer over a substrate; a gate insulating film covering the semiconductor layer; a gate wiring including a gate electrode, which is provided over the gate insulating film and is formed by stacking a first conductive layer and a second conductive layer; an insulating film covering the semiconductor layer and the gate wiring including the gate electrode; and a source wiring including a source electrode, which is provided over the insulating film, is electrically connected to the semiconductor layer, and is formed by stacking a third conductive layer and a fourth conductive layer. The gate electrode is formed using the first conductive layer. The gate wiring is formed using the first conductive layer and the second conductive layer. The source electrode is formed using the third conductive layer. The source wiring is formed using the third conductive layer and the fourth conductive layer.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11961918
    Abstract: A semiconductor device which has favorable electrical characteristics, a method for manufacturing a semiconductor device with high productivity, and a method for manufacturing a semiconductor device with a high yield are provided.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Yukinori Shima, Kenichi Okazaki, Junichi Koezuka, Shunpei Yamazaki
  • Patent number: 11961843
    Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Atsushi Umezaki, Shunpei Yamazaki
  • Patent number: 11963374
    Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Patent number: 11963360
    Abstract: A highly integrated semiconductor device is provided. The semiconductor device includes a substrate, a prism-like insulator, a memory cell string including a plurality of transistors connected in series. The prism-like insulator is provided over the substrate. The memory cell string is provided on the side surface of the prism-like insulator. The plurality of transistors each include a gate insulator and a gate electrode. The gate insulator includes a first insulator, a second insulator, and a charge accumulation layer. The charge accumulation layer is positioned between the first insulator and the second insulator.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tomoaki Atsumi, Yuta Endo
  • Publication number: 20240120340
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240120339
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240121497
    Abstract: A small light-emitting device is provided. A light-emitting device which is less likely to produce a shadow is provided. A structure including a switching circuit for supplying a pulsed constant current and a light-emitting panel supplied with the pulsed constant current has been conceived.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu HIRAKATA, Nobuharu OHSAWA, Hisao IKEDA, Kazuhiko FUJITA, Akihiro KAITA
  • Publication number: 20240121979
    Abstract: A light-emitting device with high heat resistance in a manufacturing process is to be provided.
    Type: Application
    Filed: February 1, 2022
    Publication date: April 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yui YOSHIYASU, Naoaki HASHIMOTO, Tatsuyoshi TAKAHASHI, Sachiko KAWAKAMI, Satoshi SEO
  • Publication number: 20240120341
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Patent number: 11954276
    Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Masami Jintyou, Yasuharu Hosaka, Naoto Goto, Takahiro Iguchi, Daisuke Kurosaki, Junichi Koezuka
  • Patent number: 11955537
    Abstract: A semiconductor device includes a substrate having an insulating surface; a light-transmitting first electrode provided over the substrate; a light-transmitting second electrode provided over the substrate; a light-transmitting semiconductor layer provided so as to be electrically connected to the first electrode and the second electrode; a first wiring electrically connected to the first electrode; an insulating layer provided so as to cover at least the semiconductor layer; a light-transmitting third electrode provided over the insulating layer in a region overlapping with the semiconductor layer; and a second wiring electrically connected to the third electrode.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11956570
    Abstract: An imaging system that has an image processing function and is capable of generating an interpolation image is provided. The imaging system has an additional function such as image processing and can generate an interpolation image by using image data output from an imaging device. The imaging device can perform filter processing in parallel during a light exposure period, and thus can perform a large amount of arithmetic operation and generate a high-quality interpolation image. The number of arithmetic operations can be further increased particularly during image capturing in a dark place, which requires a long exposure time. Accordingly, the frame rate can be substantially increased, and high-quality moving image data can be generated.
    Type: Grant
    Filed: September 7, 2020
    Date of Patent: April 9, 2024
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yusuke Negoro, Seiichi Yoneda
  • Patent number: 11955192
    Abstract: A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction.
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Umezaki
  • Patent number: 11955612
    Abstract: A power storage system with excellent characteristics is provided. A power storage system with a high degree of safety is provided. A power storage system with less deterioration is provided. A storage battery with excellent characteristics is provided. The power storage system includes a neural network and a storage battery. The neural network includes an input layer, an output layer, and one or more hidden layers between the input layer and the output layer. The predetermined hidden layer is connected to the previous hidden layer or the previous input layer by a predetermined weight coefficient, and connected to the next hidden layer or the next output layer by a predetermined weight coefficient. In the storage battery, voltage and time at which the voltage is obtained are measured as one of sets of data. The sets of data measured at different times are input to the input layer and the operational condition of the storage battery is changed in accordance with a signal output from the output layer.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazutaka Kuriki, Ryota Tajima, Kouhei Toyotaka, Hideaki Shishido, Toshiyuki Isa
  • Patent number: 11955557
    Abstract: A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer. The source electrode and the drain electrode include an oxide region formed by oxidizing a side surface thereof. Note that the oxide region of the source electrode and the drain electrode is preferably formed by plasma treatment with a high frequency power of 300 MHz to 300 GHz and a mixed gas of oxygen and argon.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 11955538
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Naoto Yamade, Hiroshi Fujiki, Tomoaki Moriwaka, Shunsuke Kimura
  • Patent number: 11951769
    Abstract: Space-saving in an automobile or the like provided with a battery is achieved. Design flexibility of an automobile or the like can be improved. An electric power control method or an electric power control system capable of utilizing electric power efficiently is provided. It is an electric power control system of an automobile including a car body, a first battery, a second battery, and a control unit. The control unit obtains states of charge of the first battery and the second battery, determines whether or not a difference between remaining capacities of the first battery and the second battery exceeds a predetermined value, and controls transmission of electric power between the first battery and the second battery, in the case where the difference in the remaining capacities exceeds the predetermined value, to be made such that the remaining capacities are close to each other.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kensuke Yoshizumi, Ryota Tajima
  • Patent number: 11956981
    Abstract: A light-emitting element having high emission efficiency is provided. The light-emitting element includes a first organic compound, a second organic compound, and a third organic compound. The first organic compound has a function of converting triplet excitation energy into light emission. The second organic compound is preferably a TADF material. The third organic compound is a fluorescent compound. Light emitted from the light-emitting element is obtained from the third organic compound. Triplet excitation energy in a light-emitting layer is transferred to the third organic compound by reverse intersystem crossing caused by the second organic compound or through the first organic compound.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Nobuharu Ohsawa, Satoshi Seo
  • Patent number: 11955562
    Abstract: A semiconductor device having a large on-state current and high reliability is provided. The semiconductor device includes a first insulator, a first oxide over the first insulator, a second oxide over the first oxide, a third oxide and a fourth oxide over the second oxide, a first conductor over the third oxide, a second conductor over the fourth oxide, a fifth oxide over the second oxide, a second insulator over the fifth oxide, and a third conductor over the second insulator. The fifth oxide is in contact with a top surface of the second oxide, a side surface of the first conductor, a side surface of the second conductor, a side surface of the third oxide, and a side surface of the fourth oxide. The second oxide contains In, an element M, and Zn. The first oxide and the fifth oxide each contain at least one of constituent elements included in the second oxide. The third oxide and the fourth oxide each contain the element M.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Haruyuki Baba, Naoki Okuno, Yoshihiro Komatsu, Toshikazu Ohno