Abstract: Receiver comprising a cascade of first to N resonance amplifiers (SA1, SA2, SA3), an output thereof being coupled to signal processing means (TO, SD, PK, LP1, S) for deriving a baseband modulation signal. To improve the signal to noise ratio said cascade is included in an RF input stage of the receiver for a distributed selective amplification of an RF reception signal, preferably with an impedance level of the individual resonance amplifiers within said cascade of first to N resonance amplifiers increasing in signal downstream direction.

Abstract: A mirror suppression circuit includes a first quadrature signal path coupled between quadrature signal input and output terminals and an error correction circuit for correction of amplitude and phase errors in a carrier modulated quadrature signal. To obtain a suppression of both amplitude and phase imbalance of the carrier modulated quadrature signal as well as signal amplitude variations, a quadrature output of the error correction circuit is coupled to an error detection circuit. The error detection circuit detects amplitude and phase errors and provides amplitude and phase control signals to the error correction circuit for a negative feed back of the amplitude and phase errors. The amplitude and phase control signals vary with products of components of the quadrature signal and components of a quadrature reference signal.

Abstract: Receiver comprising an RF front end circuit for a selection and conversion of an RF input signal into a pair of quadrature IF (intermediate frequency) signals being supplied through in-phase and phase quadrature signal paths to signal inputs of quadrature phase detection elements, such as in-phase and phase quadrature phase detectors included in a (PLL) phase locked loop, an output of the quadrature phase detection elements being coupled through a loop filter to a control input of a quadrature IF oscillator supplying a pair of quadrature IF oscillator signals to carrier inputs of the quadrature phase detection elements.

Abstract: Multiplier device comprising first to nth multipliers M1 to Mn for multiplying a carrier modulated information signal with first to nth mutually phase shifted and identical, substantially square wave mixing signals MS1 to MSn with 50% duty cycle. In order to eliminate fifth or higher order interferences from the output of said multiplier device according to the invention, n is greater than 2, outputs of said multipliers M1 to Mn are respectively coupled through weighting circuits W1 to Wn with respective fixed weighting factors WF1 to WFn to an adder circuit, said mixing signals MS1 to MSn having respective phase angles ?i corresponding to ?i=i*??, said weighting factors WFi corresponding to the sine value of said respective phase angles ?i=i*?? with ?? being the mutual phase difference between each two phase consecutive mixing signals corresponding to ?/(n+1) and i varying from 1 to n.

Abstract: AM receiver comprising an RF input circuit for receiving an RF AM signal, demodulation means providing an audio signal carried by said RF AM signal as well as automatic gain control means for stabilising an RF carrier dependent DC level at the output of said demodulation means at a substantially fixed stabilisation value. In order to improve the receiver performance in particular at low values of the RF reception fieldstrength, the RF input circuit is being provided with a cascade of N tuneable resonance amplifiers being tuned to said RF AM signal, said automatic gain control means controlling at least one of said cascade of N resonance amplifiers to increase in both gain and selectivity at a decrease of the fieldstrength of said RF input signal.

Abstract: An arrangement for decoding a stereo multiplex signal, comprising a baseband sum signal (L+R), a difference signal (L?R) which is amplitude-modulated on a suppressed sub-carrier and a pilot signal having a frequency located between the frequency bands of said sum and difference signals, said arrangement having an input for the stereo multiplex signal coupled through parallel stereo sum and difference signal paths to first and second inputs of a dematrix circuit, a synchronous demodulator being included in the difference signal path, a local sinusoidal sub-carrier being supplied to a carrier input of said synchronous demodulator for a synchronous demodulation of said amplitude-modulated difference signal (L?R) into baseband.

Abstract: Receiver comprising a resonance amplifier for selectively amplifying a modulated carrier signal being coupled to signal demodulator for narrow band demodulation. The resonance amplifier comprising a cascade of first and second transconductance amplifiers (TC1, TC2) being included in a loop, outputs thereof being coupled via first and second parallel RC filters (R1C1; R2C2) to inputs of the second and first transconductance amplifiers (TC1, TC2), respectively, the loop also includes a signal inverter (INV) for signal inversion.

Abstract: Controllable oscillator circuit comprising a regenerative loop which incorporates a cascade circuit of first and second sections each having a controllable gain and a phase shift which is 90° at the oscillation frequency, the first and second sections comprising first and second transconductance amplifiers, respectively, outputs of which are coupled to third and fourth transconductance amplifiers, which are positively fed back from the output to the input, and via first and second capacitors to inputs of the second and first gain controlled amplifiers, said first and second capacitors being coupled in parallel to first and second load resistors, respectively, a tuning control current being supplied to control inputs of the first and second transconductance amplifiers, the output of at least one of the first and second transconductance amplifiers being coupled to an amplitude detection arrangement providing a gain control current for an automatic gain control to control inputs of the third and fourth transcond

Abstract: A circuit for measuring absolute spread in capacitors implemented in planary technology. A charge pump supplying a charge current to an internal capacitor (Cint) is used, the voltage across the internal capacitor (Cint) being coupled through a comparator for comparing the voltage with first and second threshold levels. A bistable multivibrator reverses the direction of the charge current, to charge the internal capacitor (Cint) when the voltage decreases below the second threshold level, and to decharge the internal capacitor (Cint) when the voltage increases above the first threshold level. The charge current is determined by a reference voltage that is provided across an external resistor (Rext), the first and second threshold levels defining a voltage range being proportional to the reference voltage. An output signal of the bistable multivibrator is coupled to frequency measuring means to compare the repetition frequency thereof with a reference frequency.