Patents Assigned to Semiconductor Technologies & Instruments
  • Patent number: 9620398
    Abstract: An apparatus for handling or transferring a semiconductor component. The apparatus comprises a first structure and a second structure coupled thereto. The first structure and the second structure define a vacuum chamber therebetween. The second structure comprises at least one module coupled thereto. Each module comprises a passageway defined therethrough. Vacuum is applied through the passageway for facilitating pick up of the semiconductor component at a first position and for securing the semiconductor component to the module during displacement of the module from the first position to a second position. The apparatus comprises a plunger. Displacement of the plunger from a retracted position to an extended position impedes fluid communication between the passageway of the module and the chamber. Displacement of the plunger to the extended position further causes purging of air through the passageway of the module to thereby detach the semiconductor component from the module.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: April 11, 2017
    Assignee: Semiconductor Technologies & Instruments PTE LTD
    Inventors: Jianping Jin, Lee Kwang Heng
  • Publication number: 20150233840
    Abstract: An inspection system for inspecting a semiconductor wafer. The inspection system comprises an illumination setup for supplying broadband illumination. The broadband illumination can be of different contrasts, for example brightfield and darkfield broadband illumination. The inspection system further comprises a first image capture device and a second image capture device, each configured for receiving broadband illumination to capture images of the semiconductor wafer while the semiconductor wafer is in motion. The system comprises a number of tube lenses for enabling collimation of the broadband illumination. The system also comprises a stabilizing mechanism and an objective lens assembly. The system further comprises a thin line illumination emitter and a third image capture device for receiving thin line illumination to thereby capture three-dimensional images of the semiconductor wafer.
    Type: Application
    Filed: September 25, 2013
    Publication date: August 20, 2015
    Applicant: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Ajharali Amanullah, Jing Lin, Kok Weng Wong
  • Patent number: 8885918
    Abstract: A method for inspecting a wafer. The method comprises a training process for creating reference images. The training process comprises capturing a number of images of a first wafer of unknown quality, each of the number of images of the first wafer being captured at a predetermined contrast illumination and each of the number of images of the first wafer comprising a plurality of pixels. The training process also comprises determining a plurality of reference intensities for each of the plurality of pixels of each of the number of images of the first wafer, calculating a plurality of statistical parameters for the plurality of reference intensities of each of the plurality of pixels of each of the number of images of the first wafer, and selecting a plurality of reference images from the plurality of images of the first wafer based on the calculated plurality of statistical parameters.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Ajharali Amanullah, Albert Archwamety, Hongtu Guo
  • Patent number: 8834091
    Abstract: A system and method for transferring component panes from a component pane storage station to a vacuum table assembly are disclosed. The system includes a number of component pane handlers, for instance two handlers, and a pick and place mechanism or arm. The handler transfers the component panes from the station to the mechanism. The system includes an alignment module configured to facilitate spatial alignment of the component pane while the component pane is coupled to the handler. The module can be carried by the mechanism. Spatial alignment of the component pane can be substantially completed before transfer of the component pane from the handler to the mechanism. The mechanism includes a set of vacuum elements or pads that enables pick up of the component pane from the handler as well as release and pick up of the component pane at the vacuum table assembly.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: September 16, 2014
    Assignee: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Jian Ping Jin, Lee Kwang Heng
  • Patent number: 8744617
    Abstract: A component pane handling apparatus configured to handle component panes of multiple different sizes is disclosed. The apparatus includes at least one component pane capture element that can be displaced between a number of different positions, each position corresponding to a particular component pane size. Therefore, the at least one component pane capture element can be positioned to different positions for allowing handling of component panes of corresponding sizes. The apparatus also includes a position alignment mechanism configured to control displacement of the at least one component pane capture element to the different positions. The apparatus can also include one displacement arm coupled to the component pane capture element. The displacement of the component pane capture element can be effectuated by a displacement of at least a portion of the displacement arm. A method for handling component panes of multiple sizes is also included in this disclosure.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: June 3, 2014
    Assignee: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Jian Ping Jin, Lee Kwang Heng
  • Publication number: 20100232915
    Abstract: An apparatus for handling or transferring a semiconductor component. The apparatus comprises a first structure and a second structure coupled thereto. The first structure and the second structure define a vacuum chamber therebetween. The second structure comprises at least one module coupled thereto. Each module comprises a passageway defined therethrough. Vacuum is applied through the passageway for facilitating pick up of the semiconductor component at a first position and for securing the semiconductor component to the module during displacement of the module from the first position to a second position. The apparatus comprises a plunger. Displacement of the plunger from a retracted position to an extended position impedes fluid communication between the passageway of the module and the chamber. Displacement of the plunger to the extended position further causes purging of air through the passageway of the module to thereby detach the semiconductor component from the module.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 16, 2010
    Applicant: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Jianping Jin, Lee Kwang Heng
  • Publication number: 20100188499
    Abstract: A method and a system for inspecting a wafer. The system comprises an optical inspection head, a wafer table, a wafer stack, a XY table and vibration isolators. The optical inspection head comprises a number of illuminators, image capture devices, objective lens and other optical components. The system and method enables capture of brightfield images, darkfield images, 3D profile images and review images. Captured images are converted into image signals and transmitted to a programmable controller for processing. Inspection is performed while the wafer is in motion. Captured images are compared with reference images for detecting defects on the wafer. An exemplary reference creation process for creating reference images and an exemplary image inspection process is also provided by the present invention. The reference image creation process is an automated process.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 29, 2010
    Applicant: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Ajharali Amanullah, Han Cheng Ge
  • Publication number: 20100189339
    Abstract: A method for inspecting a wafer. The method comprises a training process for creating reference images. The training process comprises capturing a number of images of a first wafer of unknown quality, each of the number of images of the first wafer being captured at a predetermined contrast illumination and each of the number of images of the first wafer comprising a plurality of pixels. The training process also comprises determining a plurality of reference intensities for each of the plurality of pixels of each of the number of images of the first wafer, calculating a plurality of statistical parameters for the plurality of reference intensities of each of the plurality of pixels of each of the number of images of the first wafer, and selecting a plurality of reference images from the plurality of images of the first wafer based on the calculated plurality of statistical parameters.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 29, 2010
    Applicant: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Ajharali Amanullah, Albert Archwamety, Hongtu Guo
  • Publication number: 20100188486
    Abstract: An inspection system for inspecting a semiconductor wafer. The inspection system comprises an illumination setup for supplying broadband illumination. The broadband illumination can be of different contrasts, for example brightfield and darkfield broadband illumination. The inspection system further comprises a first image capture device and a second image capture device, each configured for receiving broadband illumination to capture images of the semiconductor wafer while the semiconductor wafer is in motion. The system comprises a number of tube lenses for enabling collimation of the broadband illumination. The system also comprises a stabilizing mechanism and an objective lens assembly. The system further comprises a thin line illumination emitter and a third image capture device for receiving thin line illumination to thereby capture three-dimensional images of the semiconductor wafer.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 29, 2010
    Applicant: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Ajharali Amanullah, Lin Jing, Han Cheng Ge, Kok Weng Wong
  • Patent number: 6765666
    Abstract: A system for inspecting a component, such as a die formed on a silicon wafer, is provided. The system includes a two dimensional inspection system that can locate one or more features, such as bump contacts on the die, and which can also generate feature coordinate data. The system also includes a three dimensional inspection system that is connected to the two dimensional inspection system, such as through an operating system of a processor. The three dimensional inspection system receives the feature coordinate data and generates inspection control data.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: July 20, 2004
    Assignee: Semiconductor Technologies & Instruments, Inc.
    Inventors: Clyde Maxwell Guest, Younes Chtioui, Rajiv Roy, Charles K. Harris, Weerakiat Wahawisan, Thomas C. Carrington
  • Patent number: 6744913
    Abstract: A system for locating features in image data is provided. The system includes a first component system. The first component system compares first component data, which can be pixel data of a first user-selected component of the feature, to first test image data, which can be selected by scanning image data of a device, such as a die cut from a silicon wafer. The system also includes second component system that is connected to the first component system, such as through data memory locations of a processor. The second component system compares second component data to second test image data if the first component system finds a match between the first component data and the first test image data. The second test image data is selected based upon the first test image data, such as by using a known coordinate relationship between pixels of the first component data and the second component data.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: June 1, 2004
    Assignee: Semiconductor Technology & Instruments, Inc.
    Inventors: Clyde Maxwell Guest, John Mark Thornell
  • Patent number: 6654658
    Abstract: A system for conditioning a plurality of semiconductor leads of a semiconductor device is provided. The system includes an array of comb blades, where each comb blade terminates at a notch that allows the semiconductor leads to be moved laterally through the notch. A controller connected to the comb blades, such as through an intervening motor and comb blade support, causes the comb blades to move relative to the semiconductor device, such as by holding the semiconductor device stationary, so as to perform lateral and vertical conditioning of the semiconductor leads.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: November 25, 2003
    Assignee: Semiconductor Technologies & Instruments, PTE, Ltd.
    Inventors: Paul Harris Hasten, Lew Wai Hong
  • Patent number: 6532063
    Abstract: A semiconductor lead inspection device includes a camera and an illumination source for backlighting the leads of the semiconductor device to form an image in the camera. The camera and the illumination device are arranged on optical paths which alternatively pass through or are reflected by a beamsplitter. A surface is illuminated to backlight the leads and a light deflecting device is arranged for deflecting the backlit image of the semiconductor leads to form an image in the camera.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: March 11, 2003
    Assignee: Semiconductor Technologies & Instruments
    Inventors: Seow Hoon Tan, Sreenivas Rao
  • Patent number: 6459807
    Abstract: A system for processing image data, such as an image of a die cut from a silicon wafer, is provided. The system includes an irregular edge detection system, which can locate edge data of a feature of the image data, such as the edge of a probe mark in a bond pad. A feature area calculation system is connected to the irregular edge detection system, such as by accessing data stored by the irregular edge detection system. The feature area calculation system can receive the edge data of the feature and determining the area of the feature, such as by summing normalized pixel area values. The irregular edge detection system uses interpolation to locate edges that occur between the centerpoints of adjacent pixels.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: October 1, 2002
    Assignee: Semiconductor Technologies & Instruments, Inc.
    Inventors: Clyde Maxwell Guest, Chu-Yin Chang
  • Patent number: 6445518
    Abstract: A semiconductor device lead inspection apparatus and method are provided for capturing images of the semiconductor edges and leads along two optical axes which have different directions in a plane perpendicular to the semiconductor device edge. A first image is reflected off an optical surface of a prism to a direction corresponding to the camera optical axis. A second image is reflected by two optical surfaces of the prism to a direction corresponding to the camera optical axis.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: September 3, 2002
    Assignee: Semiconductor Technologies & Instruments, Inc.
    Inventor: Pao Meng Lee
  • Patent number: 6396578
    Abstract: A system for inspection components that are sealed within tape is provided. The system includes a light source that can illuminate the components through a tape layer. A polarizer is used to polarize light from the light source, the components, and the tape layer, so as to reduce glare and reflected light. An image system receives light from the polarizer and stores image data for each component.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: May 28, 2002
    Assignee: Semiconductor Technologies & Instruments, Inc.
    Inventor: Tay Bok Her
  • Patent number: 6259522
    Abstract: A system for inspection components that are sealed within tape is provided. The system includes a light source that can illuminate the components through a tape layer. A polarizer is used to polarize light from the light source, the components, and the tape layer, so as to reduce glare and reflected light. An image system receives light from the polarizer and stores image data for each component.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: July 10, 2001
    Assignee: Semiconductor Technologies & Instruments, Inc.
    Inventor: Tay Bok Her
  • Patent number: 6252981
    Abstract: A system for selecting reference die images, such as for use with a visual die inspection system, is provided. The system includes a die image comparator, which compares a first die image to a second die image in order to create a difference image that contains only the differences between the two die images. The system also includes a difference image analysis system that receives data from the die image comparator. The difference image analysis system analyzes the difference image and determines whether there are any features of the difference image that indicate that either the first die image or the second die image should not be used as a reference die image.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: June 26, 2001
    Assignee: Semiconductor Technologies & Instruments, Inc.
    Inventors: Clyde Maxwell Guest, Rajiv Roy, Charles Kenneth Harris
  • Patent number: 6207946
    Abstract: A variable intensity lighting system for use with a machine vision apparatus for capturing high contrast images of articles to be inspected, such as semiconductor packages, includes an LED or optical fiber element and flash lamp array configured in multiple segments which are operable to be controlled as to light output intensity by a programmable intensity control circuit operably connected to a microprocessor. The intensity control circuit includes multiple digital potentiometers operable to control selected segments of the lighting array. The control circuit is adapted to control up to 64 segments of the lighting array individually at 64 incremental intensity levels, respectively. The control circuit may include a light failure module to detect a segment failure or a reversed connection.
    Type: Grant
    Filed: July 26, 1999
    Date of Patent: March 27, 2001
    Assignee: Semiconductor Technologies & Instruments, Inc.
    Inventors: Noor Ashedah Binti Jusoh, Tan Seow Hoon, Sreenivas Rao
  • Patent number: 6178861
    Abstract: Apparatus for cutting single or multiple semiconductor packages from a multilayer substrate wherein the semiconductor packages are partially encapsulated by an elastomer sealant layer disposed on a polymer film layer of the substrate. The apparatus includes upper and lower die assemblies mounted for movement relative to each other on a support base. The upper die assembly includes an actuator and a die block supporting plural sets of cutter blades arranged in patterns to cut rectangular shaped semiconductor packages out of the substrate in a single cutting operation at a single station. The lower die assembly includes plural punch members movable relative to a die block, which includes a support surface for supporting the substrate in a predetermined position as determined by spaced apart locator pins on the lower die assembly registerable with corresponding locator holes in a carrier frame for the substrate.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: January 30, 2001
    Assignee: Semiconductor Technologies & Instruments, Inc.
    Inventor: Tan Huek Choy