Patents Assigned to Semigear, Inc.
  • Publication number: 20150034699
    Abstract: Provided are a semiconductor substrate manufacturing apparatus and a substrate treating method, and more particularly, an apparatus and method for performing a reflow treating process on a semiconductor wafer. The apparatus treating apparatus includes a load port on which a carrier accommodating a substrate is seated, a substrate treating module including one reflow treating unit or a plurality of reflow treating units for performing a reflow process on the substrate, and a substrate transfer module disposed between the load port and the substrate treating module. The substrate transfer module includes a transfer robot transferring the substrate among the load port, the substrate treating module, and a cleaning unit.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 5, 2015
    Applicant: Semigear Inc
    Inventor: Jian Zhang
  • Publication number: 20150034700
    Abstract: Provided are a semiconductor substrate manufacturing apparatus and a substrate treating method, and more particularly, an apparatus and method for performing a reflow treating process on a semiconductor wafer. The apparatus treating apparatus includes a load port on which a carrier accommodating a substrate is seated, a substrate treating module including one reflow treating unit or a plurality of reflow treating units for performing a reflow process on the substrate, and a substrate transfer module including a transfer robot transferring the substrate between the load port and the substrate treating module, the substrate transfer module being disposed between the load port and the substrate treating module. The reflow treating unit includes a process chamber having a treating space therein and an exhaust member exhausting a fluid within the process chamber.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 5, 2015
    Applicant: Semigear Inc
    Inventor: Jian Zhang
  • Publication number: 20150034702
    Abstract: Provided are a semiconductor substrate manufacturing apparatus and a substrate treating method, and more particularly, an apparatus and method for performing a reflow treating process on a semiconductor wafer. The apparatus treating apparatus includes a load port on which a carrier accommodating a substrate is seated, a substrate treating module including one process chamber or a plurality of process chambers having a treating space in which a reflow process with respect to the substrate is performed, a cleaning unit cleaning the substrate, and a substrate transfer module disposed between the load port and the substrate treating module. The substrate transfer module includes a transfer robot transferring the substrate among the load port, the substrate treating module, and the cleaning unit.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 5, 2015
    Applicant: Semigear Inc
    Inventor: Jian Zhang
  • Patent number: 8524593
    Abstract: An apparatus and a process for the manufacture of a solder-bump adhered wafer substrate for use in the semiconductor industry, comprising one or more of the following steps including: arranging a first compressive member and a second compressive member in an opposed, compressibly displaceable, spaced-apart relationship, with a pattern plate disposed therebetween with the pattern plate having a plurality of aligned through-holes arranged thereon; filling the through-holes with a molten solder; compressing the solder and the pattern plate between the first and second opposed compressive members to compact the solder therein and cleans the pattern plate of excess solder; chilling the pattern plate to solidify the molten solder in the through-holes; and removing the pattern plate from the spaced-apart compressive members to produce a wafer with solder bumps thereon.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: September 3, 2013
    Assignee: Semigear Inc
    Inventors: Chunghsin Lee, Jian Zhang
  • Patent number: 8274161
    Abstract: A linear, serial chip/substrate assembly processing machine for stepwise advancing a pre-assembled chip/die substrate on a support plate through a series of sealable chambers beginning at a loading station and ending up at an unloading station after various melting and vacuuming of chip/substrate components has been stepwise indexed through those various chambers to the final joining thereof.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: September 25, 2012
    Assignee: SemiGear Inc
    Inventors: Jian Zhang, Chunghsin Lee
  • Patent number: 8252678
    Abstract: A serial thermal processing arrangement for treating a pre-assembled chip/wafer assembly of semiconductor material in a rotary processor, through a series of intermittent, rotatively advanced, movements into independent, temperature and pressure controlled, circumferentially disposed chambers.
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: August 28, 2012
    Assignee: SemiGear, Inc
    Inventor: Jian Zhang
  • Publication number: 20110198388
    Abstract: A serial thermal processing arrangement for treating a pre-assembled chip/wafer assembly of semiconductor material in a rotary processor, through a series of intermittent, rotatively advanced, movements into independent, temperature and pressure controlled, circumferentially disposed chambers,
    Type: Application
    Filed: December 31, 2010
    Publication date: August 18, 2011
    Applicant: Semigear Inc
    Inventor: Jian Zhang
  • Patent number: 7982320
    Abstract: An apparatus and a process for the manufacture of a solder-bump adhered wafer substrate for use in the semiconductor industry, comprising one or more of the following steps including: arranging a first compressive member and a second compressive member in an opposed, compressibly displaceable, spaced-apart relationship, with a pattern plate disposed therebetween with the pattern plate having a plurality of aligned through-holes arranged thereon; filling the through-holes with a molten solder; compressing the solder and the pattern plate between the first and second opposed compressive members to compact the solder therein and cleans the pattern plate of excess solder; chilling the pattern plate to solidify the molten solder in the through-holes; and removing the pattern plate from the spaced-apart compressive members to produce a wafer with solder bumps thereon.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: July 19, 2011
    Assignee: Semigear Inc.
    Inventors: Chunghsin Lee, Jian Zhang
  • Patent number: 7632750
    Abstract: An apparatus and a process for the manufacture of a solder-bump adhered wafer substrate for use in the semiconductor industry, comprising one or more of the following steps including: arranging a first compressive member and a second compressive member in an opposed, compressibly displaceable, spaced-apart relationship, with a pattern plate disposed therebetween with the pattern plate having a plurality of aligned through-holes arranged thereon; filling the through-holes with a molten solder; compressing the solder and the pattern plate between the first and second opposed compressive members to compact the solder therein and cleans the pattern plate of excess solder; chilling the pattern plate to solidify the molten solder in the through-holes; and removing the pattern plate from the spaced-apart compressive members to produce a wafer with solder bumps thereon.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: December 15, 2009
    Assignee: Semigear Inc
    Inventors: Chunghsin Lee, Jian Zhang
  • Patent number: 7008879
    Abstract: An apparatus for the treatment of semiconductor wafers, comprising a supportive frame and a process table arranged on the supportive frame. The process table comprises a stationary upper platen and a stationary lower plate. An intermediate indexing plate is rotatively arranged between the upper platen and the lower plate. At least one wafer support pin is attached to the indexing plate for the support of a wafer by the indexing plate. An upper housing is arranged on the upper platen and an outer lower housing is arranged on the lower plate. A displacable lower isolation chamber is disposed within the outer lower housing, being displacable against the indexing plate to define a treatment module between the upper housing and the lower isolation chamber in which the wafer is treated. A wafer supporting treatment plate is arranged within the lower isolation chamber, for controlled rapid treatment of a wafer within the treatment module.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: March 7, 2006
    Assignee: Semigear, Inc.
    Inventors: Chunghsin Lee, Jian Zhang, Darren M Simonelli, Keith D. Mullins, David A. Wassen
  • Patent number: 6827789
    Abstract: An apparatus for the treatment of semiconductor wafers, comprising a supportive frame and a process table arranged on the supportive frame. The process table comprises a stationary upper platen and a stationary lower plate. An intermediate indexing plate is rotatively arranged between the upper platen and the lower plate. At least one wafer support pin is attached to the indexing plate for the support of a wafer by the indexing plate. An upper housing is arranged on the upper platen and an outer lower housing is arranged on the lower plate. A displacable lower isolation chamber is disposed within the outer lower housing, being displacable against the indexing plate to define a treatment module between the upper housing and the lower isolation chamber in which the wafer is treated. A wafer supporting treatment plate is arranged within the lower isolation chamber, for controlled rapid treatment of a wafer within the treatment module.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: December 7, 2004
    Assignee: Semigear, Inc.
    Inventors: Chunghsin Lee, Jian Zhang, Darren M Simonelli, Keith D. Mullius, David A. Wassen