Patents Assigned to Semigear, Inc.
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Publication number: 20150034699Abstract: Provided are a semiconductor substrate manufacturing apparatus and a substrate treating method, and more particularly, an apparatus and method for performing a reflow treating process on a semiconductor wafer. The apparatus treating apparatus includes a load port on which a carrier accommodating a substrate is seated, a substrate treating module including one reflow treating unit or a plurality of reflow treating units for performing a reflow process on the substrate, and a substrate transfer module disposed between the load port and the substrate treating module. The substrate transfer module includes a transfer robot transferring the substrate among the load port, the substrate treating module, and a cleaning unit.Type: ApplicationFiled: August 1, 2013Publication date: February 5, 2015Applicant: Semigear IncInventor: Jian Zhang
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Publication number: 20150034700Abstract: Provided are a semiconductor substrate manufacturing apparatus and a substrate treating method, and more particularly, an apparatus and method for performing a reflow treating process on a semiconductor wafer. The apparatus treating apparatus includes a load port on which a carrier accommodating a substrate is seated, a substrate treating module including one reflow treating unit or a plurality of reflow treating units for performing a reflow process on the substrate, and a substrate transfer module including a transfer robot transferring the substrate between the load port and the substrate treating module, the substrate transfer module being disposed between the load port and the substrate treating module. The reflow treating unit includes a process chamber having a treating space therein and an exhaust member exhausting a fluid within the process chamber.Type: ApplicationFiled: August 1, 2013Publication date: February 5, 2015Applicant: Semigear IncInventor: Jian Zhang
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Publication number: 20150034702Abstract: Provided are a semiconductor substrate manufacturing apparatus and a substrate treating method, and more particularly, an apparatus and method for performing a reflow treating process on a semiconductor wafer. The apparatus treating apparatus includes a load port on which a carrier accommodating a substrate is seated, a substrate treating module including one process chamber or a plurality of process chambers having a treating space in which a reflow process with respect to the substrate is performed, a cleaning unit cleaning the substrate, and a substrate transfer module disposed between the load port and the substrate treating module. The substrate transfer module includes a transfer robot transferring the substrate among the load port, the substrate treating module, and the cleaning unit.Type: ApplicationFiled: August 1, 2013Publication date: February 5, 2015Applicant: Semigear IncInventor: Jian Zhang
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Patent number: 8524593Abstract: An apparatus and a process for the manufacture of a solder-bump adhered wafer substrate for use in the semiconductor industry, comprising one or more of the following steps including: arranging a first compressive member and a second compressive member in an opposed, compressibly displaceable, spaced-apart relationship, with a pattern plate disposed therebetween with the pattern plate having a plurality of aligned through-holes arranged thereon; filling the through-holes with a molten solder; compressing the solder and the pattern plate between the first and second opposed compressive members to compact the solder therein and cleans the pattern plate of excess solder; chilling the pattern plate to solidify the molten solder in the through-holes; and removing the pattern plate from the spaced-apart compressive members to produce a wafer with solder bumps thereon.Type: GrantFiled: July 19, 2011Date of Patent: September 3, 2013Assignee: Semigear IncInventors: Chunghsin Lee, Jian Zhang
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Patent number: 8274161Abstract: A linear, serial chip/substrate assembly processing machine for stepwise advancing a pre-assembled chip/die substrate on a support plate through a series of sealable chambers beginning at a loading station and ending up at an unloading station after various melting and vacuuming of chip/substrate components has been stepwise indexed through those various chambers to the final joining thereof.Type: GrantFiled: January 7, 2011Date of Patent: September 25, 2012Assignee: SemiGear IncInventors: Jian Zhang, Chunghsin Lee
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Patent number: 8252678Abstract: A serial thermal processing arrangement for treating a pre-assembled chip/wafer assembly of semiconductor material in a rotary processor, through a series of intermittent, rotatively advanced, movements into independent, temperature and pressure controlled, circumferentially disposed chambers.Type: GrantFiled: December 31, 2010Date of Patent: August 28, 2012Assignee: SemiGear, IncInventor: Jian Zhang
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Publication number: 20110198388Abstract: A serial thermal processing arrangement for treating a pre-assembled chip/wafer assembly of semiconductor material in a rotary processor, through a series of intermittent, rotatively advanced, movements into independent, temperature and pressure controlled, circumferentially disposed chambers,Type: ApplicationFiled: December 31, 2010Publication date: August 18, 2011Applicant: Semigear IncInventor: Jian Zhang
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Patent number: 7982320Abstract: An apparatus and a process for the manufacture of a solder-bump adhered wafer substrate for use in the semiconductor industry, comprising one or more of the following steps including: arranging a first compressive member and a second compressive member in an opposed, compressibly displaceable, spaced-apart relationship, with a pattern plate disposed therebetween with the pattern plate having a plurality of aligned through-holes arranged thereon; filling the through-holes with a molten solder; compressing the solder and the pattern plate between the first and second opposed compressive members to compact the solder therein and cleans the pattern plate of excess solder; chilling the pattern plate to solidify the molten solder in the through-holes; and removing the pattern plate from the spaced-apart compressive members to produce a wafer with solder bumps thereon.Type: GrantFiled: December 14, 2009Date of Patent: July 19, 2011Assignee: Semigear Inc.Inventors: Chunghsin Lee, Jian Zhang
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Patent number: 7632750Abstract: An apparatus and a process for the manufacture of a solder-bump adhered wafer substrate for use in the semiconductor industry, comprising one or more of the following steps including: arranging a first compressive member and a second compressive member in an opposed, compressibly displaceable, spaced-apart relationship, with a pattern plate disposed therebetween with the pattern plate having a plurality of aligned through-holes arranged thereon; filling the through-holes with a molten solder; compressing the solder and the pattern plate between the first and second opposed compressive members to compact the solder therein and cleans the pattern plate of excess solder; chilling the pattern plate to solidify the molten solder in the through-holes; and removing the pattern plate from the spaced-apart compressive members to produce a wafer with solder bumps thereon.Type: GrantFiled: July 7, 2006Date of Patent: December 15, 2009Assignee: Semigear IncInventors: Chunghsin Lee, Jian Zhang
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Patent number: 7008879Abstract: An apparatus for the treatment of semiconductor wafers, comprising a supportive frame and a process table arranged on the supportive frame. The process table comprises a stationary upper platen and a stationary lower plate. An intermediate indexing plate is rotatively arranged between the upper platen and the lower plate. At least one wafer support pin is attached to the indexing plate for the support of a wafer by the indexing plate. An upper housing is arranged on the upper platen and an outer lower housing is arranged on the lower plate. A displacable lower isolation chamber is disposed within the outer lower housing, being displacable against the indexing plate to define a treatment module between the upper housing and the lower isolation chamber in which the wafer is treated. A wafer supporting treatment plate is arranged within the lower isolation chamber, for controlled rapid treatment of a wafer within the treatment module.Type: GrantFiled: April 27, 2004Date of Patent: March 7, 2006Assignee: Semigear, Inc.Inventors: Chunghsin Lee, Jian Zhang, Darren M Simonelli, Keith D. Mullins, David A. Wassen
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Patent number: 6827789Abstract: An apparatus for the treatment of semiconductor wafers, comprising a supportive frame and a process table arranged on the supportive frame. The process table comprises a stationary upper platen and a stationary lower plate. An intermediate indexing plate is rotatively arranged between the upper platen and the lower plate. At least one wafer support pin is attached to the indexing plate for the support of a wafer by the indexing plate. An upper housing is arranged on the upper platen and an outer lower housing is arranged on the lower plate. A displacable lower isolation chamber is disposed within the outer lower housing, being displacable against the indexing plate to define a treatment module between the upper housing and the lower isolation chamber in which the wafer is treated. A wafer supporting treatment plate is arranged within the lower isolation chamber, for controlled rapid treatment of a wafer within the treatment module.Type: GrantFiled: July 1, 2002Date of Patent: December 7, 2004Assignee: Semigear, Inc.Inventors: Chunghsin Lee, Jian Zhang, Darren M Simonelli, Keith D. Mullius, David A. Wassen