Abstract: An integrated circuit device, and a method of manufacturing the same, comprises an epitaxial nickel silicide on (100) Si, or a stable nickel silicide on amorphous Si, fabricated with a cobalt interlayer. In one embodiment the method comprises depositing a cobalt (Co) interface layer between the Ni and Si layers prior to the silicidation reaction. The cobalt interlayer regulates the flux of the Ni atoms through the cobalt/nickel/silicon alloy layer formed from the reaction of the cobalt interlayer with the nickel and the silicon so that the Ni atoms reach the Si interface at a similar rate, i.e., without any orientation preference, so as to form a uniform layer of nickel silicide. The nickel silicide may be annealed to form a uniform crystalline nickel disilicide. Accordingly, a single crystal nickel silicide on (100) Si or on amorphous Si is achieved wherein the nickel silicide has improved stability and may be utilized in ultra-shallow junction devices.

Abstract: The liquid crystal display device is composed of at least one optical retardation compensator plate 2 (and 3) inserted between a liquid crystal display element 1 and polarizer plates 4 and 5. The liquid crystal display element 1 is composed of a pair of electrode substrates 6 and 7 and a liquid crystal layer 8 sealed therebetween. The polarizer plates 4 and 5 flank the liquid crystal display element 1. The optical retardation compensator plate 2 (and 3) has a negative refractive index anisotropy (na=Nc>nb). The direction of a principal refractive index nb parallel to the normal to the surface and the direction of either a principal refractive index na or nc in the surface incline either clockwise or counterclockwise around the direction of the principal refractive index nc or na in the surface.

Abstract: A semiconductor device for display control includes an input section for receiving a display information including a character code, a display position information and a character size information, a first address generating section for generating a first address group corresponding to the received character code by applying a predetermined conversion rule to the received character code and character size information, a font data storing section for outputting the font data stored in the region specified by the first address group when the first address group is given, a second address generating section for generating a second address group by utilizing the received display position information, the second address group representing a region where the font data is to be expanded, a font data expanding section for expanding and temporarily storing the font data in the region represented by the second address group, and an output section for outputting the font data to an external display driving unit.

Abstract: A magneto-optical recording medium includes at least: a reproducing magnetic layer composed at least of Gd and Co showing an in-plane magnetization state at room temperature and a transition to a perpendicular magnetization state at temperatures of not lower than a critical temperature; and a recording magnetic layer formed of a perpendicular magnetization film, the reproducing magnetic layer and the recording magnetic layer being magneto-statically coupled at least in the vicinity of the critical temperature, the reproducing magnetic layer containing at least either Tb or Dy so as to increase the total magnetization at a temperature at which a perpendicular magnetic anisotropy constant and a diamagnetic field energy are equal to each other.

Abstract: A lithium secondary battery includes a positive electrode containing a first solid electrolyte; a negative electrode containing a second solid electrolyte; and a layer of a third solid electrolyte between the positive and negative electrodes.

Abstract: A polycrystalline memory structure is described for improving reliability and yield of devices employing polycrystalline memory materials comprising a polycrystalline memory layer, which has crystal grain boundaries forming gaps between adjacent crystallites overlying a substrate. An insulating material is located at least partially within the gaps to at least partially block the entrance to the gaps. A method of forming a polycrystalline memory structure is also described. A layer of material is deposited and annealed to form a polycrystalline memory material having gaps between adjacent crystallites. An insulating material is deposited over the polycrystalline memory material to at least partially fill the gaps, thereby blocking a portion of each gap.

Abstract: A method of forming a MOS transistor without a lightly doped drain (LDD) region between the channel region and drain is provided. The channel region and a drain extension are formed from two separate tilted ion implantation processes, after the deposition of the gate electrode. The tilted implantation forms a relatively short channel length, with respect to the length of the gate electrode. The position of the channel is offset, and directly adjoins the source. A second tilted implant process forms a drain extension region under the gate electrode, adjacent the drain. Elimination of LDD areas reduces the number of masking and doping steps required to manufacture a transistor. Further, the drain extension area promotes transistor performance, by eliminating source resistance. At the same time, sufficient doping of the drain extension area insures that the drain resistance through the drain extension remains low.

Abstract: A liquid crystal display device of the present invention includes: a main substrate having a main electrode; a counter substrate having a counter electrode; a liquid crystal material interposed between the main substrate and the counter substrate; and a control section for controlling a response start time of the liquid crystal material by a potential difference between a main electrode voltage that is applied to the main electrode during one frame and a counter electrode voltage that changes in a substantially continuous manner during the one frame, and for changing a transmissivity of the liquid crystal display device based on a magnitude of the main electrode voltage.

Abstract: A testing device tests a LCD driver LSI which incorporates a multiple number of D/A converters and outputs voltages from the D/A converters via associated output terminals. A voltage meter measures a multiple levels of tonal voltages output from the first output terminal and calculates the differential voltage value between each measured voltage and the associated expected voltage. Each differential amplifier has an input for receiving the output voltage output from the first output terminal in common and another input for receiving the output voltage output from one output terminal other than the first output terminal. A comparator receives the amplified differential voltages output from the plural differential amplifiers and checks whether the amplified differential voltages from the differential amplifiers fall within given voltage ranges, receptively.

Abstract: There is provided a semiconductor laser device implementing a single transverse mode oscillation in an oscillation wavelength of 780 nm band and also having high reliability and long life in high-output driving state, and an optical disk recording and reproducing apparatus with use of the semiconductor laser device. A multiple quantum well active layer 105 is composed of InGaAsP, and a first cladding layer 103, a second cladding layer 107, a third cladding layer 109, and a first current blocking layer 112 are structured from III-V group compound semiconductor containing only As as V group element. Inside the first current blocking layer 112, a hollow portion 130 is provided in the vicinity of and approximately parallel to the ridge stripe-shaped third cladding layer 109.

Abstract: A semiconductor light-emitting device exhibits high reflectance even with less number of pairs of light-reflecting layers, and allows light emitted from the active layer to be effectively extracted outside. This semiconductor light-emitting device is fabricated at good mass productivity by a semiconductor light-emitting device manufacturing method including the step of providing an active layer which generates light having a specified wavelength on a semiconductor substrate. On the semiconductor substrate, are stacked an AlxGa1−xAs layer and the active layer, in this order. Part of the AlxGa1−xAs layer with respect to the is changed into an AlOy layer (where y is a positive real number).

Abstract: A circuit synthesis method includes the steps of converting a behavioral description describing a behavior of calculation processing into a control data flowgraph; assigning a plurality of calculations, at least one input and at least one output in the control data flowgraph into a plurality of prescribed time slots; assigning the plurality of calculations, a plurality of data dependency edges, the at least one input and the at least one output respectively to a plurality of calculation devices, at least one register, at least one input pin and at least one output pin; generating a plurality of paths corresponding to the plurality of data dependency edges; detecting a feedback loop formed of at least two of the plurality of paths and at least one of the plurality of calculation devices; and re-assigning one calculation, which has been assigned to a first calculation device included in the feedback loop, to a second calculation device among the plurality of calculation devices, so as to delete the feedback loo

Abstract: A ferroelectric transistor gate structure with a ferroelectric gate and passivation sidewalls is provided. The passivation sidewalls serve as an insulator to reduce, or eliminate, the diffusion of oxygen or hydrogen into the ferroelectric gate. A method of forming the ferroelectric gate structure is also provided. The method comprises the steps of forming a sacrificial gate structure, removing the sacrificial gate structure, depositing passivation insulator material, etching the passivation insulator material using anisotropic plasma etching to form passivation sidewalls, depositing a ferroelectric material, polishing the ferroelectric material using CMP, and forming a top electrode overlying the ferroelectric material.

Abstract: A backup memory has a plural number of pages (e.g., page 0, page 1 . . . ) including machine-status data. Each page stores machine-status data such as the number of prints, machine usage information data, machine condition data, accounting information data, etc. The machine-status data has a HEAD portion and a DATA portion including DATA0, DATA1 and DATA2. The HEAD portion designates the latest written position of the above three pieces of DATA portion. For example, if data is last written into DATA2 in the DATA portion, the HEAD portion should take a value of 3. The DATA portions are interrelated to each other.

Abstract: In an optical recording medium in which marks are allowed to be written at grooves and information has been recorded beforehand in the form of prepits, the depth of the grooves, Dg, and the depth of the prepits, Dp, satisfy the following relationships, respectively: Dg<&lgr;/8n, and &lgr;/8n<Dp<&lgr;/4n where &lgr; is a wavelength of light to be used for recording/reproducing of information signals, and n is an index of refraction of the substrate of the optical recording medium.

Abstract: The present invention is intended to arrange data, thereby improving usability and operability. When data desired to be stored is designated on an application being processed, a data capture control portion captures the data, and a data type judgment portion judges the type of the captured data. In accordance with the result of the judgment, the data is stored on an image clipboard or a text clipboard depending on the type of the data. Desired data is selected from among the stored data. A data paste control portion pastes the selected data on another activated application desired to be linked.

Abstract: Resistive cross point memory devices are provided, along with methods of manufacture and use. The memory device comprises an active layer of perovskite material interposed between upper electrodes and lower electrodes. A bit region located within the active layer at the cross point of an upper electrode and a lower electrode has a resistivity that can change through a range of values in response to application of one, or more, voltage pulses. Voltage pulses may be used to increase the resistivity of the bit region, decrease the resistivity of the bit region, or determine the resistivity of the bit region. Memory circuits are provided to aid in the programming and read out of the bit region.

Abstract: A line-direction deciding device that can decide the direction of lines in an image having a complicated layout of characters as well as line directions other than vertical and horizontal line directions. The present invention provides a line-direction deciding device that extracts character elements (image components) from an image, examines in which direction the character elements are most densely distributed and decides by majority the direction of lines of characters within a processable area as well as an image inclination correcting device that corrects an image for inclination according to a processing result made by the line-direction deciding device provided with image-inclination detecting means.

Abstract: A planar illumination device has a light source that shines light into a light guide plate through one side face (i) thereof and a reflector member laid on the back face of the light guide plate opposite to the light emission face thereof. In the vicinity of another side face (ii) of the light guide plate opposite to the side face (i) thereof through which the light is shone into the light guide plate, a slit is formed so as to extend along that side face (ii). A portion of the reflector member is, by being bent into an L shape, formed into an insertion portion, and this insertion portion is inserted into the slit.

Abstract: An information processing apparatus for managing data of a plurality of modes such as schedule and address book, includes a RAM which has a data contents area for storing the contents of data, and a data address area for storing addresses where the respective data are stored in the data contents area while grouping the addresses according to mode.