Patents Assigned to Sharp
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Publication number: 20150243239Abstract: A display device is provided that effectively reduces noise generated inside a display panel such as a liquid crystal panel. The source driving unit of the display device includes positive amplifiers, negative amplifiers, a positive amplifier regulating unit and a negative amplifier regulating unit. The positive amplifiers transmit positive driving signals to the display panel unit via source lines. The negative amplifiers transmit negative driving signals to the display panel via source lines. The positive amplifier regulating unit regulates the timing for the positive amplifiers to output positive driving signals. The negative amplifier regulating unit regulates the timing for the negative amplifiers to output negative driving signals.Type: ApplicationFiled: September 13, 2013Publication date: August 27, 2015Applicant: Sharp Kabushiki KaishaInventors: Kentaroh Uemura, Masaaki Nishio
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Publication number: 20150241604Abstract: An example embodiment of the present invention provides an anti-reflection film capable of providing low reflectability and designability, a method of producing the film, and a display device. Another example embodiment of the present invention relates to an anti-reflection film including a substrate and a resin layer on the substrate, the resin layer containing a plurality of cavities, the resin layer and the substrate having different refractive indexes from each other, the resin coat including a base portion and a plurality of protrusions on the base portion, the plurality of protrusions being integrally formed with the base portion, the base portion having a thickness that varies at least in one direction in a region.Type: ApplicationFiled: September 13, 2013Publication date: August 27, 2015Applicant: SHARP KABUSHIKI KAISHAInventors: Chiaki Minari, Kiyoshi Minoura
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Publication number: 20150242026Abstract: A touch key of an operation console includes a circuit board (310) having a light source (312, 314), a light transmitting portion (322) transmitting light, a non-transparent light shielding portion (324) and a semi-transparent operation panel (300) covering upper surfaces of the light transmitting portion and the light shielding portion. The light transmitting portion accommodates the light source. The surfaces of light transmitting portion and light shielding portion in contact with each other are tightly sealed, and the circuit board (310) and the light shielding portion (324) cover the light transmitting portion (322) such that the light is emitted only from the surface in contact with the operation panel (300). Thus, leakage of light from around a figure indicating a touch key can be prevented, and the operation console comes to have a high-class look.Type: ApplicationFiled: October 15, 2013Publication date: August 27, 2015Applicant: Sharp Kabushiki KaishaInventors: Yasushi Nakamura, Hidenobu Mandai, Kazuhiro Matsuyama, Hiroyuki Nagao, Kazuhisa Yoneda
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Publication number: 20150242999Abstract: An image filter (100) for calculating a pixel value of target pixel in an output image from a pixel value of each of a pixel or pixels belonging to a filter area in an input image by using a filter coefficient vector V, is configured to include a filter coefficient vector changing section (120) for changing the filter coefficient vector V according to at least either where the target area is in the input image, or where the target pixel is in the output image.Type: ApplicationFiled: April 27, 2015Publication date: August 27, 2015Applicant: SHARP KABUSHIKI KAISHAInventors: Tomohiro IKAI, Yukinobu YASUGI, Tomoko AONO
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Publication number: 20150244189Abstract: A balancer circuit connected to a battery pack having a plurality of secondary cells connected in series, and comprising: a capacitance element; and a switching unit that switches the connection state for both ends of the capacitance element between a state in which same are connected to both ends of one of the secondary cells and a state in which same are connected to both ends of another secondary cell. The balancer circuit corrects the balance between the voltages for the plurality of secondary cells by executing a switching operation that repeats said switching, and comprises a detection unit that detects said state of balance by detecting the size of the overshoot component in a voltage waveform at sites connected to the capacitance element.Type: ApplicationFiled: September 10, 2013Publication date: August 27, 2015Applicant: SHARP KABUSHIKI KAISHAInventor: Kensuke Baba
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Publication number: 20150241909Abstract: Provided is a touch panel provided with an active area where touch input is performed, including: a tempered glass substrate having a compressive stress layer on surfaces thereof; and transparent electrodes made of an inorganic oxide film formed on the active area of the tempered glass substrate. A foundation layer made of an organic film is disposed between the transparent electrodes and the compressive stress layer, which prevents the transparent electrodes and the compressive stress layer thereunder from contacting each other.Type: ApplicationFiled: October 10, 2013Publication date: August 27, 2015Applicant: SHARP KABUSHIKI KAISHAInventors: Hiroki Makino, Mikihiro Noma
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Publication number: 20150243668Abstract: The present invention provides a non-volatile memory device using a memory transistor including an oxide semiconductor, capable of writing with low power consumption, without receiving an influence of deterioration of a selection transistor connected in series to the memory transistor. A memory cell 1 includes a memory transistor Qm, and first and second selection transistors Q1 and Q2. During a writing operation, the memory transistor Qm and the first selection transistor Q1 are set to the ON state, and the second selection transistor Q2 is set to the OFF state. A writing current is flown to a series circuit of the memory transistor Qm and the first selection transistor Q1. The memory transistor Qm is transited from a first state that indicates a transistor characteristic to a second state that indicates an ohmic resistance characteristic.Type: ApplicationFiled: October 15, 2013Publication date: August 27, 2015Applicant: Sharp Kabushiki KaishaInventors: Naoki Ueda, Sumio Katoh
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Publication number: 20150244334Abstract: An amplification transistor has a collector to which a voltage converted by a DC/DC converter is supplied. An output voltage of the DC/DC converter is determined based on an input impedance of a rear-stage circuit block. For example, a voltage of the DC/DC converter is set such that an output waveform of an amplifier circuit becomes appropriate for the input impedance of the rear-stage circuit block (generally 50 [?]) in a targeted modulation scheme (mode) or frequency (band) to be used, without having to use an output matching circuit.Type: ApplicationFiled: September 20, 2013Publication date: August 27, 2015Applicant: SHARP KABUSHIKI KAISHAInventor: Shinji Hara
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Publication number: 20150241744Abstract: The array board 11b includes a first diode 29, a common line 25, a first shorting line 31, and the static protection portion 51. The first diode 29 include at least the first semiconductor portion 29d having outer edges 29d1 that cross the outer edges 29a1, 29b1 of first electrodes 29a, 29b in a plan view. The common line 25 is formed from the first metal film 34. The first shorting line 31 is formed from the second metal film 38 and crosses the common line 25. The static protection portion 51 is formed from the second metal film 38 or the protection film 37. At least a portion of the static protection portion 51 overlaps the common line 25 in a plan view. The static protection portion 51 is arranged closer to the first diode 29 than an intersection CPT of the common line 25 and the first shorting line 31. The static protection portion 51 includes at least a static dissipating portion 52 for dissipating static.Type: ApplicationFiled: September 25, 2013Publication date: August 27, 2015Applicant: Sharp Kabushiki KaishaInventors: Yukinobu Nakata, Masaki Maeda
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Publication number: 20150243253Abstract: Provided are a liquid crystal display device and a drive method thereof, capable of promptly making an afterimage, which is visually recognized during pause drive, visually unrecognizable while suppressing power consumption. When updated image data is transmitted, a first refresh is performed by used of this image data, and a refresh pauses based on Ref_int just in the next two-frame period. Then, the second and third refreshes are consecutively performed, and a refresh pause is repeated until the next updated image data is transmitted. In this case, since a refresh can be performed three times in a short period after reception of the updated image data, it is possible to make liquid crystal molecules oriented in a direction corresponding to an applied voltage in a short time and make an afterimage visually unrecognizable.Type: ApplicationFiled: August 9, 2013Publication date: August 27, 2015Applicant: Sharp Kabushiki KaishaInventors: Takuya Sone, Noriyuki Tanaka
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Publication number: 20150243251Abstract: The present invention includes: an input section (11) which accepts, for individual displays, first adjustment values; a calculation section (46) which corrects measurement results of colors of plural regions of each display displaying a color calibration image by using the first adjustment values inputted by the input section, obtains color differences between the adjacent displays, with correspondence to arrangement of the displays, based on measurement results of bordering regions of the displays out of the measurement results or post-correction measurement results, and then determines a maximum color difference from the color differences; a second storage section (48) which stores the maximum color difference being associated with the first adjustment values; and an adjustment section (49) which reads, from the second storage section, the first adjustment values minimizing the maximum color difference, and then set, for the individual displays, the read first adjustment values to perform color adjustmentType: ApplicationFiled: September 6, 2013Publication date: August 27, 2015Applicant: Sharp Kabushiki KaishaInventor: Hideki Ohnishi
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Publication number: 20150239866Abstract: Provided are triazole derivatives of Formula I which are potent inhibitors of spleen tyrosine kinase and pharmaceutical composition. The triazole derivatives are useful in the treatment and prevention of diseases mediated by said enzyme, such as asthma, COPD, rheumatoid arthritis, and cancer.Type: ApplicationFiled: September 24, 2013Publication date: August 27, 2015Applicants: MERCK CANADA INC., MERCK SHARP & DOHME CORP.Inventors: Michelle R. MACHACEK, Eric T. ROMEO, Solomon D. KATTAR, Matthew CHRISTOPHER, Michael D. ALTMAN, Alan B. NORTHRUP, John Michael ELLIS, Brendan O BOYLE, Anthony DONOFRIO, Jonathan GRIMM, Michael H. REUTERSHAN, Kaleen Konrad CHILDERS, Ryan D. OTTE, Brandon CASH, Yves DUCHARME, Andrew M. HAIDLE, Kerrie SPENCER, Dilrukshi VITHARANA, Lingyun WU, Li ZHANG, Peng ZHANG, Christian BEAULIEU, Daniel GUAY
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Publication number: 20150241730Abstract: A backlight device includes: an LED; an optical sheet having an opening at each end on four sides; a support member for supporting the optical sheet; and a locking member for locking each end on the four sides of the optical sheet, the locking member having an penetrating part rising from a support surface and passing through the opening and an extending part extending from the tip of the penetrating part in a direction away from the center position of the optical sheet, the extending part being formed smaller than the opening width of the opening while having a first inclined surface inclining from the tip to the middle portion of the extending part on the side facing the optical sheet so that the extending part increases in diameter from the tip to the middle portion.Type: ApplicationFiled: September 27, 2013Publication date: August 27, 2015Applicant: Sharp Kabushiki KaishaInventor: Kazuya Kondoh
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Publication number: 20150244438Abstract: The disclosure provides a method for constructing a three-dimensional (3D) multi-input multi-output (MIMO) pre-coding matrix, a method for feeding back index values of a 3D MIMO pre-coding matrix and related communication devices. The method for constructing a 3D MIMO pre-coding matrix comprises: constructing a first component matrix in a block diagonal form, wherein a diagonal sub-matrix of the first component matrix is a 3D beamforming sub-precoder for a two-dimensional (2D) antenna array; constructing a second component matrix which comprises phase weighting factors as matrix elements, wherein the phase weighting factors characterize coherent combination of signals from the 2D antenna array; and constructing the 3D MIMO pre-coding matrix according to the constructed first and second component matrixes.Type: ApplicationFiled: August 7, 2013Publication date: August 27, 2015Applicant: SHARP KABUSHIKI KAISHAInventors: Ming Ding, Renmao Liu, Lei Huang
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Publication number: 20150245322Abstract: The present invention enables a base station apparatus to efficiently notify a mobile station apparatus of control information in a wireless communication system in which the base station apparatus and the mobile station apparatus communicate. An EPDCCH consists of one or a plurality of ECCEs, and each of the ECCEs consists of a plurality of EREGs. When the EPDCCH is transmitted using distributed mapping, each resource element in each EREG is associated with one out of two antenna ports in an alternating manner, and the base station apparatus and the mobile station apparatus communicate based on the association.Type: ApplicationFiled: September 6, 2013Publication date: August 27, 2015Applicant: Sharp Kabushiki KaishaInventors: Kazuyuki Shimezawa, Toshizo Nogami, Kimihiko Imamura
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Patent number: 9115126Abstract: The invention relates to 1H-[1,2,3]triazolo[4,5-c]pyridine-4-carbonitrile derived Cathepsin S inhibitors of Formula (I), wherein R1 is H or (C1-3)alkyl; R2 is halogen or (C1-4)alkyl, optionally substituted with one or more halogens; n is 1-3; X is O or CH2; U, V and W are CH; or one of U, V and W is N; Y is a group capable of interacting with the Sn . . . S2 substites of the active site of Cathepsin S; or a pharmaceutically acceptable salt thereof, to pharmaceutical compositions comprising the same as well as to the use of these derivatives for the preparation of a medicament for the treatment of cathepsin S related diseases such as atherosclerosis, obesity, inflammation and immune disorders, such as rheumatoid arthritis, psoriasis, cancer, and chronic pain, such as neuropathic pain.Type: GrantFiled: January 13, 2011Date of Patent: August 25, 2015Assignee: Merck Sharp & Dohme B.V.Inventors: Jiaqiang Cai, David Jonathan Bennett, Philip Stephen Jones
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Patent number: 9118474Abstract: A method for reporting uplink control information (UCI) on a user equipment (UE) is described. A number of bits for a channel quality indicator and/or a precoding matrix index and/or a rank indication (CQI/PMI/RI) is obtained. A number of component carriers with hybrid automatic repeat request acknowledgement (HARQ-ACK) reporting is also obtained. A total number of HARQ-ACK bits is further obtained. A number of HARQ-ACK bits that can be carried on the physical uplink control channel (PUCCH) is determined. Bundling is performed on the total number of HARQ-ACK bits to be reported to fit the total number of HARQ-ACK bits to be reported into the number of HARQ-ACK bits that can be carried on the PUCH. A backward compatible PUCCH format is used to simultaneously carry the CQI/PMI/RI bits and the HARQ-ACK bits.Type: GrantFiled: October 8, 2014Date of Patent: August 25, 2015Assignee: Sharp Kabushiki KaishaInventors: Zhanping Yin, Shohei Yamada
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Patent number: 9115906Abstract: There is provided an air blowing device that is easy to carry and is convenient, the air blowing device that has little adverse effect on the blowing function and is configured to be able to disperse electrically-charged particles while ensuring safety. A fan 4 coupled to an output shaft 33a of a motor 33 is rotated by the motor 33 to send air. The motor 33 is housed in a motor housing portion 3, and a fan cover rear separate body 72 in the shape of a flange, the fan cover rear separate body 72 covering an outer edge portion of the fan 4 and a lateral part of the fan 4 on the side where the motor 33 is located, is fixed to an end of the motor housing portion 3 on the side where the output shaft 33a is located.Type: GrantFiled: April 3, 2013Date of Patent: August 25, 2015Assignee: Sharp Kabushiki KaishaInventor: Yukimasa Kanazawa
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Patent number: 9118910Abstract: There are provided 3D image glasses which are ready for a plurality of methods (output patterns of a timing signal) different from one another and moreover which are adaptable for various types of 3D image display devices. A ROM 6 stores a plurality of output patterns, and a plurality of command signals corresponding to the output patterns. A microcomputer 5 selects from the ROM 6 an output pattern coincident with an output pattern of a timing signal received from the 3D image display device, and moreover, by a command signal of the selected output pattern, controls opening and closing of right-eye and left-eye liquid-crystal shutters in synchronization with the received timing signal.Type: GrantFiled: August 11, 2011Date of Patent: August 25, 2015Assignee: SHARP KABUSHIKI KAISHAInventors: Takatoshi Mizoguchi, Osamu Iuchi
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Patent number: 9117704Abstract: A semiconductor device of the present invention includes an n-channel first thin film transistor and a p-channel second thin film transistor on one and the same substrate. The first thin film transistor has a first semiconductor layer (27), and the second thin film transistor has a second semiconductor layer (22). The first semiconductor layer (27) and the second semiconductor layer (22) are formed from one and the same film. Each of the first semiconductor layer (27) and the second semiconductor layer (22) has a slope portion (27e, 22e) positioned in the periphery and a main portion (27m, 22m) which is a portion excluding the slope portion. A p-type impurity is introduced into only a part of the slope portion (27e) of the first semiconductor layer with higher density than the main portion (27m) of the first semiconductor layer, the main portion (22m) of the second semiconductor layer, and the slope portion (22e) of the second semiconductor layer.Type: GrantFiled: October 29, 2014Date of Patent: August 25, 2015Assignee: Sharp Kabushiki KaishaInventors: Naoki Makita, Hiroki Mori, Masaki Saitoh