Patents Assigned to Shinko Electric Industries Co., LTD
  • Wiring board
    Patent number: 10398027
    Abstract: A wiring board includes: a wiring structure including: a first insulating layer; a first wiring layer formed on a bottom surface of the first insulating layer; and a protective insulating layer which covers the bottom surface of the first insulating layer and has a first opening; and a support base member bonded to the protective insulating layer with an adhesive layer and has a second opening. A diameter of the second opening at a position between the top surface and the bottom surface of the support base member in a thickness direction of the support base member is smaller than a diameter of the second opening at the top surface of the support base member and a diameter of the second opening at the bottom surface of the support base member, and smaller than a diameter of the first opening.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: August 27, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kazuhiro Oshima, Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Probe guide plate and probe device
    Patent number: 10386387
    Abstract: A probe guide plate includes a first silicon substrate having first through-holes formed therein, an insulation layer formed on the first silicon substrate and having an opening on a region in which the first through-holes are arranged, a second silicon substrate arranged on the insulation layer and having second through-holes formed at positions corresponding to the first through-holes, and a silicon oxide layer formed on exposed surfaces of the first silicon substrate and the second silicon substrate.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: August 20, 2019
    Assignees: SHINKO ELECTRIC INDUSTRIES CO., LTD., JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventors: Kosuke Fujihara, Yuichiro Shimizu
  • Socket
    Patent number: 10386407
    Abstract: A socket has a main body that accommodates a PCBA (Printed Circuit Board Assembly) to be inspected. The PCBA includes a substrate mounted with an electronic component, and terminals protruding from the substrate and having side surfaces exposed at an outer peripheral surface of the substrate, and the terminals are positioned within a cavity or opening of the main body in a state in which the PCBA is accommodated in the cavity or opening. The socket further has probes respectively including a fixed part fixed to the main body, and a movable part movable with respect to the fixed part, and a pressing part to press against the movable part of the probe. The movable part includes a tip end part that moves to a position contactable to the side surface of one terminal within the cavity or opening, when the pressing part presses against the movable part.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: August 20, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kazuyuki Kubota, Tomoki Kobayashi
  • Optical element package and optical element device
    Patent number: 10389084
    Abstract: An optical element package includes: an eyelet including an upper surface and a lower surface opposite to the upper surface; a heat releasing part disposed on the upper surface of the eyelet; a through hole formed through the eyelet to extend from the upper surface of the eyelet to the lower surface of the eyelet; a lead sealed by a certain member provided in the through hole and including a lead portion extending from the lower surface of the eyelet and a lead wiring portion extending from the upper surface of the eyelet; and an insulating substrate disposed between the lead wiring portion and the heat releasing part and comprising a front surface and a back surface opposite to the front surface.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: August 20, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Yasuyuki Kimura
  • Electronic component device and method for manufacturing the same
    Patent number: 10383228
    Abstract: An electronic component device includes a first coreless wiring substrate, an electronic component mounted on the first coreless wiring substrate, a second coreless wiring substrate disposed above the first coreless wiring substrate and the electronic component such that the second coreless wiring substrate is spaced from the first coreless wiring substrate and the electronic component, a connection terminal that connects the first coreless wiring substrate and the second coreless wiring substrate, and a sealing resin filled between the first and second coreless wiring substrates. Each of the first and second coreless wiring substrates include an insulating layer, a wiring layer, and a reinforcing layer embedded in the insulating layer and provided in a region overlaying the electronic component.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: August 13, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Masahiro Kyozuka
  • Electrostatic chuck
    Patent number: 10381253
    Abstract: An electrostatic chuck includes a dielectric layer and a conductive layer located inside the dielectric layer. The dielectric layer includes an upper surface and a plurality of protrusions protruding from the upper surface. Each of the protrusions includes a top portion that serves as an attraction surface on which a substrate is attracted. The dielectric layer includes a plurality of first dielectric portions and a second dielectric portion. The second dielectric portion surrounds each of the first dielectric portions in the upper surface of the dielectric layer. At least some of the first dielectric portions include the protrusions and are bonded to the conductive layer. Each of the first dielectric portions is formed from a material that differs from that of the second dielectric portion.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: August 13, 2019
    Assignee: Shinko Electric Industries Co., LTD.
    Inventors: Kazuyoshi Miyamoto, Kazunori Shimizu
  • Lead frame and method of manufacturing lead frame
    Patent number: 10381292
    Abstract: A lead frame includes a plate portion provided with a first surface and a second surface, the second surface being opposite to the first surface; a protruding portion integrally formed with the plate portion to be protruded from the first surface of the plate portion, wherein a surface of the lead frame includes a work affected layer existing region at which a work affected layer is formed, and a work affected layer non-existing region at which a work affected layer is not formed, wherein a front end surface of the protruding portion is the work affected layer existing region, wherein a region of the first surface at which the protruding portion is not formed is the work affected layer non-existing region, and wherein the second surface of the plate portion includes the work affected layer non-existing region.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: August 13, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Koji Watanabe, Kentaro Kaneko
  • LOOP HEAT PIPE
    Publication number: 20190234692
    Abstract: A loop heat pipe includes a metal layer stack of two outermost metal layers and intermediate metal layers stacked between the two outermost metal layers. The metal layer stack includes an evaporator, a condenser, a vapor pipe, a liquid pipe, and an inlet. The metal layer stack forms a flow passage that circulates the working fluid through the evaporator, the vapor pipe, the condenser, and the liquid pipe. At least one of the two outermost metal layers includes a thin wall portion that forms a portion of a wall of the vapor pipe in the flow passage.
    Type: Application
    Filed: January 11, 2019
    Publication date: August 1, 2019
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventor: Takahiko Kiso
  • Wiring substrate and semiconductor device
    Patent number: 10366949
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: July 30, 2019
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Yusuke Gozu, Jun Furuichi, Akio Rokugawa, Takashi Ito
  • Substrate holding apparatus
    Patent number: 10361110
    Abstract: A substrate holding apparatus includes a baseplate, a heating unit disposed over the baseplate, and an electrostatic chuck disposed on the heating unit, wherein the heating unit includes a heating element having at least one roughened surface and an insulating layer enclosing the heating element, and the insulating layer and the electrostatic chuck are directly bonded to each other.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: July 23, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Keiichi Takemoto, Yoichi Harayama, Yoji Asahi, Shuzo Aoki
  • Heat pipe
    Patent number: 10352626
    Abstract: A heat pipe includes a first metal layer forming a liquid layer configured to move a working fluid that is liquefied from vapor, and a second metal layer forming a vapor layer configured to move the vapor of the working fluid that is vaporized. The first metal layer includes first cavities that cave in from a first surface of the first metal layer and are arranged apart from each other, second cavities that cave in from a second surface of the first metal layer opposite to the first surface of the first metal layer, first pores partially communicating with the first cavities and the second cavities, respectively, and second pores partially communicating side surfaces of the second cavities that are adjacent to each other. The second metal layer is provided on the first surface of the first metal layer and includes an opening exposing the plurality of first cavities.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: July 16, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Nobuyuki Kurashima, Yoshihiro Machida
  • Wiring substrate and semiconductor device
    Patent number: 10340238
    Abstract: A wiring substrate includes a first wiring structure. The first wiring structure has a first insulation layer including a reinforcement material. A first wiring layer is embedded in the first insulation layer. A second wiring structure having a higher wiring density than the first wiring structure is formed on the first insulation layer. The second wiring structure includes at least one second insulation layer and two or more second wiring layers. A lower surface of the first wiring layer is flush with a lower surface of the first insulation layer. The reinforcement material is located toward the second wiring structure from a thickness-wise center of the first insulation layer and laid out at a thickness-wise center of a thickness from the lower surface of the first insulation layer to an upper surface of the uppermost second wiring layer in the second wiring structure.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: July 2, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Jun Furuichi
  • Semiconductor device
    Patent number: 10340200
    Abstract: A semiconductor device includes: a first semiconductor chip including an electrode pad on one surface of the first semiconductor chip; a multilayer chip stack that is disposed on the one surface of the first semiconductor chip to be connected to the electrode pad; a columnar spacer that is disposed on the one surface of the first semiconductor chip; and an underfill resin. The multilayer chip stack includes a plurality of second semiconductor chips each of which comprises a connection terminal. The connection terminal of one of the second semiconductor chips is directly connected to the electrode pad. Another one of the second semiconductor chips is mounted on the one of the second semiconductor chips. A gap between the first semiconductor chip and the one of the second semiconductor chips and a gap between adjacent ones of the second semiconductor chips are filled with the underfill resin.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: July 2, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Shota Miki
  • Wiring substrate
    Patent number: 10340232
    Abstract: A wiring substrate includes a coil wiring and a magnetic layer that is in contact with a lower surface of the coil wiring and includes an opening extending through in a thickness-wise direction. The wiring substrate further includes a first insulation layer covering the coil wiring, an upper surface of the magnetic layer, and a wall surface of the opening and a signal wiring structure formed so that a signal of a semiconductor element, when mounted on the wiring substrate, travels through the opening of the magnetic layer. The signal wiring structure includes a first wiring portion located on an upper surface of the first insulation layer and a first via wiring located inward from the opening of the magnetic layer and connected to the first wiring portion. The magnetic layer is not in contact with the signal wiring structure.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: July 2, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Toshiaki Aoki, Shinji Nakazawa
  • Carrier base material-added wiring substrate
    Patent number: 10340214
    Abstract: A carrier base material-added wiring substrate includes a wiring substrate and a carrier base material. The wiring substrate includes an insulation layer, a wiring layer arranged on a lower surface of the insulation layer, and a solder resist layer that covers the lower surface of the insulation layer and includes an opening that exposes a portion of the wiring layer as an external connection terminal. The carrier base material is adhered by an adhesive layer to the solder resist layer. The carrier base material includes an opening that is in communication with the opening of the solder resist layer and exposes the external connection terminal. The opening of the carrier base material has a diameter that is smaller than that of the opening of the solder resist layer.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: July 2, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • OPTICAL WAVEGUIDE DEVICE AND LENS COMPONENT
    Publication number: 20190187389
    Abstract: An optical waveguide device includes an optical-electrical hybrid substrate and a lens component mounted on the optical-electrical hybrid substrate. The optical-electrical hybrid substrate includes a wiring substrate and an optical waveguide on the wiring substrate. An optical path changer is arranged on an end of the optical waveguide. The optical waveguide includes an opening configured to expose a connection pad of the wiring substrate. The lens component includes a component body including a conductive member receptacle at a position corresponding to the opening of the optical waveguide. The lens component includes a conductive member partially accommodated in the conductive member receptacle and configured to connect the lens component to the connection pad.
    Type: Application
    Filed: November 9, 2018
    Publication date: June 20, 2019
    Applicant: Shinko Electric Industries Co., LTD.
    Inventor: Kenji Yanagisawa
  • Electronic component-embedded substrate and electronic component device
    Patent number: 10321574
    Abstract: An electronic component-embedded substrate includes a core substrate, a cavity penetrating the core substrate, a wiring layer formed on one surface of the core substrate, a support pattern extending over the cavity and configured to divide the cavity into a plurality of component embedding areas, an insulation wall portion arranged on a part of the support pattern in the cavity and formed of the same material as the core substrate, a plurality of electronic components each of which is mounted in each of the plurality of component embedding areas, and an insulating material filling an inside of the cavity.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: June 11, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Katsuya Fukase
  • Battery and method for producing the same
    Patent number: 10319963
    Abstract: A battery includes a supporting substrate, resin layers, and a plurality of cells. Each resin layer includes a first resin and has 0.5 MPa to 10 MPa in tensile strength. The cells are stacked on the supporting substrate with the resin layers between the cells.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: June 11, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kazuyuki Kubota, Mitsuhiro Aizawa, Yoshihiro Ihara
  • Probe guide plate and probe device
    Patent number: 10309988
    Abstract: A probe guide plate includes a first silicon substrate, a first recess portion formed in an upper surface of the first silicon substrate, first through-holes formed in the first silicon substrate at a bottom of the first recess portion, a second silicon substrate directly bonded on the first silicon substrate, a second recess portion formed to face the first recess portion in a lower surface of the second silicon substrate, and second through-holes formed in the second silicon substrate at a bottom of the second recess portion and arranged to correspond to the first through-holes, A notch portion is formed at an upper end portion of an inner wall of each of the first through-holes of the first silicon substrate.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: June 4, 2019
    Assignees: SHINKO ELECTRIC INDUSTRIES CO., LTD., JAPAN ELECTRONIC MATERIALS CORPORATION
    Inventors: Yuichiro Shimizu, Kosuke Fujihara, Katsunori Yamagishi, Koji Nagai
  • Wiring substrate
    Patent number: 10306759
    Abstract: A wiring substrate includes a pad, an insulation layer that covers the pad, and a via wiring extending through the insulation layer and connected to the pad. The via wiring includes a first via portion, which has a diameter that is decreased from an upper surface of the insulation layer toward the pad, and a second via portion, which has a diameter that is increased from a lower end of the first via portion toward the pad. The diameter of the second via portion at an upper surface of the pad is larger than the diameter of the first via portion at the upper surface of the insulation layer.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: May 28, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Natsuko Kitajo, Yuji Yukiiri, Izumi Tanaka