Patents Assigned to SiCED Electronics Development GmbH
  • Patent number: 6232625
    Abstract: A semiconductor configuration, in particular based on silicon carbide, is specified which rapidly limits a short-circuit current to an acceptable current value. For this purpose, when a predetermined saturation current is exceeded, a lateral channel region is pinched off, and the current is limited to a value below the saturation current.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: May 15, 2001
    Assignee: SiCED Electronics Development GmbH & Co. KG
    Inventors: Wolfgang Bartsch, Heinz Mitlehner, Dietrich Stephani
  • Patent number: 6225680
    Abstract: The SiC semiconductor structure contains at least three semiconductor regions. The surface area of the third semiconductor region encompasses that of the second semiconductor region as a second partial area, which in turn encloses the surface of the first semiconductor region as a first partial area. The contour of the edge of the second partial area is determined by the contour of the edge of the first partial area to the effect that the second partial area can be represented essentially as a specially enlarged mapping of the first partial area, the deviation of the contour of the edge of the second partial area from the exact contour that results in the course of the mapping being at most ±10 nm.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: May 1, 2001
    Assignee: SiCed Electronics Development GmbH & Co. KG
    Inventors: Dethard Peters, Reinhold Schörner
  • Patent number: 6204135
    Abstract: A thin-film system is deposited onto a surface of a semiconductor region. After at least one window has been opened in the thin-film system, the window serves as a mask for a first selective processing of a first semiconductor partial region. By undercutting the thin-film system, the edge of the window is drawn back approximately uniformly by a mean undercutting depth. The at least one enlarged window serves as a mask for a second selective processing of a second semiconductor partial region. A semiconductor structure is also provided.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: March 20, 2001
    Assignee: SICED Electronics Development GmbH & Co KG
    Inventors: Dethard Peters, Reinhold Schörner
  • Patent number: 6188555
    Abstract: A device for limiting an alternating electric current includes a least one passive semiconductor configuration and a protection circuit. The semiconductor configuration is configured such that when a forward voltage is applied thereto, a forward current flows through the semiconductor configuration. The forward current increases monotonously with the forward voltage up to a saturation current at an associated saturation voltage. At a forward voltage above the saturation voltage, the forward current is limited to a limiting current that is smaller than the saturation current. The semiconductor configuration is further configured such that when a reverse voltage is applied, a reverse current flows through the passive semiconductor configuration.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: February 13, 2001
    Assignee: SiCED Electronics Development GmbH & Co. KG
    Inventors: Heinz Mitlehner, Dietrich Stephani, Wolfgang Bartsch