Abstract: An active filter comprising an operational amplifier, and a controller configured to control the bandwidth of the operational amplifier based on a filter cutoff frequency setting and/or a noise performance setting.

Abstract: The present document relates to differential amplifiers. A differential amplifier may comprise a current source, a first transistor, a second transistor, and a compensation circuit. A reference voltage may be applied to a first terminal of the first transistor, and a second terminal of the first transistor may be coupled to an output of the current source. A feedback voltage may be applied to a first terminal of the second transistor, and a second terminal of the second transistor may be coupled to the output of the current source. The compensation circuit may comprise a capacitive element coupled to the first terminal of the first transistor, and the compensation circuit may be configured to reduce a change of the reference voltage at the first terminal of the first transistor.

Abstract: Disclosed is an interleaved buck-boost converter. The interleaved buck-boost converter includes a master switching stage and a slave switching stage that are controlled by a pulse-width-modulation (PWM) controller.

Abstract: The present document describes a detection circuit to detect a condition of a flying capacitor which is charged during a charging phase and discharged during a subsequent discharging phase. The detection circuit has a timing circuit to set a detection trigger during a charging phase of the flying capacitor, and a measurement circuit to provide one or more differential measurement signals which are dependent on and/or indicative of a voltage across the flying capacitor at the detection trigger. Furthermore, the detection circuit has a comparator circuit to provide a digital output signal based on the one or more differential measurement signals, wherein the digital output signal is indicative of whether or not the flying capacitor is faulty.

Abstract: A method of authenticating a second electronic device at a first electronic device, the method comprising: providing at the second electronic device a memory, the memory comprising a first memory portion which has restricted access and is readable only when a first secret key is presented to the second electronic device; sending the first secret key from the first electronic device to the second electronic device; in response, sending a second secret key stored in the first memory portion from the second electronic device to the first electronic device; and authenticating the second secret key at the first electronic device.

Abstract: A switched-capacitor converter is provided that includes an intermediate voltage generator having a flying capacitor. A sampling and hold circuit samples a top plate voltage for the flying capacitor and samples a bottom plate voltage for the flying capacitor to form an output voltage for the switched-capacitor converter.

Abstract: A comparator system and a method for comparing an input signal and a reference signal are presented. The system has a controller to adjust a rising output delay and/or a falling output delay of a system output signal. The system output signal is dependent on the comparison between the input signal and the reference signal. This system provides a more efficient comparator with reduced power consumption whilst still providing the required rising output delay and falling output delay for a given application. Techniques used in prior art will always resort to running the comparators at a speed that supports the speed requirements in the worst case conditions and does not exploit any asymmetries in the required rising output delay and falling output delay for a given application. When these asymmetries are exploited, further increases in power efficiency can be achieved.

Abstract: Improved techniques for sensing and reporting power consumption from a single or multiple power supplies are disclosed. The disclosed techniques comprise integrated circuit solutions for sensing power. In some embodiments, an integrated circuit comprises circuitry for converting source voltage into a pulse-width modulation (PWM) signal and circuitry for modulating the PWM signal with a current sense signal to determine sensed power.

Abstract: A contactless encoder is disclosed. The encoder comprises a selector configured to select one of a plurality of states associated with the encoder. The encoder furthermore comprises an integrated circuit comprising a finite state machine configured to detect a currently selected state by the selector and generate an output signal corresponding to the detected currently selected state, wherein the currently selected state is detected based on a capacitive coupling between the selector and a portion of the encoder associated with the currently selected state.

Abstract: A switching circuit and a method for providing a switch array having an on resistance is presented. The switch array has a plurality of switches, where each switch is arranged to be in different configuration states. The states include an enabled configuration and a disabled configuration. The switching states include an on state and an off state. Each switch is held in the off state when in the disabled configuration. Control circuitry sets the switches to either the enabled configuration or the disabled configuration, and a memory element coupled to the control circuitry and arranged to store configuration data for setting the configuration state of each of the switches. The control circuitry sets the configuration state of the switches based on a signal received from the memory element. The on resistance of the switch array depends on the switching state of the switches and their individual on resistances.

Abstract: A security integrated circuit is disclosed. In some embodiments, the security integrated circuit comprises metal configured memory that stores a first portion of each of a plurality of keys, programmable memory that stores a second portion of each of the plurality of keys, and an interface for connecting to an external authentication system. The metal configured memory and programmable memory store a prescribed finite number of host keys and matching device keys. In response to a received host key from the external authentication system, a matching device key is provided by the security integrated circuit.

Abstract: A technique for enhancing the conduction of a p-channel device is disclosed. Specifically, a negative charge pump is configured to provide a gate drive voltage to a p-channel device. The negative charge pump creates a negative voltage potential below ground and facilitates increased gate drive for the p-channel device. The gate drive voltage output by the negative charge pump may be selected such that it is optimal for the p-channel device operation.

Abstract: Smart USB plug detection is disclosed. In some embodiments, a battery charger identification chip includes circuitry configured to determine whether an external USB device has been plugged into a USB port of an associated system while the system is in a sleep mode and includes a pin configured to output a control signal indicating whether an external USB device is plugged into the system, wherein when an external USB device is plugged into the system the control signal facilitates powering on a current limit switch that is otherwise powered off during the sleep mode and wherein the current limit switch facilitates regulated delivery of current to the plugged in external USB device.

Abstract: Techniques for achieving extremely thin package structures are disclosed. In some embodiments, a device comprises an integrated circuit connected to a leadframe or substrate via connections and EMC (Epoxy Molding Compound) surrounding the integrated circuit except at a backside of the integrated circuit and connecting areas via which the integrated circuit is connected to the leadframe or substrate.

Abstract: A low cost, high efficiency light-emitting diode design is disclosed. In some embodiments, a p-n junction of a light-emitting diode is formed in an epitaxial layer grown on a substrate. Grinding the backside of an associated wafer after encapsulation not only opens a light path for the light emitting diode but removes most residual defects.

Abstract: A lateral power MOSFET structure is disclosed. In some embodiments, a semiconductor device comprises substantially concentric source, channel, and drain regions; a metal layer at least in part comprising a drain plane disposed over the source, channel, and drain regions; and a metal layer at least in part comprising a source plane disposed over the source, channel, and drain regions.

Abstract: A single integrated circuit that supports both power switching and data switching is disclosed. In some embodiments, the integrated circuit comprises a driver circuit configured to drive a switch of an associated line in a power mode or in a data mode and one or more decoupling capacitor ground switches, wherein each decoupling capacitor ground switch connects an associated decoupling capacitor to ground in the power mode and wherein each decoupling capacitor ground switch leaves an associated decoupling capacitor floating in the data mode.

Abstract: An integrated circuit frequency generator is disclosed. In some embodiments, the frequency generator comprises an electronic oscillator configured to generate an oscillator frequency and calibration circuitry configured to periodically calibrate the electronic oscillator with respect to a reference frequency source. When a primary power source is unavailable, an output frequency is generated from the oscillator frequency, and the reference frequency source is powered-on only during calibration cycles.

Abstract: An integrated circuit for switching a transistor is disclosed. In some embodiments, an operational amplifier is configured to drive a transistor, and slew rate control circuitry is configured to control the slew rate of the transistor source voltage during turn on. The transistor source voltage is employed as feedback to the operational amplifier to facilitate closed loop control of the transistor source voltage during switching of the transistor.

Abstract: Improved techniques for sensing and reporting consumed power are disclosed. The disclosed techniques comprise an integrated circuit solution for sensing power. In some embodiments, such an integrated circuit comprises a resistor on which a sense voltage sensed across an external resistor in response to a load current is mirrored and an analog-to-digital converter configured to regulate the voltage across the resistor and output a binary value representing power. The binary value representing power may integrate one or more electrical or environmental parameters such as current, voltage, temperature, battery voltage, etc.