Patents Assigned to Silego Technology, Inc.
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Patent number: 8138785Abstract: A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output buffer for the PC having a plurality of output lines connected to a plurality of output loads having output load impedances. The output lines are driven differentially at an output voltage lower than a supply voltage. The circuit includes a voltage node having a voltage node impedance. The voltage node is maintained at substantially the output voltage. The circuit includes a current sinking transistor that sinks current from the voltage node. The current sinking transistor is operated in a linear region characterized by an ohmic resistance determined by the size of the current sinking transistor. The impedance of the voltage node is matched to one of the load impedances by sizing the current sinking transistor.Type: GrantFiled: September 18, 2009Date of Patent: March 20, 2012Assignee: Silego Technology, Inc.Inventors: Jie Chen, Ting-Yen Chiang, Kuang-Yu Chen, Chen Yu Wang, Joe Froniewski
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Patent number: 8138796Abstract: A serial configuration interface (SCI) used to configure a device is disclosed. A device that support SCI includes a first connector configured to receive a first signal and a second connector configured to receive a second signal. In a configuration mode, the first signal serially selects each of a set of one or more configurable options, and the second signal facilitates selection of a desired setting of a selected configurable option. The device further includes control logic configured to determine when configuration of the device is complete and in response output the received first signal via a third connector of the device.Type: GrantFiled: October 2, 2009Date of Patent: March 20, 2012Assignee: Silego Technology, Inc.Inventor: Thomas D. Brumett, Jr.
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Publication number: 20120019287Abstract: An integrated circuit for switching a transistor is disclosed. In some embodiments, an operational amplifier is configured to drive a transistor, and slew rate control circuitry is configured to control the slew rate of the transistor source voltage during turn on. The transistor source voltage is employed as feedback to the operational amplifier to facilitate closed loop control of the transistor source voltage during switching of the transistor.Type: ApplicationFiled: July 22, 2011Publication date: January 26, 2012Applicant: SILEGO TECHNOLOGY, INC.Inventors: Thomas D. Brumett, JR., Marcelo Martinez, John Othniel McDonald
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Patent number: 8008953Abstract: An integrated circuit for switching a transistor is disclosed. In some embodiments, an operational amplifier is configured to drive a transistor, and slew rate control circuitry is configured to control the slew rate of the transistor source voltage during turn on. The transistor source voltage is employed as feedback to the operational amplifier to facilitate closed loop control of the transistor source voltage during switching of the transistor.Type: GrantFiled: November 4, 2009Date of Patent: August 30, 2011Assignee: Silego Technology, Inc.Inventors: Thomas D. Brumett, Jr., Marcelo Martinez, John Othniel McDonald
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Patent number: 7797083Abstract: Communicating a power control feedback signal from a system is disclosed. In some embodiments, upon determining how to control input power which may be based at least in part, for example, on an in situ measurement of an operating condition in an operating environment, an appropriate symbol is constructed based upon the determination and is transmitted on a single line. In some embodiments, the single line corresponds to the reference voltage of an associated power supply.Type: GrantFiled: December 15, 2005Date of Patent: September 14, 2010Assignee: Silego Technology, Inc.Inventors: Thomas D. Brumett, Jr., Ian Chen, Ilbok Lee, Marcelo Martinez
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Patent number: 7779281Abstract: Controlling input power is disclosed. In some embodiments, an in situ measurement of an operating condition in an operating environment is compared to a benchmark, and the comparison is used at least in part to determine whether to change input power.Type: GrantFiled: December 15, 2005Date of Patent: August 17, 2010Assignee: Silego Technology, Inc.Inventors: Thomas D Brumett, Jr., Ian Chen, Ilbok Lee, Marcelo Martinez
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Patent number: 7612580Abstract: A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output buffer for the PC having a plurality of output lines connected to a plurality of output loads having output load impedances. The output lines are driven differentially at an output voltage lower than a supply voltage. The circuit includes a voltage node having a voltage node impedance. The voltage node is maintained at substantially the output voltage. The circuit includes a current sinking transistor that sinks current from the voltage node. The current sinking transistor is operated in a linear region characterized by an ohmic resistance determined by the size of the current sinking transistor. The impedance of the voltage node is matched to one of the load impedances by sizing the current sinking transistor.Type: GrantFiled: February 15, 2008Date of Patent: November 3, 2009Assignee: Silego Technology, Inc.Inventors: Jie Chen, Ting-Yen Chiang, Kuang-Yu Chen, Chen Yu Wang, Joe Froniewski
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Patent number: 7506189Abstract: Adjusting input power in response to a clock frequency change is disclosed. In some embodiments, a clock signal is input into a buffer, and if an increase in clock frequency is detected at the buffer input relative to the buffer output, the supplied power is increased so that an increased supplied power is provided to an associated system before the increased frequency clock signal is output from the buffer and applied to the system. In some embodiments, the current operating frequency is compared with the operating frequency associated with the next operating state. If the next operating frequency is higher than the current operating frequency, the supplied power is increased, and application of the next operating frequency is delayed so that the next operating frequency is not applied before the increased supplied power is available.Type: GrantFiled: December 15, 2005Date of Patent: March 17, 2009Assignee: Silego Technology, Inc.Inventors: Ilbok Lee, Marcelo Martinez
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Patent number: 7358772Abstract: A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output buffer for the PC having a plurality of output lines connected to a plurality of output loads having output load impedances. The output lines are driven differentially at an output voltage lower than a supply voltage. The circuit includes a voltage node having a voltage node impedance. The voltage node is maintained at substantially the output voltage. The circuit includes a current sinking transistor that sinks current from the voltage node. The current sinking transistor is operated in a linear region characterized by an ohmic resistance determined by the size of the current sinking transistor. The impedance of the voltage node is matched to one of the load impedances by sizing the current sinking transistor.Type: GrantFiled: February 28, 2005Date of Patent: April 15, 2008Assignee: Silego Technology, Inc.Inventors: Jie Chen, Ting-Yen Chiang, Kuang-Yu Chen, Chen Yu Wang, Joe Froniewski
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Patent number: 6882187Abstract: A line driver and a method for driving a line are disclosed. The line driver includes a first current device configured to initiate a change in the state of the line and a second current device configured to substantially complete the change. The first current device provides a first current and the second current device provides a second current that is smaller than the first current.Type: GrantFiled: July 25, 2003Date of Patent: April 19, 2005Assignee: Silego Technology, Inc.Inventors: Hyunbae Kim, Chen Yu Wang, Kuang-Yu Chen