Abstract: A curved-gate transistor structure, wherein gate regions of the curved-gate transistor structure are curved, wherein the curved-gate transistor structure comprises semiconductor structural units, each semiconductor structural unit further comprises body contact regions, the body contact regions and source region are on the same side of the gate region, each semiconductor structural unit further comprises a curved gate region; the body contact regions are added near the source region, and contact regions of each of the semiconductor structural units structure can easily form a network to enhance latch-up resistance; each of the first metal blocks can be connected to a same or different potential, and the two branches of the gate regions of the same semiconductor structural unit can also be connected to a same or different potential.

Abstract: A high-voltage capacitor and a method for manufacturing the high-voltage capacitor are provided. The high-voltage capacitor comprises a first electrode portion, interlayer dielectric layers, a first voltage-resistant dielectric layer, a second electrode portion, and a second voltage-resistant dielectric layer. The interlayer dielectric layers are stacked on the first electrode portion. The first voltage-resistant dielectric layer is formed on an upper surface of a topmost interlayer dielectric layer among the interlayer dielectric layers. The second electrode portion is formed on the first voltage-resistant dielectric layer, and projections of the second electrode portion and the first electrode portion overlap along a vertical direction. The second voltage-resistant dielectric layer covers a side surface and part of an upper surface of the second electrode portion.

Abstract: A high-voltage capacitor and a manufacturing method thereof. The high-voltage capacitor includes a first electrode part, at least one interlayer dielectric layer disposed on the first electrode part, a groove disposed in a top surface of the interlayer dielectric layer, where projection of the groove in a vertical direction overlaps with the first electrode part, and a second electrode part of the high-voltage capacitor disposed on the top surface of the interlayer dielectric layer. The second electrode overlaps with the groove and extends beyond the sides of the groove. By providing the filled groove, the thickness of the dielectric layer at the edge of the lower surface of the second electrode part is increased compared to the capacitor's middle part, thereby improving the withstand voltage of the high-voltage capacitor.

Abstract: An analog-to-digital converter can include: a charge distribution and holding module configured to sample a to-be-converted signal, and to perform subtraction on the to-be-converted signal and a target reference voltage by charge distribution, in order to generate a positive-phase output voltage and a negative-phase output voltage on a first and second electric rails, respectively; a common-mode voltage compensation module coupled with the first and second electric rails, and being configured to inject common-mode charges to compensate the distributed charges of the charge distribution and holding module, and to reduce a difference between a common-mode output voltage of the charge distribution and holding module and an expected value; and a comparator configured to provide a logic signal based on a comparison between the positive-phase output voltage and the negative-phase output voltage, where the logic signal corresponds to a target digital signal of the analog-to-digital converter.

Abstract: A cascade circuit can include: N power conversion units connected in series between two ports of a power supply, where N is a positive integer greater than or equal to 2; a controller connected to one of the N power conversion units, and being configured to send a signal to be transmitted through the connected power conversion unit; where each of the power conversion units is configured to send the signal to be transmitted to a next-stage power conversion unit when the each of the power conversion unit shares a reference voltage with the adjacent next-stage power conversion unit; and where the signal to be transmitted is controlled to be transmitted from a previous-stage power conversion unit to a next-stage power conversion unit in sequence until the signal to be transmitted is received by all of the N power conversion units.

Abstract: An inductor current reconstruction circuit of a power converter can include: a switching current sampling circuit configured to acquire at least one of a current flowing through a main power transistor and a current flowing through a rectifier transistor to generate a switching current sampling signal; an inductor current generating circuit configured to generate a reconstruction signal representing an inductor current in one complete switching cycle; and where the reconstruction signal comprises the switching current sampling signal and a current analog signal generated according to the switching current sampling signal and an inductor voltage signal representing a voltage across an inductor in the power converter.

Abstract: A switched capacitor converter can include a plurality of input switch groups connected in series between an input terminal and an output terminal, where each input switch group can include two power switches connected in series. The switched capacitor converter can also include a plurality of output switch groups, where each output switch group can include two power switches connected in series. The switched capacitor converter can also include a plurality of capacitors, first terminals of which are respectively connected to the common nodes of every two series-connected power switches in the plurality of input switch groups, and second terminals of which are respectively connected to intermediate nodes of each output switch group. The switched capacitor converter can also include a plurality of inductors, where a first terminal of each output switch group can connect to a first terminal of a corresponding inductor.

Abstract: A voltage detection circuit for a switching converter having a switch and a magnetic element connected in series, where a first terminal of the switch and a first terminal of the magnetic element are connected to a common node, the voltage detection circuit including: an average circuit configured to receive a first voltage across the switch, and to generate a second voltage representing an average value of the first voltage; and where the second voltage represents a voltage between a second terminal of the switch and a second terminal of the magnetic element in a steady state of the switching converter.

Abstract: A charging circuit can include: a first module having a plurality of power transistors, and being coupled between a first port and a reference ground; a second module having a plurality of power transistors, and being coupled between a second port and the reference ground; at least one inductor coupled between the first module and the second module; and where at least one of the first module and the second module forms a multi-level converter with the at least one inductor.

Abstract: A control circuit for a resonant converter having at least two output signals, the control circuit including: a charge feedback circuit configured to generate a charge feedback signal representing a resonant current of a resonant circuit in the resonant converter; and a switching control signal generating circuit configured to generate switching control signals according to the charge feedback signal and feedback signals representing error information of each of the at least two output signals.

Abstract: A control circuit for a switching power supply, can include: a sampling circuit configured to obtain an inductor current and a drain-source voltage of a main power transistor in a power stage circuit, in order to generate a sampling signal; where the control circuit generates an inductor current sampling signal according to the sampling signal during an on-period of the main power transistor; and where during an off-period of the main power transistor, the control circuit generates a zero-crossing signal of the inductor current and an overvoltage signal of an output voltage of the switching power supply according to the sampling signal.

Abstract: A control circuit for a switching converter, where: in a first operation state, the control circuit controls a switching period of the switching converter to remain unchanged, controls a turn-on time of a power transistor in the switching converter to be not less than a minimum turn-on time in each switching period, and controls a turn-off time of the power transistor to be not less than a minimum turn-off time; in a second operation state, the control circuit controls the turn-on time of the power transistor to be the minimum turn-on time in each switching period, and adjusts the switching period to further reduce a duty cycle; and in a third operation state, the control circuit controls the turn-off time of the power transistor to be the minimum turn-off time in each switching period, and adjusts the switching period to further increase the duty cycle.

Abstract: A digital isolator can include: an encoding circuit configured to receive and encode an input digital signal, in order to generate an encoded signal, wherein a rising edge of the input digital signal is encoded as a first pulse sequence, and a falling edge of the input digital signal is encoded as a second pulse sequence; an isolation element coupled to the encoding circuit, and being configured to transmit the encoded signal in an electrically isolated manner; and a decoding circuit configured to receive the encoded signal through the isolation element, and to decode the encoded signal, in order to generate an output digital signal consistent with the input digital signal.

Abstract: An LDMOS transistor can include: a field oxide layer structure adjacent to a drain region; and at least one drain oxide layer structure adjacent to the field oxide layer structure along a lateral direction, where a thickness of the drain oxide layer structure is less than a thickness of the field oxide layer, and at least one of a length of the field oxide layer structure and a length of the drain oxide layer structure is adjusted to improve a breakdown voltage performance of the LDMOS transistor.

Abstract: A voltage converter can include: an input end configured to receive an input voltage; an output end configured to generate an output voltage; N switched capacitor circuits sequentially coupled in series between the input end and the output end, where N is a positive integer greater than or equal to 2; where each switched capacitor circuit comprises a switch circuit and a flying capacitor, and at least the flying capacitor of an i-th switched capacitor circuit is configured as an output capacitor of an (i?1)-th switched capacitor circuit, where i is a positive integer that is greater than or equal to 2 and less than or equal to N; and a first energy storage element coupled to the output end.

Abstract: A control circuit for a resonant converter, can include: a feedforward circuit configured to generate a feedforward current; a charge feedback circuit configured to receive a resonant current sampling signal representing a resonant current of the resonant converter in a first mode to generate a charge feedback signal, and to receive the resonant current sampling signal and the feedforward current together to generate the charge feedback signal in a second mode; and a driving control circuit configured to generate driving signals according to the charge feedback signal and a first threshold signal, in order to control switching states of power transistors of the resonant converter, where the first threshold signal is generated according to an error compensation signal representing an error information between a feedback signal of an output signal of the resonant converter and a reference signal.

Abstract: A control circuit and an AC-DC power supply are provided. A ripple reference signal characterizing an industrial frequency ripple component of an output voltage is added to a reference voltage of a desired output voltage, so that a reference and a feedback voltage of the output voltage are almost the same at the industrial frequency band. In addition, a voltage compensation signal outputted by an error compensation circuit does not include the industrial frequency ripple component, and the voltage compensation signal without the industrial frequency ripple component does not affect a tracking reference of the current loop. Therefore, the loop can be designed without considering limit of the industrial frequency on a cut-off frequency of the loop, thereby effectively increasing the cut-off frequency of the loop and improving a dynamic response speed of the loop.

Abstract: A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first region and the second region; an isolation component located in the isolation region; and where the isolation component is configured to recombine first carriers flowing from the first region toward the second region, and to extract second carriers flowing from the second region toward the first region.

Abstract: A driving circuit for driving a piezoelectric load, can include: an energy-storage capacitor; a first power stage circuit configured to convert an input voltage into a first voltage, and to store the first voltage in the energy-storage capacitor; a second power stage circuit configured to receive the first voltage to charge the piezoelectric load during a first operation interval of an operation period, such that a power supply voltage signal provided to the piezoelectric load in the first operation interval corresponds to a reference voltage in a first interval; and a discharging circuit configured to discharge the piezoelectric load during a second operation interval of the operation period, such that the power supply voltage signal in the second operation interval corresponds to the reference voltage in a second interval.

Abstract: A zero-voltage-switching control circuit for a switching power supply having a main power switch and a synchronous rectifier switch, is configured to: control the synchronous rectifier switch to be turned on for a first time period before the main power switch is turned on and after a current flowing through the synchronous rectifier switch is decreased to zero according to a switching operation of the main power switch in a previous switching period of the main power switch; and where a drain-source voltage of the main power switch is decreased when the main power switch is turned on, in order to reduce conduction loss.