Abstract: The invention relates to a layered micro-electronic and/or micro-mechanic structure, comprising at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.

Abstract: A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.

Abstract: A vent hole precursor structure (26) in an intermediate product for a semi-conductor device has delicate structures (27, 28), and said intermediate product has a cavity (21) with a pressure therein differing from the pressure of the surroundings. The intermediate product comprises a first wafer (20) in which there is formed a depression (21). The first wafer is bonded to a second wafer (22) comprising a device layer (23) from which the structures (27, 28) are to be made by etching. A hole or groove (26) having a predefined depth extends downwards into the device layer, such that the cavity (21) during etching is opened up before the etching procedure breaks through the device layer (23) to form the structures (27, 28).

Abstract: A method of micro-packaging a component wherein at least a first and a second semi-conductor substrate are provided, one of which has electrical through connections (vias). A depression in either one of the substrates or in both is etched. A component is provided above vias and connected thereto. The substrates are joined to form a sealed package. A micro-packaged electronic or micromechanic device, including a thin-walled casing of a semi-conductor material having electrical through connections through the bottom of the casing is also disclosed. An electronic or micromechanic component is attached to the electrical through connections, and the package is hermetically sealed for maintaining a desired atmosphere, suitably vacuum inside the box.

Abstract: The invention relates to a method of providing a planar substrate with electrical through connections (vias). The method comprises providing a hole in said substrate and a treatment to render the substrate surface exhibiting a lower wettability than the walls inside the hole. The planar substrate is exposed to a molten material with low resistivity, whereby the molten material is drawn into the hole(s). It also relates to a semiconductor wafer as a starting substrate for electronic packaging applications, comprising low resistivity wafer through connections having closely spaced vias.

Abstract: A starting substrate in the form of a semiconductor wafer (1) has a first side and a second side, the sides being plane-parallel with respect to each other, and has a thickness rendering it suitable for processing without significant risk of being damaged, for the fabrication of combined analogue and digital designs, the wafer including at least two partitions (A1, A2; DIGITAL, ANALOGUE) electrically insulated from each other by insulating material (2; 38; 81; L) extending entirely through the wafer. A method for making such substrates including etching trenches in a wafer, and filling trenches with insulating material is also described.

Abstract: A method of making a fluid communication channel between a micro mechanical structure provided on a front side of a device and the back side of said device is described. It includes making the required structural components by lithographic and etching processes on said front side. Holes are then drilled from the back side of said device in precise alignment with the structures on said front side, to provide inlets and/or outlets to and/or from the micromechanical structure.

Abstract: In manufacturing a pressure sensor a recess that will form part of the sensor cavity is formed in a lower silicon substrate. An SOI-wafer having a monocrystalline silicon layer on top of a substrate is bonded to the lower silicon substrate closing the recess and forming the cavity. The supporting substrate of the SOI-wafer is then etched away, the portion of the monocrystalline layer located above the recess forming the sensor diaphragm. The oxide layer of the SOI-wafer here acts as an “ideal” etch stop in the case where the substrate wafer is removed by dry (plasma) or wet etching using e.g. KOH. This is due to high etch selectivity between silicon and oxide for some etch processes and it results in a diaphragm having a very accurately defined and uniform thickness. The cavity is evacuated by forming a opening to the cavity and then sealing the cavity by closing the opening using LPCVD. Sensor paths for sensing the deflection of the diaphragm are applied on the outer or inner surface of the diaphragm.

Abstract: A method of making a deflectable, free hanging micro structure having at least one hinge member, the method includes the steps of providing a first sacrificial wafer having a single crystalline material constituting material forming the micro structure. A second semiconductor wafer including necessary components for forming the structure in cooperation with the first wafer is provided. Finite areas of a structured bonding material is provided, on one or both of the wafers at selected locations, the finite areas defining points of connection for joining the wafers. The wafers are bonded using heat and optionally pressure. Sacrificial material is etched away from the sacrificial wafer, patterning the top wafer by lithography is performed to define the desired deflectable microstructures having hinges, and subsequently silicon etch to make the structures.

Abstract: An entirely surface micromachined free hanging strain-gauge pressure sensor is disclosed. The sensing element consists of a 80 ?m long H-shaped double ended supported force transducing beam (16). The beam is located beneath and at one end attached to a square polysilicon diaphragm (14) and at the other end to the cavity edge. The sensor according to the invention enables a combination of high pressure sensitivity and miniature chip size as well as good environmental isolation. The pressure sensitivity for the sensor with a H-shaped force transducing beam, 0.4 ?m thick was found to be 5 ?V/V/mmHg.

Abstract: In manufacturing a pressure sensor a recess that will form part of the sensor cavity is formed in a lower silicon substrate. An SOI-wafer having a monocrystalline silicon layer on top of a substrate is bonded to the lower silicon substrate closing the recess and forming the cavity. The supporting substrate of the SOI-wafer is then etched away, the portion of the monocrystalline layer located above the recess forming the sensor diaphragm. The oxide layer of the SOI-wafer here acts as an “ideal” etch stop in the case where the substrate wafer is removed by dry (plasma) or wet etching using e.g. KOH. This is due to high etch selectivity between silicon and oxide for some etch processes and it results in a diaphragm having a very accurately defined and uniform thickness. The cavity is evacuated by forming a opening to the cavity and then sealing the cavity by closing the opening using LPCVD. Sensor paths for sensing the deflection of the diaphragm are applied on the outer or inner surface of the diaphragm.

Abstract: In manufacturing a pressure sensor a recess that will form part of the sensor cavity is formed in a lower silicon substrate. An SOI-wafer having a monocrystalline silicon layer on top of a substrate is bonded to the lower silicon substrate closing the recess and forming the cavity. The supporting substrate of the SOI-wafer is then etched away, the portion of the monocrystalline layer located above the recess forming the sensor diaphragm. The oxide layer of the SOI-wafer here acts as an “ideal” etch stop in the case where the substrate wafer is removed by dry (plasma) or wet etching using e.g. KOH. This is due to high etch selectivity between silicon and oxide for some etch processes and it results in a diaphragm having a very accurately defined and uniform thickness. The cavity is evacuated by forming a opening to the cavity and then sealing the cavity by closing the opening using LPCVD. Sensor paths for sensing the deflection of the diaphragm are applied on the outer or inner surface of the diaphragm.