Patents Assigned to Siliconware Precision Industries Co., Ltd.
  • Electronic package and fabrication method thereof
    Patent number: 11482470
    Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: October 25, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
  • ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF
    Publication number: 20220336323
    Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
  • Method for fabricating electronic package structure
    Patent number: 11476572
    Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: October 18, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
  • Electronic package, electronic packaging module having the electronic package, and method for fabricating the electronic package
    Patent number: 11443994
    Abstract: The present application provides an electronic package having an optoelectronic component and a laser component disposed on a packaging unit, with the optoelectronic component and the laser component being separated from each other. Since the laser component and the optoelectronic component are separated from each other, the electronic package has a reduced fabrication difficulty and a high yield rate. A method for fabricating the electronic package and an electronic packaging module having the electronic package are also provided.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: September 13, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Jin-Wei You, Cheng-Kai Chang
  • Electronic device, electronic package and packaging substrate thereof
    Patent number: 11437325
    Abstract: An electronic package is provided and has a packaging substrate including a ground pad and a power pad. The power pad surrounds at least three directions of the ground pad so as to increase the footprint of the power pad on the packaging substrate, thereby avoiding cracking of an electronic element disposed on the packaging substrate and effectively reducing the voltage drop.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: September 6, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Hsiu-Fang Chien, Chih-Yuan Shih, Tsung-Li Lin
  • Electronic package with multiple electronic components spaced apart by grooves
    Publication number: 20220278013
    Abstract: A method for fabricating an electronic package is provided. A filling material is formed in an interval S, at which a plurality of electronic components disposed on a carrying structure are spaced apart from one another. The filling material acts as a spacer having a groove, and the groove acts as a stress buffering region. Therefore, the electronic components can be prevented from being broken due to stress concentration.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Hong-Da Chang, Chun-Chang Ting, Chi-Jen Chen
  • ELECTRONIC PACKAGE
    Publication number: 20220262747
    Abstract: An electronic package is provided, including at least an electronic element and at least an antenna structure disposed on a carrier structure. The antenna structure includes a base portion configured with an antenna body and a plurality of support portions disposed on the base portion. As such, the base portion is disposed over the carrier structure through the support portions and a plurality of open areas are formed between the base portion and the carrier structure to serve as an air gap, thereby effectively improving the performance gain and efficiency of the antenna body.
    Type: Application
    Filed: April 19, 2021
    Publication date: August 18, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Wen-Jung Tsai, Chia-Chu Lai
  • ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF
    Publication number: 20220263221
    Abstract: An electronic package is provided and includes a first carrier structure having a plurality of antenna feed lines, and an antenna module disposed on the first carrier structure. The antenna module includes a substrate body having a plurality of recesses with different depths. Further, antenna layers are formed in the plurality of recesses and electromagnetically coupled to the antenna feed lines so as to improve the overall radiation efficiency of the antenna assembly.
    Type: Application
    Filed: April 15, 2021
    Publication date: August 18, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chung-Yu Ke, Chia-Chu Lai, Liang-Pin Chen
  • Electronic package and method for fabricating the same
    Patent number: 11418002
    Abstract: An electronic package and a method for fabricating an electronic package are provided. An encapsulation layer encapsulates a first electronic component and a plurality of conductive pillars, and is defined with a reservation region and a removal region adjacent to the reservation region. A circuit structure is disposed on the encapsulation layer. The removal region and the circuit structure therewithin are removed for an optical communication element to protrude from a lateral surface of the encapsulation layer when the optical communication element is disposed on the circuit structure, so as to avoid a packaging material used in a subsequent process from being adhered to a protruding portion of the optical communication element.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: August 16, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Kong-Toon Ng, Yi-Chian Liao
  • Electronic package, manufacturing method thereof and conductive structure
    Patent number: 11410954
    Abstract: Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: August 9, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
  • Method for fabricating package structure having encapsulate sensing chip
    Patent number: 11404361
    Abstract: A package structure and a method for fabricating the same are provided. An electronic component such as a sensing chip and a conductive element such as a bonding wire are mounted to a carrier, encapsulated by an encapsulant, and electrically connected through a conductive layer. As such, the electronic component can further be electrically connected to the carrier through the conductive layer and the conductive element. Therefore, the sensing chip can be packaged through current packaging processes, thereby reducing the fabrication cost, shortening the fabrication time and improving the product yield.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: August 2, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Shao-Tzu Tang, Jia-Fong Yeh, Yi-Hsuan Liu, Mei-Chi Chen, Ying-Chou Tsai
  • Electronic package with multiple electronic components spaced apart by grooves
    Patent number: 11398413
    Abstract: A method for fabricating an electronic package is provided. A filling material is formed in an interval S, at which a plurality of electronic components disposed on a carrying structure are spaced apart from one another. The filling material acts as a spacer having a groove, and the groove acts as a stress buffering region. Therefore, the electronic components can be prevented from being broken due to stress concentration.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: July 26, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Hong-Da Chang, Chun-Chang Ting, Chi-Jen Chen
  • Electronic package and manufacturing method thereof
    Patent number: 11398429
    Abstract: An electronic package is provided, which is disposed with a second electronic component and a third electronic component on a first electronic component as a carrier structure, such that there is no need to match a layout size of the conventional package substrate. Therefore, the first electronic component can be designed as a System on a Chip (SoC) with a smaller size to improve the process yield.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: July 26, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Cheng Kai Chang, Chang-Fu Lin, Don-Son Jiang
  • ELECTRONIC DEVICE AND CIRCUIT BOARD THEREOF
    Publication number: 20220225493
    Abstract: An electronic device is provided, in which an antenna module for receiving and transmitting radiation signals is disposed on a mounting surface of a circuit board, and an inner layer of the circuit board is formed with a ground surface to arrange a strip-shaped ground circuit along the edges of the ground surface so that the ground circuit occupies at most 50% of the area of the ground surface to improve antenna radiation efficiency.
    Type: Application
    Filed: September 2, 2021
    Publication date: July 14, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ming-Fan Tsai, Chih-Wei Chen, Chien-Cheng Lin, Chao-Ya Yang, Chia-Yang Chen
  • TESTING DEVICE AND CONTROL METHOD THEREOF
    Publication number: 20220214395
    Abstract: A control method is provided and used to place a target object on a test platform in a cabin of a testing device, to sense the temperature of the target object by a temperature response structure, and then to receive temperature signals of the temperature response structure by a controller, where the controller can regulate the pressure inside the cabin to control the air pressure of the cabin, so that the target object can still maintain good heat dissipation under high power consumption.
    Type: Application
    Filed: February 8, 2021
    Publication date: July 7, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chao-Ming Tu, Chih-Ming Yang, Wen-Chin Liang, Cheng-Shao Chen, Yung-Ming Wang
  • Electronic package, assemble substrate, and method for fabricating the assemble substrate
    Patent number: 11382214
    Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: July 5, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Lung-Yuan Wang, Wen-Liang Lien
  • Electronic package and method for fabricating the same
    Patent number: 11380978
    Abstract: An electronic package and a method for fabricating the same are provided. The method includes stacking an antenna board on a circuit board, and disposing between the antenna board and the circuit board a supporting body securing the antenna board and the circuit board. As such, during a packaging process, the distance between the antenna board and the circuit board is kept unchanged due to the supporting body, thus ensuring that the antenna board operates properly and improving the product yield.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: July 5, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Shi-Min Zhou, Han-Hung Chen, Rung-Jeng Lin, Kuo-Hua Yu, Chang-Fu Lin
  • TESTING DEVICE AND METHOD
    Publication number: 20220196731
    Abstract: Provided is a testing method including: disposing a wafer on a working platform of a testing device; and moving a circuit board of the testing device relative to the working platform by a movement assembly of the testing device so as to allow at least two testing ports of the circuit board to test two chips of the wafer, respectively. Further, the two testing ports have different testing functions. Therefore, during the wafer testing process, a single testing device can perform multiple testing operations.
    Type: Application
    Filed: February 4, 2021
    Publication date: June 23, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wen-Chin Liang, Po-Wen Hsiao, Cheng-Tsai Hsieh, Cheng-Shao Chen
  • ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF
    Publication number: 20220189900
    Abstract: An electronic package is provided and includes at least one conductor with a relatively large width formed on an electrode pad of an electronic element and in contact with a circuit layer. As such, when the electronic element and the circuit layer deviate in position relative to one another, the circuit layer will be still in contact with the conductor and hence electrically connected to the electronic element.
    Type: Application
    Filed: February 9, 2021
    Publication date: June 16, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chia-Yu Kuo, Rui-Feng Tai, Yih-Jenn Jiang, Don-Son Jiang, Chang-Fu Lin
  • ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
    Publication number: 20220181225
    Abstract: An electronic package and a method for manufacturing the electronic package are provided. The method includes forming a slope surface on at least one side surface of at least one of a plurality of electronic components, and then disposing the plurality of electronic components on a carrier structure, such that the two adjacent electronic components form a space by the slope surface. Afterwards, an encapsulation layer is formed on the carrier structure and filled into the space to cover the two adjacent electronic components so as to disperse stress on the electronic components through the design of the space to prevent cracking due to stress concentration.
    Type: Application
    Filed: January 28, 2021
    Publication date: June 9, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Jen Chen, Hsi-Chang Hsu, Yuan-Hung Hsu, Chang-Fu Lin, Don-Son Jiang