Patents Assigned to Siliconware Precision Industries Co., Ltd.
  • Publication number: 20230343665
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20230343691
    Abstract: An electronic package is provided, in which an electronic structure is embedded in an encapsulation layer, a protective layer is formed on the encapsulation layer, an insulating layer is formed on the protective layer, and at least one blind via is formed penetrating through the insulating layer and the protective layer, so that the electronic structure is exposed from the blind via to make a circuit layer formed on the insulating layer extending into the blind via to electrically connect the electronic structure. Therefore, by the double layer design of the insulating layer and the protective layer, voids generated by the process are free from being transferred to the insulating layer to avoid the voids remaining in the circuit layer.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Sung-Hua Chung, Liang-Pin Chen
  • Publication number: 20230343664
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20230343663
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20230343692
    Abstract: An electronic package is provided and includes a substrate structure, an electronic element disposed on the substrate structure and an encapsulation layer encapsulating the electronic element, where at least one functional circuit is formed on a surface of a substrate body of the substrate structure, and a wire having a smaller width is arranged on a boundary line at a junction between an encapsulation area and a peripheral area, so that when a mold for forming the encapsulation layer is formed to cover the substrate structure, the mold will create a gap around the wire to serve as an exhaust passage. Therefore, when the encapsulation layer is formed, the exhaust passage can be used to exhaust air, so as to avoid problems such as the occurrence of voids or overflows of the encapsulation layer.
    Type: Application
    Filed: July 7, 2022
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wen-Chen Hsieh, Ya-Ting Chi, Chia-Wen Tsao, Hsin-Yin Chang, Yi-Lin Tsai, Hsiu-Fang Chien
  • Publication number: 20230343751
    Abstract: An electronic package is provided, in which a first electronic element and at least one support member are disposed on a carrier structure, a spacer is disposed on the first electronic element, and a second electronic element is disposed on the at least one support member and the spacer, so as to prevent the second electronic element from tilting during a wire bonding process.
    Type: Application
    Filed: June 21, 2022
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Cheng Yeh, I-Hsin Lin, Shao-Hua Chen, Yi-Chen Chi, Wen-We Su, Kuo-Yi Chen
  • Patent number: 11791300
    Abstract: An electronic package is provided, where a circuit layer and a metal layer having a plurality of openings are formed on a dielectric layer of a circuit portion to reduce the area ratio of the metal layer to the dielectric layer, so as to reduce stress concentration and prevent warping of the electronic package.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: October 17, 2023
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Fang-Lin Tsai, Chia-Yu Kuo, Pei-Geng Weng, Wei-Son Tsai, Yih-Jenn Jiang
  • Publication number: 20230317565
    Abstract: An electronic package is provided, in which a first packaging layer is formed on a circuit structure, a portion of at least one conductive column is inserted into the first packaging layer, a remaining portion of the conductive column is protruded from the first packaging layer, and a second packaging layer is formed to cover the remaining portion of the conductive column, so that the conductive column is integrally formed in the first packaging layer and the second packaging layer. Therefore, the impact on the conductive column from the second packaging layer can be reduced and the problem of tilting of the conductive column can be prevented.
    Type: Application
    Filed: May 23, 2022
    Publication date: October 5, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chung-Yu Ke, Liang-Pin Chen
  • Publication number: 20230307339
    Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.
    Type: Application
    Filed: May 19, 2022
    Publication date: September 28, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ting-Yang Chou, Yih-Jenn Jiang, Don-Son Jiang
  • Patent number: 11764162
    Abstract: An electronic package and a manufacturing method thereof are provided, where a plurality of shielding wires are arranged on a carrier and spanning across an electronic component to cover the electronic component, so that the shielding wires serve as a shielding structure to protect the electronic component from the interference of external electromagnetic waves.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: September 19, 2023
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ming-Fan Tsai, Chih-Wei Chen, Tsung-Hsien Tsai, Chao-Ya Yang, Chia-Yang Chen
  • Publication number: 20230282972
    Abstract: An antenna module is provided with a plurality of antenna structures and a shielding structure arranged on a plate body, and the shielding structure is located between two adjacent antenna structures, where the shielding structure includes a concave portion formed on the plate body and a dielectric material formed between the concave portion and the antenna structure to generate different impedance characteristics, thereby improving the antenna isolation.
    Type: Application
    Filed: May 19, 2022
    Publication date: September 7, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Shao-Tzu Tang, Chih-Hsien Chiu, Wen-Jung Tsai, Ko-Wei Chang, Chia-Chu LAI
  • Publication number: 20230282586
    Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.
    Type: Application
    Filed: May 10, 2022
    Publication date: September 7, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Shuai-Lin Liu
  • Patent number: 11749583
    Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: September 5, 2023
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Siang-Yu Lin, Wen-Jung Tsai, Chia-Yang Chen, Chien-Cheng Lin
  • Patent number: 11747382
    Abstract: Testing equipment is used in an antenna testing process, and includes a testing head having a perforation, and a testing device having a cylinder. The cylinder is disposed in the perforation to act as a cavity for the antenna testing process. Therefore, only the cylinder needs to be replaced when the antenna testing process is performed on different devices under test, with the whole testing head intact.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: September 5, 2023
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Bo-Siang Fang, Kuang-Sheng Wang, Hsinjou Lin, Shao-Meng Sim, Mao-Hua Yeh
  • Publication number: 20230275337
    Abstract: An electronic package is provided and includes a first carrier structure having a plurality of antenna feed lines, and an antenna module disposed on the first carrier structure. The antenna module includes a substrate body having a plurality of recesses with different depths. Further, antenna layers are formed in the plurality of recesses and electromagnetically coupled to the antenna feed lines so as to improve the overall radiation efficiency of the antenna assembly.
    Type: Application
    Filed: May 4, 2023
    Publication date: August 31, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chung-Yu Ke, Chia-Chu Lai, Liang-Pin Chen
  • Patent number: 11742296
    Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: August 29, 2023
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wei-Jhen Chen, Chih-Hsun Hsu, Yuan-Hung Hsu, Chih-Nan Lin, Chang-Fu Lin, Don-Son Jiang, Chih-Ming Huang, Yi-Hsin Chen
  • Publication number: 20230268262
    Abstract: A method of manufacturing an electronic package is provided and includes disposing a circuit member and a plurality of electronic elements on opposite sides of a carrier structure having circuit layers respectively, so that any two of the plurality of electronic elements can be electrically connected to each other via the circuit layers and the circuit member, where a vertical projected area of the carrier structure is larger than a vertical projected area of the circuit member, such that the circuit member is free from being protruded from side surfaces of the carrier structure. Therefore, the circuit member replaces a part of circuit layers of the carrier structure to reduce the difficulty of fabricating the circuit layers in the carrier structure.
    Type: Application
    Filed: May 23, 2022
    Publication date: August 24, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Li-Chu Chang, Yuan-Hung Hsu, Don-Son Jiang
  • Publication number: 20230268328
    Abstract: An electronic package is provided, including: an encapsulation layer embedded with a first electronic component and conductive pillars; a circuit structure disposed on one surface of the encapsulation layer; a second electronic component disposed on the circuit structure; an insulation layer formed on the other surface of the encapsulation layer; and a circuit portion disposed on the insulation layer. Since the first and second electronic components are disposed on two sides of the circuit structure, respectively, the electronic package has various functions and high performance. A method for fabricating the electronic package is also provided.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 24, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Kong-Toon Ng, Hung-Ho Lee, Chee-Key Chung, Chang-Fu LIN, Chi-Hsin Chiu
  • Publication number: 20230260886
    Abstract: An electronic package is provided, in which a circuit structure is disposed on the uppermost side of a plurality of stacked organic material substrates for connecting an electronic element, so that a line width/line spacing of a redistribution layer of the circuit structure conforms with a line width/line spacing of the electronic element. Therefore, when the size specification of the electronic element is designed to be miniaturized, the redistribution layer configured in the circuit structure can effectively match the line spacing/line width of the electronic element, so as to meet the requirements of miniaturized packaging.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 17, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Feng Kao, Lung-Yuan Wang
  • Patent number: 11728234
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: August 15, 2023
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai