Abstract: A ?-Ga2O3 layer is grown on a substrate by: performing a first deposition cycle at a first growth rate using oxygen and a precursor including Ga, the first deposition cycle having a thickness of at least 3 atomic layers of ?-Ga2O3 and at most 20 atomic layers of ?-Ga2O3; determining a regression curve for a layer surface reflectivity using tuples of a measured first layer surface reflectivity and having a first layer thickness; and performing a second deposition cycle including measuring a second layer thickness and a second layer surface reflectivity, with a predetermined second growth rate determined from the first growth rate multiplied by a correction factor, having a defined lower and upper limit.

Abstract: A device is for drying disc-shaped substrates. The device has an elongated body, which tapers upwards to form a wedge having an angle ? between two surfaces and an upper edge. The upper edge is suitable for holding the disc-shaped substrates. The two surfaces have more than one hole, each forming channels, which extend to a lower drainage part of the elongated body.

Abstract: A side of a semiconductor wafer is cleaned in the following order: (1) executing a first cleaning step, cleaning with ozonized water, and a subsequent rinsing step, rinsing with purified water; (2) executing a second cleaning step, which includes, executing a first treatment step, including treating with ozonized water, which is followed by executing a second treatment step, treating with a hydrogen fluoride (HF)-containing liquid, where the second cleaning step may be repeated multiply; (3) executing a third cleaning step, cleaning with ozonized water, and executing a subsequent rinsing step, rinsing with purified water; and (4) executing a drying step. A preliminary cleaning step, which includes cleaning the side of the semiconductor with water, is executed directly before the first cleaning step so that the side of the semiconductor wafer is still wet while the first cleaning step commences.

Abstract: A device is for drying disc-shaped substrates. The device has an elongated body, which tapers upwards to form a wedge having an angle ? between two upper surfaces and an upper edge. The upper edge is configured to support a disc-shaped substrate. An upper surface of the two upper surfaces has a groove having an increasing groove depth with increasing distance from the upper edge.

Abstract: Unknown particles on a surface of a semiconductor wafer are classified by applying a range of particles of known chemical composition and different sizes onto a test wafer, measuring the sizes of a plurality of the particles and spectrally analyzing a makeup of the particles by energy-dispersive x-ray spectroscopy, followed by ascertaining a substantive content therefrom; creating a best-fit curve to the size and substantive content of the particles; measuring the particle size of an unknown particle and recording its spectrum by energy-dispersive x-ray spectroscopy and classifying the unknown particle as the result of a comparison of the size and the substantive content of the unknown particle with the best-fit curve.

Abstract: Wafers are sliced from a workpiece using a wire saw during slicing operations. The wire saw has a wire web of sawing wire and a setting device. The wire web is stretched in a plane between wire guide rollers that are mounted between fixed and moveable bearings. During each of the slicing operations, the setting device feeds the workpiece through the wire web along a feed direction perpendicular to a workpiece axis and perpendicular to the plane of the wire web. During each of the slicing operations, the movable bearings move oscillatingly axialy. The feeding of the workpiece through the wire web includes a simultaneous displacement of the workpiece along the workpiece axis using the setting element in accordance with a correction profile, which includes an oscillating component that is opposite to the effect which the axial moving of the movable bearings has on the shape of the sliced-off wafers.

Abstract: An apparatus produces a doped Czochralski crystal. The apparatus includes: a pressure vessel; a crucible in the pressure vessel for containing liquid silicon; and a second apparatus for doping the melt. The second apparatus includes: a housing; a reservoir vessel holding a dopant; a conveyor belt conveying the dopant; a third apparatus for shaping a dumped bed on the conveyor belt; and a pipe whose first end is accessible by the dopant from the conveyor belt and whose second end points in a direction of the liquid silicon and is closed off from the liquid silicon. The third apparatus has a half-pipe having a diameter smaller than a width of the conveyor belt, which is closed on one side, the other side being open, and is arranged over the conveyor belt such that the open side points in the direction of conveyance of the dopant.

Abstract: A method tests the stress robustness of a semiconductor substrate. The method includes: forming a nitride layer on a surface of the semiconductor substrate, the nitride layer being directly deposited on the surface of the semiconductor substrate or on a native oxide layer that is interposed on the surface; cooling the semiconductor substrate and the nitride layer; patterning the nitride layer into a patterned nitride by photolithography including a step of reactive ion etching with ions produced from a gas, which includes hydrogen or a hydrogen compound or both; processing the patterned nitride and the semiconductor substrate at a temperature of not less than 800° C. and not more than 1300° C. in a nitrogen atmosphere to induce the formation of dislocations at an interface between the patterned nitride and the semiconductor substrate; and evaluating at least one property that is related to the formed dislocations.

Abstract: A characteristic thickness value of an edge of a wafer is determined, including at a notch position. The wafer is placed in a placement area, surrounded by a boundary, of susceptor for depositing an epitaxial layer. The characteristic thickness value at the notch position is checked to see if it differs by more than a percentage limit from the characteristic thickness value at an edge position having the greatest characteristic thickness value. The placing of the substrate wafer on the placement area is executed in such a way that a distance of the wafer from the boundary of the placement area is smaller at the edge position having the greatest characteristic thickness value or at the notch position than at other edge positions.

Abstract: A method produces wafers from a cylindrical ingot of semiconductor material having an axis and an indexing notch in an outer surface of the cylindrical ingot and parallel to the axis. The method includes, in the order specified: (a) simultaneous removal of a multiplicity of sliced wafers from the cylindrical ingot by multi-wire slicing in the presence of a cutting agent; (b) etching of the sliced wafers with an alkaline etchant in an etching bath at a temperature of 20° C. to 50° C. and for a residence time, such that the material removed from each of the sliced wafers is less than 5/1000 of an initial wafer thickness; and (c) grinding of the etched wafers by simultaneous double-disk grinding using an annular abrasive covering.

Abstract: A method produces semiconductor wafers in a chamber of a deposition reactor of a plant. The method includes: repeatedly depositing an epitaxial layer on a substrate wafer in the chamber, producing semiconductor wafers, and at the same time: conditioning a replacement chamber outside the plant by purging the replacement chamber with a purge gas; interrupting the deposition of the epitaxial layer; replacing the chamber with the replacement chamber, after the conditioning, the replacement chamber being sealed and transported in a closed state to the plant or after the conditioning, the replacement chamber is transported to the plant and in this process purge gas is passed through the replacement chamber; and continuing the deposition of the epitaxial layer in the replacement chamber, producing a second number of semiconductor wafers.

Abstract: A semiconductor single-crystal silicon, is produced from a silicon substrate wafer containing interstitial oxygen in a concentration of more than 5×1016 AT/cm3 (new ASTM) by an RTA treatment of the wafer in a first heat treatment at a first temperature in a temperature range of not less than 1200° C. and not more than 1260° C. for a period of not less than 5 s and not more than 30 s, where the front side of the substrate wafer is exposed to an atmosphere containing argon; a second heat treatment at a second temperature in a temperature range of not less than 1150° C. and not more than 1190° C. for a period of not less than 15 s and not more than 20 s, where the front side of the wafer is exposed to an argon and ammonia, atmosphere, and a third heat treatment at a third temperature in a temperature range of not less than 1160° C. and not more than 1190° C. for a period of not less than 20 s and not more than 30 s, where the front side of the wafer is exposed to an atmosphere containing argon.

Abstract: Silicon single crystals having an oxygen concentration of greater than 2×1017 at/cm3, a concentration of pinholes having a diameter of greater than 100 ?m of less than 1.0×10?5 l/cm3, a carbon concentration of less than 5.5×1014 at/cm3, an iron concentration of less than 5.0×109 at/cm3, a COP concentration of fewer than 1000 defects/cm3, a LPIT concentration of fewer than 1 defect/cm2 and a crystal diameter of greater than 200 mm, are produced by the Czochralski method employing a purge gas at specified pressures and flow rates.

Abstract: Semiconductor wafers having a subsurface-referenced nanotopography of the upper side surface of less than 6 nm, expressed as a maximum peak-to-valley distance on a subsurface and referenced to subsurfaces with an area content of 25 mm×25 mm, are produced from a workpiece by feeding the workpiece through a wire web tensioned between wire guide rollers and divided into wire groups, the wires producing kerfs as the wires engage the workpiece. For each of the wire groups, a placement error of the kerfs of the wire groups is used to compensate movements of the wires of the wire group as a function of the placement error, in a direction perpendicular to the running direction of the wires during feeding of the workpiece through the arrangement of wires, by activating at least one drive element.

Abstract: A method cuts slices from workpieces using a wire saw with a wire array tensioned in a plane between two wire guide rollers supported between fixed and floating bearings. A workpiece is fed through the wire array perpendicular to a workpiece axis and the wire array plane. The workpiece is fed through the wire array while controlling a temperature of the workpiece with a cooling medium, with simultaneous axial movement of the floating bearings by adjusting a temperature of the fixed bearings in dependence on a depth of cut and in correlation with a first correction profile, and while simultaneously moving the workpiece along the workpiece axis in accordance with a specification of a second correction profile, which specifies a travel of the workpiece. The first correction profile and the second correction profile being opposed to a shape deviation.

Abstract: A method heteroepitaxially deposits a silicon germanium layer on a substrate. The silicon germanium layer has a composition Si1-xGex, where 0.01?x?1. The substrate is a silicon single crystal wafer or a silicon-on-insulator wafer. The method includes: providing a mask layer atop the substrate; removing the mask layer in an edge region of the substrate to provide access to an annular-shaped free surface of the substrate in the edge region of the substrate surrounding a remainder of the mask layer; depositing an edge reservoir consisting of a relaxed or partially relaxed silicon germanium layer atop the annular-shaped free surface of the substrate; removing the remainder of the mask layer; and depositing the silicon germanium layer atop the substrate and atop the edge reservoir, the silicon germanium layer contacting an inner lateral surface of the edge reservoir.

Abstract: A semiconductor wafer of single-crystal silicon has an oxygen concentration per new ASTM of not less than 5.0×1017 atoms/cm3 and not more than 6.5×1017 atoms/cm3; a nitrogen concentration per new ASTM of not less than 1.0×1013 atoms/cm3 and not more than 1.0×1014 atoms/cm3; a front side having a silicon epitaxial layer wherein the semiconductor wafer has BMDs whose mean size is not more than 10 nm determined by transmission electron microscopy and whose mean density adjacent to the epitaxial layer is not less than 1.0×1011 cm?3, determined by reactive ion etching after having subjected the wafer covered with the epitaxial layer to a heat treatment at a temperature of 780° C. for a period of 3 h and to a heat treatment at a temperature of 600° C. for a period of 10 h.

Abstract: The invention relates to an epitaxially coated semiconductor wafer, processed by a method in which the semiconductor wafer is disposed on a susceptor in a coating apparatus and processed, wherein an etching gas is passed through the coating apparatus in an etching step. A first side of the semiconductor wafer which has been subjected to a polishing operation by CMP, or a second side of the semiconductor wafer opposite the first side, is coated with a protective layer before processing. The resulting wafer has exceptional geometry, as reflected by low ESFQR values.

Abstract: A semiconductor wafer of single-crystal silicon has an oxygen concentration per new ASTM of not less than 5.0×1017 atoms/cm3 and not more than 6.5×1017 atoms/cm3; a nitrogen concentration per new ASTM of not less than 1.0×1013 atoms/cm3 and not more than 1.0×1014 atoms/cm3; a front side having a silicon epitaxial layer wherein the semiconductor wafer has BMDs whose mean size is not more than 10 nm determined by transmission electron microscopy and whose mean density adjacent to the epitaxial layer is not less than 1.0×1011 cm?3, determined by reactive ion etching after having subjected the wafer covered with the epitaxial layer to a heat treatment at a temperature of 780° C. for a period of 3 h and to a heat treatment at a temperature of 600° C. for a period of 10 h.

Abstract: A crystal piece of monocrystalline silicon suitable for the production of semiconductor wafers has a length of not less than 8 cm and not more than 50 cm and a diameter of not less than 280 mm and not greater than 320 mm, wherein the fraction of the semiconductor wafers produced therefrom that are free from pinholes having a size of not more than 30 ?m is greater than 98%.