Abstract: The invention relates to an epitaxially coated semiconductor wafer, processed by a method in which the semiconductor wafer is disposed on a susceptor in a coating apparatus and processed, wherein an etching gas is passed through the coating apparatus in an etching step. A first side of the semiconductor wafer which has been subjected to a polishing operation by CMP, or a second side of the semiconductor wafer opposite the first side, is coated with a protective layer before processing. The resulting wafer has exceptional geometry, as reflected by low ESFQR values.

Abstract: A multiplicity of slices are simultaneously sliced from a workpiece during a slicing operation using a wire saw. A non-linear pitch function dTAR(WP) is selected dependent on a target thickness value function TTAR(WP), a pitch function dINI(WP) and a thickness value function TINI(WP), dTAR(WP) and adjacent grooves in the wire guide rollers are assigned a pitch at a position WP during the slicing operation, TINI(WP) slices which are obtained during a plurality of preceding slicing operations by means of the wire saw at the position WP are assigned a thickness value, dINI(WP), adjacent grooves in the wire guide rollers at the position WP are assigned a pitch during the preceding slicing operations, TTAR(WP) slices which are sliced off during the slicing operation at the position WP are assigned a target thickness value, WP denoting the axial position of the adjacent grooves with respect to the axes of the wire guide rollers.

Abstract: Suitability of silicon wafers for use in device processing without generation of fatal defects is assessed by using SIRD to measure stress in a wafer cut from a piece of a crystal ingot after first and second thermal treatments of the water, the second thermal treatment consisting of a heating phase, a holding phase, and a cooling phase. The result is used to consider whether silicon wafers cut from the piece can adequately survive device processing without generating excess defects.

Abstract: Semiconductor wafers are produced by a process wherein a single-crystal ingot of semiconductor material is pulled and at least one wafer is removed from the ingot, wherein the wafer is subjected to a thermal treatment comprising a heat treatment step in which a radial temperature gradient acts on the wafer, wherein an analysis of the wafer of semiconductor material with respect to the formation of defects in the crystal lattice, so-called stress fields, is carried out.

Abstract: A multiplicity of wafers are simultaneously cut from an ingot using a structured sawing wire having indentations and protrusions along its length, wherein the structured sawing wire is guided through grooves of two wire guide rolls, and a bottom of each groove, on which the structured wire bears, has a curved groove bottom with a radius of curvature which, for each groove, is equal to or up to 1.5 times as large as the radius of the envelope of the structured wire which the structured wire has in the respective groove.

Abstract: Unknown particles on a surface of a semiconductor wafer are classified by applying a range of particles of known chemical composition and different sizes onto a test wafer, measuring the sizes of a plurality of the particles and spectrally analyzing a makeup of the particles by energy-dispersive x-ray spectroscopy, followed by ascertaining a substantive content therefrom; creating a best-fit curve to the size and substantive content of the particles; measuring the particle size of an unknown particle and recording its spectrum by energy-dispersive x-ray spectroscopy and classifying the unknown particle as the result of a comparison of the size and the substantive content of the unknown particle with the best-fit curve.

Abstract: Single crystals of semiconductor material are produced by an FZ method, wherein a molten zone is created between a feed rod and a growing single crystal; the method involving melting feed rod material in a high frequency magnetic field of a first induction coil; crystallizing material of the molten zone on top of the growing single crystal; rotating the growing single crystal about an axis of rotation and changing the direction of rotation and the speed of rotation according to a predetermined pattern; and imposing an alternating magnetic field of a second induction coil on the molten zone, wherein the alternating magnetic field is not axisymmetric with respect to the axis of rotation of the growing single crystal.

Abstract: A separating apparatus for polysilicon has at least one screen plate, comprising a feed region for polysilicon, a profiled region having peaks and valleys, a region having screen apertures which adjoins the profiled region, and a takeoff region, wherein the screen apertures widen in the direction of the takeoff region, and a separating plate which is horizontally and vertically displaceable is arranged below the screen apertures.

Abstract: A single crystal is pulled by an FZ method, in which a polycrystal is melted by means of an electromagnetic melting apparatus and then recrystallized, wherein a first phase (P1) a lower end of the polycrystal, which is moved toward the melting apparatus, is melted by the melting apparatus to form a drop, and in a second phase (P2) a monocrystalline seed is attached to the lower end of the polycrystal and is melted beginning from an upper end of the seed, where a power (P) of the melting apparatus during the first phase (P1) and during the second phase (P2) is predetermined at least temporarily in dependence on a temperature and/or geometrical dimensions of crystal material used which comprises the drop and/or the seed and/or the polycrystal.

Abstract: A susceptor for holding a semiconductor wafer with an orientation notch during deposition of a layer on the wafer comprises a susceptor ring having a placement area for placing the semiconductor wafer in the edge region of a back side of the semiconductor wafer and a step-shaped outer delimitation of the susceptor ring adjoining the placement area. The susceptor has four positions at which the structure differs from the structure at four further positions, the spacing from one of the four positions to the next of the four positions being 90°, the spacing from one of the four positions to the next further position being 45°, one of the four positions being a notch position at which the structure of the susceptor differs from the structure of the susceptor at the three other positions of the four positions of the susceptor.

Abstract: Coated semiconductor wafers are produced by introducing a process gas through first gas inlet openings along a first flow direction into a reactor chamber and over a substrate wafer of semiconductor material lying on a susceptor in order to deposit a layer on the substrate wafer, whereby material derived from the process gas precipitates on a preheat ring arranged around the susceptor; extracting the coated substrate wafer from the reactor chamber; and subsequently removing material precipitate from the preheat ring by introducing an etching gas through the first gas inlet openings into the reactor chamber along the first flow direction over the preheat ring and also through second gas inlet openings between which the first gas inlet openings are arranged, along further flow directions which intersect with the first flow direction.

Abstract: Semiconductor wafers are produced by a process wherein a single-crystal ingot of semiconductor material is pulled and at least one wafer is removed from the ingot, wherein the wafer is subjected to a thermal treatment comprising a heat treatment step in which a radial temperature gradient acts on the wafer, wherein an analysis of the wafer of semiconductor material with respect to the formation of defects in the crystal lattice, so-called stress fields, is carried out.

Abstract: A wire guide roll for use in wire saws for simultaneously slicing a multiplicity of wafers from a cylindrical workpiece is provided with a coating having a thickness of at least 2 mm and at most 7.5 mm of a material which has a Shore A hardness of at least 60 and at most 99, and which contains a multiplicity of grooves through which the sawing wire is guided, the grooves each having a curved groove base with a radius of curvature which is 0.25-1.6 times the sawing wire diameter, and an aperture angle of 60-130°. A multiplicity of wafers are simultaneously sliced from a cylindrical workpiece by a wire saw using such wire guide rolls.

Abstract: Epitaxial wafers with a high concentration of BMD nuclei or developed BMDs just below a denuded zone, and having low surface roughness, are produced by forming an oxynitride layer on a purposefully oxidized epitaxial layer by a short RTA treatment in a nitriding atmosphere, removing the oxynitride layer, and then polishing the epitaxial surface.

Abstract: Problems associated with the mismatch between a silicon substrate and a group-IIIA nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-IIIB silicide layer on the tips, then depositing a group-IIIB nitride layer, and then depositing a group-IIIA nitride.

Abstract: An epitaxial wafer comprises a silicon substrate wafer having first and second sides, and a silicon epitaxial layer deposited on the first side, and optionally one or more additional epitaxial layers on top of the silicon epitaxial layer, at least one of the silicon epitaxial layer or at least one of the one or more additional epitaxial layers being doped with nitrogen at a concentration of 1×1016 atoms/cm3 or more and 1×1020 atoms/cm3 or less. The epitaxial wafer is produced by depositing the silicon epitaxial layer and/or at least one of the one or more additional epitaxial layers, at a deposition temperature of 940° C. or less through chemical vapor deposition in the presence of a deposition gas atmosphere containing one or more silicon precursor compounds and one or more nitrogen precursor compounds.

Abstract: Single crystal silicon ingots are grown by the multi-pulling method in a single crucible with minimization of dislocations by incorporating barium as a quartz crystallization inhibitor in amounts proportional to the diameter of the Czochralski crucible in which the crystal is grown. In at least one of the crystal pulling steps, a magnetic field is applied.

Abstract: Carriers suitable for receiving one or more semiconductor wafers for the machining thereof in lapping, grinding or polishing machines, comprise a core of a first material which has a high stiffness, the core being completely or partly coated with a second material, and also at least one cutout for receiving a semiconductor wafer, wherein the second material is a thermoset polyurethane elastomer having a Shore A hardness of 20-90. The carriers are preferably coated with the second material after chemical surface activation and application of adhesion promoter, and may be used for simultaneous double-side material-removing machining of a plurality of semiconductor wafers.

Abstract: The edge region of one side of a semiconductor wafer is polished by pressing the wafer by means of a rotatable polishing head against a polishing pad lying on a rotating polishing plate, and containing fixed abrasive. The polishing head is provided with a resilient membrane radially subdivided into a plurality of chambers by gas or liquid cushions, the polishing pressure independently selectable for each chamber. The wafer is held in position during polishing by a retainer ring pressed against the polishing pad with an application pressure, a polishing agent is introduced between the wafer and the polishing pad, and the polishing pressure exerted on the wafer in a chamber lying in the edge region of the wafer of the polishing head, and the application pressure of the retainer ring, are selected so that material is essentially removed only at the edge of the wafer.

Abstract: The invention relates to a semiconductor wafer of monocrystalline silicon, and to a method for producing it. The semiconductor wafer has a zone, DZ, which is free of BMD defects and extends from a front side of the semiconductor wafer into the bulk of the semiconductor wafer, and a region having BMD defects which extends from the DZ further into the bulk of the semiconductor wafer. A silicon single crystal is pulled by the Czochralski method and processed to form a polished monocrystalline silicon substrate wafer. The substrate wafer is treated by rapidly heating and cooling the substrate wafer, slowly heating the rapidly heated and cooled substrate wafer, and keeping the substrate wafer at a specific temperature and over a specific period.